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Add STM32F415xG target support. #13417
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437 changes: 437 additions & 0 deletions
437
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F415xG/TOOLCHAIN_ARM/startup_stm32f415xx.S
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62 changes: 62 additions & 0 deletions
62
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F415xG/TOOLCHAIN_ARM/stm32f415xx.sct
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#! armcc -E | ||
; Scatter-Loading Description File | ||
; | ||
; SPDX-License-Identifier: BSD-3-Clause | ||
;****************************************************************************** | ||
;* @attention | ||
;* | ||
;* Copyright (c) 2016-2020 STMicroelectronics. | ||
;* All rights reserved. | ||
;* | ||
;* This software component is licensed by ST under BSD 3-Clause license, | ||
;* the "License"; You may not use this file except in compliance with the | ||
;* License. You may obtain a copy of the License at: | ||
;* opensource.org/licenses/BSD-3-Clause | ||
;* | ||
;****************************************************************************** | ||
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#include "../cmsis_nvic.h" | ||
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#if !defined(MBED_APP_START) | ||
#define MBED_APP_START MBED_ROM_START | ||
#endif | ||
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#if !defined(MBED_APP_SIZE) | ||
#define MBED_APP_SIZE MBED_ROM_SIZE | ||
#endif | ||
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#if !defined(MBED_BOOT_STACK_SIZE) | ||
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ | ||
#define MBED_BOOT_STACK_SIZE 0x400 | ||
#endif | ||
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/* Round up VECTORS_SIZE to 8 bytes */ | ||
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) | ||
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#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START + VECTORS_SIZE) | ||
#define MBED_CRASH_REPORT_RAM_SIZE 0x100 | ||
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) | ||
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE) | ||
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { | ||
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { | ||
*.o (RESET, +First) | ||
*(InRoot$$Sections) | ||
.ANY (+RO) | ||
} | ||
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RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data | ||
} | ||
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RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE - MBED_BOOT_STACK_SIZE) { ; RW data | ||
.ANY (+RW +ZI) | ||
} | ||
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up | ||
} | ||
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ARM_LIB_STACK (MBED_RAM0_START + MBED_RAM0_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down | ||
} | ||
} | ||
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217 changes: 217 additions & 0 deletions
217
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F415xG/TOOLCHAIN_GCC_ARM/STM32F415xx.ld
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/* Linker script to configure memory regions. */ | ||
/* | ||
* SPDX-License-Identifier: BSD-3-Clause | ||
****************************************************************************** | ||
* @attention | ||
* | ||
* Copyright (c) 2016-2020 STMicroelectronics. | ||
* All rights reserved. | ||
* | ||
* This software component is licensed by ST under BSD 3-Clause license, | ||
* the "License"; You may not use this file except in compliance with the | ||
* License. You may obtain a copy of the License at: | ||
* opensource.org/licenses/BSD-3-Clause | ||
* | ||
****************************************************************************** | ||
*/ | ||
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#include "../cmsis_nvic.h" | ||
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#if !defined(MBED_APP_START) | ||
#define MBED_APP_START MBED_ROM_START | ||
#endif | ||
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#if !defined(MBED_APP_SIZE) | ||
#define MBED_APP_SIZE MBED_ROM_SIZE | ||
#endif | ||
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#if !defined(MBED_BOOT_STACK_SIZE) | ||
/* This value is normally defined by the tools | ||
to 0x1000 for bare metal and 0x400 for RTOS */ | ||
#define MBED_BOOT_STACK_SIZE 0x400 | ||
#endif | ||
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/* Round up VECTORS_SIZE to 8 bytes */ | ||
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) | ||
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M_CRASH_DATA_RAM_SIZE = 0x100; | ||
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MEMORY | ||
{ | ||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE | ||
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE | ||
} | ||
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/* Linker script to place sections and symbol values. Should be used together | ||
* with other linker script that defines memory regions FLASH and RAM. | ||
* It references following symbols, which must be defined in code: | ||
* Reset_Handler : Entry of reset handler | ||
* | ||
* It defines following symbols, which code can use without definition: | ||
* __exidx_start | ||
* __exidx_end | ||
* __etext | ||
* __data_start__ | ||
* __preinit_array_start | ||
* __preinit_array_end | ||
* __init_array_start | ||
* __init_array_end | ||
* __fini_array_start | ||
* __fini_array_end | ||
* __data_end__ | ||
* __bss_start__ | ||
* __bss_end__ | ||
* __end__ | ||
* end | ||
* __HeapLimit | ||
* __StackLimit | ||
* __StackTop | ||
* __stack | ||
* _estack | ||
*/ | ||
ENTRY(Reset_Handler) | ||
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SECTIONS | ||
{ | ||
.text : | ||
{ | ||
KEEP(*(.isr_vector)) | ||
*(.text*) | ||
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KEEP(*(.init)) | ||
KEEP(*(.fini)) | ||
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/* .ctors */ | ||
*crtbegin.o(.ctors) | ||
*crtbegin?.o(.ctors) | ||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) | ||
*(SORT(.ctors.*)) | ||
*(.ctors) | ||
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/* .dtors */ | ||
*crtbegin.o(.dtors) | ||
*crtbegin?.o(.dtors) | ||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) | ||
*(SORT(.dtors.*)) | ||
*(.dtors) | ||
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*(.rodata*) | ||
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KEEP(*(.eh_frame*)) | ||
} > FLASH | ||
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.ARM.extab : | ||
{ | ||
*(.ARM.extab* .gnu.linkonce.armextab.*) | ||
} > FLASH | ||
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__exidx_start = .; | ||
.ARM.exidx : | ||
{ | ||
*(.ARM.exidx* .gnu.linkonce.armexidx.*) | ||
} > FLASH | ||
__exidx_end = .; | ||
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__etext = .; | ||
_sidata = .; | ||
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.crash_data_ram : | ||
{ | ||
. = ALIGN(8); | ||
__CRASH_DATA_RAM__ = .; | ||
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */ | ||
KEEP(*(.keep.crash_data_ram)) | ||
*(.m_crash_data_ram) /* This is a user defined section */ | ||
. += M_CRASH_DATA_RAM_SIZE; | ||
. = ALIGN(8); | ||
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */ | ||
} > RAM | ||
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.data : AT (__etext) | ||
{ | ||
__data_start__ = .; | ||
_sdata = .; | ||
*(vtable) | ||
*(.data*) | ||
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. = ALIGN(8); | ||
/* preinit data */ | ||
PROVIDE_HIDDEN (__preinit_array_start = .); | ||
KEEP(*(.preinit_array)) | ||
PROVIDE_HIDDEN (__preinit_array_end = .); | ||
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. = ALIGN(8); | ||
/* init data */ | ||
PROVIDE_HIDDEN (__init_array_start = .); | ||
KEEP(*(SORT(.init_array.*))) | ||
KEEP(*(.init_array)) | ||
PROVIDE_HIDDEN (__init_array_end = .); | ||
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. = ALIGN(8); | ||
/* finit data */ | ||
PROVIDE_HIDDEN (__fini_array_start = .); | ||
KEEP(*(SORT(.fini_array.*))) | ||
KEEP(*(.fini_array)) | ||
PROVIDE_HIDDEN (__fini_array_end = .); | ||
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KEEP(*(.jcr*)) | ||
. = ALIGN(8); | ||
/* All data end */ | ||
__data_end__ = .; | ||
_edata = .; | ||
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} > RAM | ||
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/* Uninitialized data section | ||
* This region is not initialized by the C/C++ library and can be used to | ||
* store state across soft reboots. */ | ||
.uninitialized (NOLOAD): | ||
{ | ||
. = ALIGN(32); | ||
__uninitialized_start = .; | ||
*(.uninitialized) | ||
KEEP(*(.keep.uninitialized)) | ||
. = ALIGN(32); | ||
__uninitialized_end = .; | ||
} > RAM | ||
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.bss : | ||
{ | ||
. = ALIGN(8); | ||
__bss_start__ = .; | ||
_sbss = .; | ||
*(.bss*) | ||
*(COMMON) | ||
. = ALIGN(8); | ||
__bss_end__ = .; | ||
_ebss = .; | ||
} > RAM | ||
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.heap (COPY): | ||
{ | ||
__end__ = .; | ||
PROVIDE(end = .); | ||
*(.heap*) | ||
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; | ||
__HeapLimit = .; | ||
} > RAM | ||
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/* .stack_dummy section doesn't contains any symbols. It is only | ||
* used for linker to calculate size of stack sections, and assign | ||
* values to stack symbols later */ | ||
.stack_dummy (COPY): | ||
{ | ||
*(.stack*) | ||
} > RAM | ||
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/* Set stack top to end of RAM, and stack limit move down by | ||
* size of stack_dummy section */ | ||
__StackTop = ORIGIN(RAM) + LENGTH(RAM); | ||
_estack = __StackTop; | ||
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; | ||
PROVIDE(__stack = __StackTop); | ||
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/* Check if data + heap + stack exceeds RAM limit */ | ||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") | ||
} |
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The change landed on master recently, t hat is fixing this MBED_BOOT_STACK_SIZE. see #13452 for details. Can you update?