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Feb 12, 2021
Merged

Skip Negative input analog channels (INN) #74

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dea5b13
[genpinmap] Skip Negative input analog channels (INN)
fpistm Feb 12, 2021
75b232f
[PinMap] Update files without ADC_INNx
fpistm Feb 12, 2021
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75 changes: 31 additions & 44 deletions src/genpinmap/Arduino/STM32H7xx/STM32H723VEHx/PeripheralPins.c
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Original file line number Diff line number Diff line change
Expand Up @@ -32,50 +32,37 @@

#ifdef HAL_ADC_MODULE_ENABLED
WEAK const PinMap PinMap_ADC[] = {
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INN16
{PA_1_ALT1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14
{PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15
{PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18
{PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INN18
{PA_5_ALT1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19
{PA_5_ALT2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INN18
{PA_5_ALT3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3
{PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INN3
{PA_7_ALT1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7
{PA_7_ALT2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INN3
{PA_7_ALT3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INN5
{PB_0_ALT1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9
{PB_0_ALT2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INN5
{PB_0_ALT3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5
{PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10
{PC_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10
{PC_0_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INN10
{PC_1_ALT1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11
{PC_1_ALT2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INN10
{PC_1_ALT3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11
{PC_1_ALT4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INN10
{PC_1_ALT5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11
{PC_2_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INN1
{PC_2_C_ALT1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0
{PC_3_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4
{PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INN4
{PC_5_ALT1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8
{PC_5_ALT2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INN4
{PC_5_ALT3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8
{NC, NP, 0}
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14
{PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15
{PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18
{PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19
{PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3
{PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7
{PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9
{PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5
{PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10
{PC_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10
{PC_0_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11
{PC_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11
{PC_1_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11
{PC_2_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0
{PC_3_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4
{PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8
{PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8
{NC, NP, 0}
};
#endif

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125 changes: 58 additions & 67 deletions src/genpinmap/Arduino/STM32H7xx/STM32H723VEHx/PinNamesVar.h
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@@ -1,73 +1,64 @@
/* Dual pad pin name */
PC_2_C = PC_2 | PDUAL,
PC_3_C = PC_3 | PDUAL,
PC_2_C = PC_2 | PDUAL,
PC_3_C = PC_3 | PDUAL,

/* Alternate pin name */
PA_0_ALT1 = PA_0 | ALT1,
PA_1_ALT1 = PA_1 | ALT1,
PA_1_ALT2 = PA_1 | ALT2,
PA_2_ALT1 = PA_2 | ALT1,
PA_2_ALT2 = PA_2 | ALT2,
PA_3_ALT1 = PA_3 | ALT1,
PA_3_ALT2 = PA_3 | ALT2,
PA_4_ALT1 = PA_4 | ALT1,
PA_4_ALT2 = PA_4 | ALT2,
PA_5_ALT1 = PA_5 | ALT1,
PA_5_ALT2 = PA_5 | ALT2,
PA_5_ALT3 = PA_5 | ALT3,
PA_6_ALT1 = PA_6 | ALT1,
PA_7_ALT1 = PA_7 | ALT1,
PA_7_ALT2 = PA_7 | ALT2,
PA_7_ALT3 = PA_7 | ALT3,
PA_8_ALT1 = PA_8 | ALT1,
PA_9_ALT1 = PA_9 | ALT1,
PA_10_ALT1 = PA_10 | ALT1,
PA_11_ALT1 = PA_11 | ALT1,
PA_12_ALT1 = PA_12 | ALT1,
PA_15_ALT1 = PA_15 | ALT1,
PA_15_ALT2 = PA_15 | ALT2,
PB_0_ALT1 = PB_0 | ALT1,
PB_0_ALT2 = PB_0 | ALT2,
PB_0_ALT3 = PB_0 | ALT3,
PB_1_ALT1 = PB_1 | ALT1,
PB_1_ALT2 = PB_1 | ALT2,
PB_3_ALT1 = PB_3 | ALT1,
PB_3_ALT2 = PB_3 | ALT2,
PB_4_ALT1 = PB_4 | ALT1,
PB_4_ALT2 = PB_4 | ALT2,
PB_5_ALT1 = PB_5 | ALT1,
PB_5_ALT2 = PB_5 | ALT2,
PB_6_ALT1 = PB_6 | ALT1,
PB_6_ALT2 = PB_6 | ALT2,
PB_7_ALT1 = PB_7 | ALT1,
PB_8_ALT1 = PB_8 | ALT1,
PB_8_ALT2 = PB_8 | ALT2,
PB_9_ALT1 = PB_9 | ALT1,
PB_9_ALT2 = PB_9 | ALT2,
PB_14_ALT1 = PB_14 | ALT1,
PB_14_ALT2 = PB_14 | ALT2,
PB_15_ALT1 = PB_15 | ALT1,
PB_15_ALT2 = PB_15 | ALT2,
PC_0_ALT1 = PC_0 | ALT1,
PC_0_ALT2 = PC_0 | ALT2,
PC_1_ALT1 = PC_1 | ALT1,
PC_1_ALT2 = PC_1 | ALT2,
PC_1_ALT3 = PC_1 | ALT3,
PC_1_ALT4 = PC_1 | ALT4,
PC_1_ALT5 = PC_1 | ALT5,
PC_2_C_ALT1 = PC_2_C | ALT1,
PC_4_ALT1 = PC_4 | ALT1,
PC_5_ALT1 = PC_5 | ALT1,
PC_5_ALT2 = PC_5 | ALT2,
PC_5_ALT3 = PC_5 | ALT3,
PC_6_ALT1 = PC_6 | ALT1,
PC_6_ALT2 = PC_6 | ALT2,
PC_7_ALT1 = PC_7 | ALT1,
PC_7_ALT2 = PC_7 | ALT2,
PC_8_ALT1 = PC_8 | ALT1,
PC_9_ALT1 = PC_9 | ALT1,
PC_10_ALT1 = PC_10 | ALT1,
PC_11_ALT1 = PC_11 | ALT1,
PA_0_ALT1 = PA_0 | ALT1,
PA_1_ALT1 = PA_1 | ALT1,
PA_1_ALT2 = PA_1 | ALT2,
PA_2_ALT1 = PA_2 | ALT1,
PA_2_ALT2 = PA_2 | ALT2,
PA_3_ALT1 = PA_3 | ALT1,
PA_3_ALT2 = PA_3 | ALT2,
PA_4_ALT1 = PA_4 | ALT1,
PA_4_ALT2 = PA_4 | ALT2,
PA_5_ALT1 = PA_5 | ALT1,
PA_6_ALT1 = PA_6 | ALT1,
PA_7_ALT1 = PA_7 | ALT1,
PA_7_ALT2 = PA_7 | ALT2,
PA_7_ALT3 = PA_7 | ALT3,
PA_8_ALT1 = PA_8 | ALT1,
PA_9_ALT1 = PA_9 | ALT1,
PA_10_ALT1 = PA_10 | ALT1,
PA_11_ALT1 = PA_11 | ALT1,
PA_12_ALT1 = PA_12 | ALT1,
PA_15_ALT1 = PA_15 | ALT1,
PA_15_ALT2 = PA_15 | ALT2,
PB_0_ALT1 = PB_0 | ALT1,
PB_0_ALT2 = PB_0 | ALT2,
PB_1_ALT1 = PB_1 | ALT1,
PB_1_ALT2 = PB_1 | ALT2,
PB_3_ALT1 = PB_3 | ALT1,
PB_3_ALT2 = PB_3 | ALT2,
PB_4_ALT1 = PB_4 | ALT1,
PB_4_ALT2 = PB_4 | ALT2,
PB_5_ALT1 = PB_5 | ALT1,
PB_5_ALT2 = PB_5 | ALT2,
PB_6_ALT1 = PB_6 | ALT1,
PB_6_ALT2 = PB_6 | ALT2,
PB_7_ALT1 = PB_7 | ALT1,
PB_8_ALT1 = PB_8 | ALT1,
PB_8_ALT2 = PB_8 | ALT2,
PB_9_ALT1 = PB_9 | ALT1,
PB_9_ALT2 = PB_9 | ALT2,
PB_14_ALT1 = PB_14 | ALT1,
PB_14_ALT2 = PB_14 | ALT2,
PB_15_ALT1 = PB_15 | ALT1,
PB_15_ALT2 = PB_15 | ALT2,
PC_0_ALT1 = PC_0 | ALT1,
PC_0_ALT2 = PC_0 | ALT2,
PC_1_ALT1 = PC_1 | ALT1,
PC_1_ALT2 = PC_1 | ALT2,
PC_4_ALT1 = PC_4 | ALT1,
PC_5_ALT1 = PC_5 | ALT1,
PC_6_ALT1 = PC_6 | ALT1,
PC_6_ALT2 = PC_6 | ALT2,
PC_7_ALT1 = PC_7 | ALT1,
PC_7_ALT2 = PC_7 | ALT2,
PC_8_ALT1 = PC_8 | ALT1,
PC_9_ALT1 = PC_9 | ALT1,
PC_10_ALT1 = PC_10 | ALT1,
PC_11_ALT1 = PC_11 | ALT1,

/* SYS_WKUP */
#ifdef PWR_WAKEUP_PIN1
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121 changes: 56 additions & 65 deletions src/genpinmap/Arduino/STM32H7xx/STM32H723VEHx/variant.h
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Expand Up @@ -104,71 +104,62 @@ extern "C" {
#define PC3_C A15

// Alternate pins number
#define PA0_ALT1 (PA0 | ALT1)
#define PA1_ALT1 (PA1 | ALT1)
#define PA1_ALT2 (PA1 | ALT2)
#define PA2_ALT1 (PA2 | ALT1)
#define PA2_ALT2 (PA2 | ALT2)
#define PA3_ALT1 (PA3 | ALT1)
#define PA3_ALT2 (PA3 | ALT2)
#define PA4_ALT1 (PA4 | ALT1)
#define PA4_ALT2 (PA4 | ALT2)
#define PA5_ALT1 (PA5 | ALT1)
#define PA5_ALT2 (PA5 | ALT2)
#define PA5_ALT3 (PA5 | ALT3)
#define PA6_ALT1 (PA6 | ALT1)
#define PA7_ALT1 (PA7 | ALT1)
#define PA7_ALT2 (PA7 | ALT2)
#define PA7_ALT3 (PA7 | ALT3)
#define PA8_ALT1 (PA8 | ALT1)
#define PA9_ALT1 (PA9 | ALT1)
#define PA10_ALT1 (PA10 | ALT1)
#define PA11_ALT1 (PA11 | ALT1)
#define PA12_ALT1 (PA12 | ALT1)
#define PA15_ALT1 (PA15 | ALT1)
#define PA15_ALT2 (PA15 | ALT2)
#define PB0_ALT1 (PB0 | ALT1)
#define PB0_ALT2 (PB0 | ALT2)
#define PB0_ALT3 (PB0 | ALT3)
#define PB1_ALT1 (PB1 | ALT1)
#define PB1_ALT2 (PB1 | ALT2)
#define PB3_ALT1 (PB3 | ALT1)
#define PB3_ALT2 (PB3 | ALT2)
#define PB4_ALT1 (PB4 | ALT1)
#define PB4_ALT2 (PB4 | ALT2)
#define PB5_ALT1 (PB5 | ALT1)
#define PB5_ALT2 (PB5 | ALT2)
#define PB6_ALT1 (PB6 | ALT1)
#define PB6_ALT2 (PB6 | ALT2)
#define PB7_ALT1 (PB7 | ALT1)
#define PB8_ALT1 (PB8 | ALT1)
#define PB8_ALT2 (PB8 | ALT2)
#define PB9_ALT1 (PB9 | ALT1)
#define PB9_ALT2 (PB9 | ALT2)
#define PB14_ALT1 (PB14 | ALT1)
#define PB14_ALT2 (PB14 | ALT2)
#define PB15_ALT1 (PB15 | ALT1)
#define PB15_ALT2 (PB15 | ALT2)
#define PC0_ALT1 (PC0 | ALT1)
#define PC0_ALT2 (PC0 | ALT2)
#define PC1_ALT1 (PC1 | ALT1)
#define PC1_ALT2 (PC1 | ALT2)
#define PC1_ALT3 (PC1 | ALT3)
#define PC1_ALT4 (PC1 | ALT4)
#define PC1_ALT5 (PC1 | ALT5)
#define PC2_C_ALT1 (PC2_C | ALT1)
#define PC4_ALT1 (PC4 | ALT1)
#define PC5_ALT1 (PC5 | ALT1)
#define PC5_ALT2 (PC5 | ALT2)
#define PC5_ALT3 (PC5 | ALT3)
#define PC6_ALT1 (PC6 | ALT1)
#define PC6_ALT2 (PC6 | ALT2)
#define PC7_ALT1 (PC7 | ALT1)
#define PC7_ALT2 (PC7 | ALT2)
#define PC8_ALT1 (PC8 | ALT1)
#define PC9_ALT1 (PC9 | ALT1)
#define PC10_ALT1 (PC10 | ALT1)
#define PC11_ALT1 (PC11 | ALT1)
#define PA0_ALT1 (PA0 | ALT1)
#define PA1_ALT1 (PA1 | ALT1)
#define PA1_ALT2 (PA1 | ALT2)
#define PA2_ALT1 (PA2 | ALT1)
#define PA2_ALT2 (PA2 | ALT2)
#define PA3_ALT1 (PA3 | ALT1)
#define PA3_ALT2 (PA3 | ALT2)
#define PA4_ALT1 (PA4 | ALT1)
#define PA4_ALT2 (PA4 | ALT2)
#define PA5_ALT1 (PA5 | ALT1)
#define PA6_ALT1 (PA6 | ALT1)
#define PA7_ALT1 (PA7 | ALT1)
#define PA7_ALT2 (PA7 | ALT2)
#define PA7_ALT3 (PA7 | ALT3)
#define PA8_ALT1 (PA8 | ALT1)
#define PA9_ALT1 (PA9 | ALT1)
#define PA10_ALT1 (PA10 | ALT1)
#define PA11_ALT1 (PA11 | ALT1)
#define PA12_ALT1 (PA12 | ALT1)
#define PA15_ALT1 (PA15 | ALT1)
#define PA15_ALT2 (PA15 | ALT2)
#define PB0_ALT1 (PB0 | ALT1)
#define PB0_ALT2 (PB0 | ALT2)
#define PB1_ALT1 (PB1 | ALT1)
#define PB1_ALT2 (PB1 | ALT2)
#define PB3_ALT1 (PB3 | ALT1)
#define PB3_ALT2 (PB3 | ALT2)
#define PB4_ALT1 (PB4 | ALT1)
#define PB4_ALT2 (PB4 | ALT2)
#define PB5_ALT1 (PB5 | ALT1)
#define PB5_ALT2 (PB5 | ALT2)
#define PB6_ALT1 (PB6 | ALT1)
#define PB6_ALT2 (PB6 | ALT2)
#define PB7_ALT1 (PB7 | ALT1)
#define PB8_ALT1 (PB8 | ALT1)
#define PB8_ALT2 (PB8 | ALT2)
#define PB9_ALT1 (PB9 | ALT1)
#define PB9_ALT2 (PB9 | ALT2)
#define PB14_ALT1 (PB14 | ALT1)
#define PB14_ALT2 (PB14 | ALT2)
#define PB15_ALT1 (PB15 | ALT1)
#define PB15_ALT2 (PB15 | ALT2)
#define PC0_ALT1 (PC0 | ALT1)
#define PC0_ALT2 (PC0 | ALT2)
#define PC1_ALT1 (PC1 | ALT1)
#define PC1_ALT2 (PC1 | ALT2)
#define PC4_ALT1 (PC4 | ALT1)
#define PC5_ALT1 (PC5 | ALT1)
#define PC6_ALT1 (PC6 | ALT1)
#define PC6_ALT2 (PC6 | ALT2)
#define PC7_ALT1 (PC7 | ALT1)
#define PC7_ALT2 (PC7 | ALT2)
#define PC8_ALT1 (PC8 | ALT1)
#define PC9_ALT1 (PC9 | ALT1)
#define PC10_ALT1 (PC10 | ALT1)
#define PC11_ALT1 (PC11 | ALT1)

#define NUM_DIGITAL_PINS 82
#define NUM_DUALPAD_PINS 2
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