Refactor and fix typos

Author: alesharik

src/capability/mod.rs

@@ -61,14 +61,14 @@ pub enum PciCapability {
 }
 
 impl PciCapability {
-    fn parse(id: u8, address: PciCapabilityAddress, control: u16) -> Option<PciCapability> {
+    fn parse(id: u8, address: PciCapabilityAddress, extension: u16) -> Option<PciCapability> {
         match id {
             0x00 => None, // null capability
             0x01 => Some(PciCapability::PowerManagement(address)),
             0x02 => Some(PciCapability::AcceleratedGraphicsPort(address)),
             0x03 => Some(PciCapability::VitalProductData(address)),
             0x04 => Some(PciCapability::SlotIdentification(address)),
-            0x05 => Some(PciCapability::Msi(MsiCapability::new(address, control))),
+            0x05 => Some(PciCapability::Msi(MsiCapability::new(address, extension))),
             0x06 => Some(PciCapability::CompactPCIHotswap(address)),
             0x07 => Some(PciCapability::PciX(address)),
             0x08 => Some(PciCapability::HyperTransport(address)),
@@ -116,14 +116,14 @@ impl<'a, T: ConfigRegionAccess> Iterator for CapabilityIterator<'a, T> {
             let data = unsafe { self.access.read(self.address, self.offset) };
             let next_ptr = data.get_bits(8..16);
             let id = data.get_bits(0..8);
-            let control = data.get_bits(16..32) as u16;
+            let extension = data.get_bits(16..32) as u16;
             let cap = PciCapability::parse(
                 id as u8,
                 PciCapabilityAddress {
                     address: self.address,
                     offset: self.offset,
                 },
-                control,
+                extension,
             );
             self.offset = next_ptr as u16;
             if let Some(cap) = cap {

src/capability/msi.rs

@@ -2,7 +2,7 @@ use crate::{capability::PciCapabilityAddress, ConfigRegionAccess};
 use bit_field::BitField;
 use core::convert::TryFrom;
 
-/// Specifies, how much MSI interrupts one device can have.
+/// Specifies how many MSI interrupts one device can have.
 /// Device will modify lower bits of interrupt vector to send multiple messages, so interrupt block
 /// must be aligned accordingly.
 #[derive(Debug, Copy, Clone, Ord, PartialOrd, Eq, PartialEq)]
@@ -77,7 +77,7 @@ impl MsiCapability {
         self.is_64bit
     }
 
-    /// How much interrupts this device has?
+    /// How many interrupts this device has?
     #[inline]
     pub fn get_multiple_message_capable(&self) -> MultipleMessageSupport {
         self.multiple_message_capable
@@ -96,7 +96,7 @@ impl MsiCapability {
         unsafe { access.write(self.address.address, self.address.offset, reg) };
     }
 
-    /// Set how much interrupts the device will use. If requested count is bigger than supported count,
+    /// Set how many interrupts the device will use. If requested count is bigger than supported count,
     /// the second will be used.
     pub fn set_multiple_message_enable(
         &self,
@@ -108,7 +108,7 @@ impl MsiCapability {
         unsafe { access.write(self.address.address, self.address.offset, reg) };
     }
 
-    /// Return how much interrupts the device is using
+    /// Return how many interrupts the device is using
     pub fn get_multiple_message_enable(
         &self,
         access: &impl ConfigRegionAccess,