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JIT/AArch64: Optimize add+ldr to ldr #7109

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Jun 7, 2021
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18 changes: 6 additions & 12 deletions ext/opcache/jit/zend_jit_arm64.dasc
Original file line number Diff line number Diff line change
Expand Up @@ -2447,25 +2447,22 @@ static int zend_jit_trace_exit_stub(dasm_State **Dst)
| ldr REG0, EX->func
| ldr REG0, [REG0, #offsetof(zend_op_array, reserved[zend_func_info_rid])]
| ldr REG0, [REG0, #offsetof(zend_jit_op_array_trace_extension, offset)]
| add REG0, IP, REG0
| ldr REG0, [REG0]
| ldr REG0, [IP, REG0]
| br REG0
} else if (GCC_GLOBAL_REGS) {
| ldp x29, x30, [sp], # SPAD // stack alignment
| ldr REG0, EX->func
| ldr REG0, [REG0, #offsetof(zend_op_array, reserved[zend_func_info_rid])]
| ldr REG0, [REG0, #offsetof(zend_jit_op_array_trace_extension, offset)]
| add REG0, IP, REG0
| ldr REG0, [REG0]
| ldr REG0, [IP, REG0]
| br REG0
} else {
| ldr IP, EX->opline
| mov FCARG1x, FP
| ldr REG0, EX->func
| ldr REG0, [REG0, #offsetof(zend_op_array, reserved[zend_func_info_rid])]
| ldr REG0, [REG0, #offsetof(zend_jit_op_array_trace_extension, offset)]
| add REG0, IP, REG0
| ldr REG0, [REG0]
| ldr REG0, [IP, REG0]
| blr REG0
|
| tst RETVALw, RETVALw
Expand Down Expand Up @@ -3115,8 +3112,7 @@ static int zend_jit_trace_return(dasm_State **Dst, bool original_handler)
| ldr REG0, EX->func
| ldr REG0, [REG0, #offsetof(zend_op_array, reserved[zend_func_info_rid])]
| ldr REG0, [REG0, #offsetof(zend_jit_op_array_trace_extension, offset)]
| add REG0, IP, REG0
| ldr REG0, [REG0]
| ldr REG0, [IP, REG0]
| br REG0
}
} else if (GCC_GLOBAL_REGS) {
Expand All @@ -3127,8 +3123,7 @@ static int zend_jit_trace_return(dasm_State **Dst, bool original_handler)
| ldr REG0, EX->func
| ldr REG0, [REG0, #offsetof(zend_op_array, reserved[zend_func_info_rid])]
| ldr REG0, [REG0, #offsetof(zend_jit_op_array_trace_extension, offset)]
| add REG0, IP, REG0
| ldr REG0, [REG0]
| ldr REG0, [IP, REG0]
| br REG0
}
} else {
Expand All @@ -3137,8 +3132,7 @@ static int zend_jit_trace_return(dasm_State **Dst, bool original_handler)
| ldr REG0, EX->func
| ldr REG0, [REG0, #offsetof(zend_op_array, reserved[zend_func_info_rid])]
| ldr REG0, [REG0, #offsetof(zend_jit_op_array_trace_extension, offset)]
| add REG0, IP, REG0
| ldr REG0, [REG0]
| ldr REG0, [IP, REG0]
| blr REG0
}
| ldp FP, RX, T2 // retore FP and IP
Expand Down