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enable DNNL OPs(dil_gelu, dil_gelu_backward, dil_native_layer_norm, d… #41

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Merged
merged 1 commit into from
Jun 4, 2020

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jiayisunx
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…il_native_layer_norm_backward)

@jiayisunx
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@EikanWang @pinzhenx

@jiayisunx jiayisunx force-pushed the dnnl_op branch 2 times, most recently from 4e6ecf9 to 56ca4bb Compare June 2, 2020 06:29
@EikanWang
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Jiayi, I enabled BF16 lazy reorder in master, could you help to enable bf16 lazy reorder in the new dil OPs?

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For BF16 lazy-reorder, we will only focus on inference within this quarter.

@jiayisunx jiayisunx force-pushed the dnnl_op branch 2 times, most recently from b8c8e53 to 632ade4 Compare June 4, 2020 01:25
@jiayisunx
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I have enabled BF16 lazy reorder for GELU. And LayerNorm performance on BF16 is poor, so I think we could not enable this OP for now. @EikanWang

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I have enabled BF16 lazy reorder for GELU. And LayerNorm performance on BF16 is poor, so I think we could not enable this OP for now. @EikanWang

Does that mean the performance of BF16 layernorm is not as good as fp32 layernorm? If yes, @pinzhenx , could we submit an issue to the DNNL team?

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Yes, and I have submitted it to DNNL team.

@EikanWang EikanWang merged commit c0f6b88 into intel:master Jun 4, 2020
zhuhaozhe pushed a commit to zhuhaozhe/intel-extension-for-pytorch that referenced this pull request Jun 24, 2020
EikanWang pushed a commit that referenced this pull request Oct 4, 2021
remove convbn folding in JIT path
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