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Double I2C read in one transaction skips a clock pulse #5528

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@maarten-pennings

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@maarten-pennings

I was writing a clock stretch injector for #5340 and then I stumbled on another error in the driver file core_esp8266_si2c.c "Software I2C library for esp8266" function twi_readFrom.

The problem occurs when issuing two reads in one I2C transaction (i.e. with a repeated START in between). In this scenario, one clock pulse is not generated by the master: the clock pulse for the 9th bit (the ack bit) just before the repeated start. I tested this with the latest release 2_5_0_BETA2 (but it also
fails on 2.4.2).

Unfortunately, I don't know how to write a single ESP8266 program that detects this. Instead, I took an arbitrary I2C slave, and hooked a logic analyzer to the I2C bus

This is the test code running on the ESP8266 (see full sketch attached at the end):

  // From slave, read 2 bytes, then repeated START
  int res1=Wire.requestFrom(SLAVE_ADDR,(size_t)2,false); // No STOP yet!
 
  // From slave, read 2 bytes, then generate STOP condition
  int res2=Wire.requestFrom(SLAVE_ADDR,(size_t)2,true);  

and this logic analyzer capture shows the problem:

missingacknack

I tried to fix the code, the following seems to work (but I have not thoroughly tested it):

suggestedfix-missingacknack

This leads to the following capture of the logic analyser:

fixedacknack

Here is the test sketch:
ESP8266-i2c2xread.zip

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