CTRL_REG1_G handling

[linxaddict]

According to the datasheet, CTRL_REG1_G consists of:

ODR_G2 ODR_G1 ODR_G0 FS_G1 FS_G0 0 BW_G1 BW_G0 and the scale is encoded on FS_G1 and FS_G0.

In the source code this bit mask is used: 0b00110000 (0x30), and it seems that ODR_G0 and FS_G1 are written. Shouldn't you use 0b00011000 (0x18) instead?

[caternuson]

Fixed by #12