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Unified magic number storage? #13

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@fpistm

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@fpistm

Hi @Serasidis

First of all, thank you very much for your excellent work!

Currently, STM32F1 handle the magic number thanks the battery backed register (DR10):

uint16_t value = READ_REG(BKP->DR10);

and STM32F4 thanks the battery backed SRAM region at 0.

magic_val = *(__IO uint32_t *) (BKPSRAM_BASE);

I wonder if it would not be better to unified them and use only battery backed register which is available across all series while backup SRAM not ?

And in this case, this could use a common DRx index across all series, DR4 should be fine.
This allow to unified cores support.

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