Description
Which problem is this feature request solving?
Verible has a number of useful tools (language server, linter, formatter, etc). The formatter and the language server are supported, however the linter is not.
Describe the solution you'd like
I would like verible-verilog-lint
supported.
Describe alternatives you've considered
I do not have access to other linters just yet (we're investigating a license for the Questasim lint tool but hasn't been approved.)
Can you submit a pull request?
No, my languages are HDLs (VHDL, Verilog/SV. Not C et al.
Thanks!
(Secondary would be nice to get some stutter typing shortcuts for ,,
-> <=
like Emacs vhdl-mode, while editing SystemVerilog, but I'm still investigating whether this is something possible done for myself. I'm more familiar with Emacs than VS Code)