From 9adfccaef238f170210e000e323ded2eb44aea87 Mon Sep 17 00:00:00 2001 From: Karl Andersson Date: Mon, 16 Mar 2020 19:48:27 +0100 Subject: [PATCH 1/2] Add PWM to PA3, PA10 and PD12 Update ldscript.ld Update SystemClock_Config() Fix upload.maximum_size and upload.maximum_data_size --- boards.txt | 4 +- variants/ARMED_V1/PeripheralPins.c | 6 +- variants/ARMED_V1/ldscript.ld | 46 +++-- variants/ARMED_V1/variant.cpp | 284 +++++++++++++++-------------- 4 files changed, 185 insertions(+), 155 deletions(-) diff --git a/boards.txt b/boards.txt index 5d3d3bc785..b755f3a6b3 100644 --- a/boards.txt +++ b/boards.txt @@ -1576,8 +1576,8 @@ LoRa.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg # ARMED_V1 board 3dprinter.menu.pnum.ARMED_V1=Armed V1 -3dprinter.menu.pnum.ARMED_V1.upload.maximum_size=1048576 -3dprinter.menu.pnum.ARMED_V1.upload.maximum_data_size=196608 +3dprinter.menu.pnum.ARMED_V1.upload.maximum_size=524288 +3dprinter.menu.pnum.ARMED_V1.upload.maximum_data_size=131072 3dprinter.menu.pnum.ARMED_V1.build.mcu=cortex-m4 3dprinter.menu.pnum.ARMED_V1.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard 3dprinter.menu.pnum.ARMED_V1.build.board=ARMED_V1 diff --git a/variants/ARMED_V1/PeripheralPins.c b/variants/ARMED_V1/PeripheralPins.c index 55fc77d930..06577346dd 100644 --- a/variants/ARMED_V1/PeripheralPins.c +++ b/variants/ARMED_V1/PeripheralPins.c @@ -128,7 +128,7 @@ WEAK const PinMap PinMap_PWM[] = { {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 // {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 - // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 // {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 // {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - SPI @@ -141,7 +141,7 @@ WEAK const PinMap PinMap_PWM[] = { // {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 - SPI // {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 // {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 - USB - // {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 - USB + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 - USB // {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 - USB // {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N @@ -176,7 +176,7 @@ WEAK const PinMap PinMap_PWM[] = { // {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 // {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 - // {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 - LED4 Green + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 - LED4 Green // {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 - LED3 Orange // {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 - LED5 Red // {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 - LED6 Blue diff --git a/variants/ARMED_V1/ldscript.ld b/variants/ARMED_V1/ldscript.ld index aac1a52c5b..91100a0782 100644 --- a/variants/ARMED_V1/ldscript.ld +++ b/variants/ARMED_V1/ldscript.ld @@ -14,14 +14,13 @@ ** ** Target : STMicroelectronics STM32 ** -** -** Distribution: The file is distributed as is, without any warranty +** Distribution: The file is distributed “as is,” without any warranty ** of any kind. ** ***************************************************************************** ** @attention ** -**

© COPYRIGHT(c) 2014 Ac6

+**

© COPYRIGHT(c) 2019 STMicroelectronics

** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: @@ -30,7 +29,7 @@ ** 2. Redistributions in binary form must reproduce the above copyright notice, ** this list of conditions and the following disclaimer in the documentation ** and/or other materials provided with the distribution. -** 3. Neither the name of Ac6 nor the names of its contributors +** 3. Neither the name of STMicroelectronics nor the names of its contributors ** may be used to endorse or promote products derived from this software ** without specific prior written permission. ** @@ -54,14 +53,15 @@ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ _estack = 0x20020000; /* end of RAM */ /* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0x200;; /* required amount of heap */ -_Min_Stack_Size = 0x400;; /* required amount of stack */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ /* Specify the memory areas */ MEMORY { -FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K } /* Define output sections */ @@ -76,7 +76,7 @@ SECTIONS } >FLASH /* The program code and other data goes into FLASH */ - .text ALIGN(4): + .text : { . = ALIGN(4); *(.text) /* .text sections (code) */ @@ -93,7 +93,7 @@ SECTIONS } >FLASH /* Constant data goes into FLASH */ - .rodata ALIGN(4): + .rodata : { . = ALIGN(4); *(.rodata) /* .rodata sections (constants, strings, etc.) */ @@ -133,7 +133,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -144,7 +144,25 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - /*_siccmram = LOADADDR(.ccmram);*/ + _siccmram = LOADADDR(.ccmram); + + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; /* create a global symbol at ccmram start */ + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; /* create a global symbol at ccmram end */ + } >CCMRAM AT> FLASH + /* Uninitialized data section */ . = ALIGN(4); @@ -165,15 +183,15 @@ SECTIONS /* User_heap_stack section, used to check that there is enough RAM left */ ._user_heap_stack : { - . = ALIGN(4); + . = ALIGN(8); PROVIDE ( end = . ); PROVIDE ( _end = . ); . = . + _Min_Heap_Size; . = . + _Min_Stack_Size; - . = ALIGN(4); + . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/variants/ARMED_V1/variant.cpp b/variants/ARMED_V1/variant.cpp index a891073d6c..68438d21a0 100644 --- a/variants/ARMED_V1/variant.cpp +++ b/variants/ARMED_V1/variant.cpp @@ -1,19 +1,31 @@ /* - Copyright (c) 2011 Arduino. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - See the GNU Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + ******************************************************************************* + * Copyright (c) 2017, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* */ #include "pins_arduino.h" @@ -22,89 +34,89 @@ extern "C" { #endif -// Pin number -const PinName digitalPin[] = { - PA_0, //D0 - PA_1, //D1 - PA_2, //D2 - PA_3, //D3 - PA_4, //D4 - PA_5, //D5 - PA_6, //D6 - PA_7, //D7 - PA_8, //D8 - PA_9, //D9 - PA_10, //D10 - PA_11, //D11 - PA_12, //D12 - PA_13, //D13 - PA_14, //D14 - PA_15, //D15 - PB_0, //D16 - PB_1, //D17 - PB_2, //D18 - PB_3, //D19 - PB_4, //D20 - PB_5, //D21 - PB_6, //D22 - PB_7, //D23 - PB_8, //D24 - PB_9, //D25 - PB_10, //D26 - PB_11, //D27 - PB_12, //D28 - PB_13, //D29 - PB_14, //D30 - PB_15, //D31 - PC_0, //D32/A0 - PC_1, //D33/A1 - PC_2, //D34/A2 - PC_3, //D35 - PC_4, //D36 - PC_5, //D37 - PC_6, //D38 - PC_7, //D39 - PC_8, //D40 - PC_9, //D41 - PC_10, //D42 - PC_11, //D43 - PC_12, //D44 - PC_13, //D45 - PC_14, //D46 - PC_15, //D47 - PD_0, //D48 - PD_1, //D49 - PD_2, //D50 - PD_3, //D51 - PD_4, //D52 - PD_5, //D53 - PD_6, //D54 - PD_7, //D55 - PD_8, //D56 - PD_9, //D57 - PD_10, //D58 - PD_11, //D59 - PD_12, //D60 - PD_13, //D61 - PD_14, //D62 - PD_15, //D63 - PE_0, //D64 - PE_1, //D65 - PE_2, //D66 - PE_3, //D67 - PE_4, //D68 - PE_5, //D69 - PE_6, //D70 - PE_7, //D71 - PE_8, //D72 - PE_9, //D73 - PE_10, //D74 - PE_11, //D75 - PE_12, //D76 - PE_13, //D77 - PE_14, //D78 - PE_15 //D79 -}; + // Pin number + const PinName digitalPin[] = { + PA_0, //D0 + PA_1, //D1 + PA_2, //D2 + PA_3, //D3 + PA_4, //D4 + PA_5, //D5 + PA_6, //D6 + PA_7, //D7 + PA_8, //D8 + PA_9, //D9 + PA_10, //D10 + PA_11, //D11 + PA_12, //D12 + PA_13, //D13 + PA_14, //D14 + PA_15, //D15 + PB_0, //D16 + PB_1, //D17 + PB_2, //D18 + PB_3, //D19 + PB_4, //D20 + PB_5, //D21 + PB_6, //D22 + PB_7, //D23 + PB_8, //D24 + PB_9, //D25 + PB_10, //D26 + PB_11, //D27 + PB_12, //D28 + PB_13, //D29 + PB_14, //D30 + PB_15, //D31 + PC_0, //D32/A0 + PC_1, //D33/A1 + PC_2, //D34/A2 + PC_3, //D35 + PC_4, //D36 + PC_5, //D37 + PC_6, //D38 + PC_7, //D39 + PC_8, //D40 + PC_9, //D41 + PC_10, //D42 + PC_11, //D43 + PC_12, //D44 + PC_13, //D45 + PC_14, //D46 + PC_15, //D47 + PD_0, //D48 + PD_1, //D49 + PD_2, //D50 + PD_3, //D51 + PD_4, //D52 + PD_5, //D53 + PD_6, //D54 + PD_7, //D55 + PD_8, //D56 + PD_9, //D57 + PD_10, //D58 + PD_11, //D59 + PD_12, //D60 + PD_13, //D61 + PD_14, //D62 + PD_15, //D63 + PE_0, //D64 + PE_1, //D65 + PE_2, //D66 + PE_3, //D67 + PE_4, //D68 + PE_5, //D69 + PE_6, //D70 + PE_7, //D71 + PE_8, //D72 + PE_9, //D73 + PE_10, //D74 + PE_11, //D75 + PE_12, //D76 + PE_13, //D77 + PE_14, //D78 + PE_15 //D79 + }; #ifdef __cplusplus } @@ -116,7 +128,7 @@ const PinName digitalPin[] = { extern "C" { #endif -/** + /** * @brief System Clock Configuration * The system Clock is configured as follow : * System Clock source = PLL (HSE) @@ -136,49 +148,49 @@ extern "C" { * @param None * @retval None */ -WEAK void SystemClock_Config(void) -{ - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; + WEAK void SystemClock_Config(void) + { + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + /**Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); - /* Enable Power Control clock */ - __HAL_RCC_PWR_CLK_ENABLE(); - -#ifdef HAL_PWR_MODULE_ENABLED - /* The voltage scaling allows optimizing the power consumption when the device is + /* The voltage scaling allows optimizing the power consumption when the device is clocked below the maximum system frequency, to update the voltage scaling value regarding system frequency refer to product datasheet. */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); -#endif - - /* Enable HSE Oscillator and activate PLL with HSE as source */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 8; - RCC_OscInitStruct.PLL.PLLN = 336; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = 7; - HAL_RCC_OscConfig(&RCC_OscInitStruct); - - /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + _Error_Handler(__FILE__, __LINE__); + } + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | - RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); - - /* STM32F405x/407x/415x/417x Revision Z devices: prefetch is supported */ - if (HAL_GetREVID() == 0x1001) { - /* Enable the Flash prefetch */ - __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | + RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + _Error_Handler(__FILE__, __LINE__); + } + + /* Ensure CCM RAM clock is enabled */ + __HAL_RCC_CCMDATARAMEN_CLK_ENABLE(); } -} #ifdef __cplusplus } From 5d020c218475ef9e47572935347a0ff98c3af3cf Mon Sep 17 00:00:00 2001 From: Karl Andersson Date: Mon, 16 Mar 2020 20:05:41 +0100 Subject: [PATCH 2/2] Astyle formatting --- variants/ARMED_V1/variant.cpp | 278 +++++++++++++++++----------------- 1 file changed, 139 insertions(+), 139 deletions(-) diff --git a/variants/ARMED_V1/variant.cpp b/variants/ARMED_V1/variant.cpp index 68438d21a0..2153e807a0 100644 --- a/variants/ARMED_V1/variant.cpp +++ b/variants/ARMED_V1/variant.cpp @@ -34,89 +34,89 @@ extern "C" { #endif - // Pin number - const PinName digitalPin[] = { - PA_0, //D0 - PA_1, //D1 - PA_2, //D2 - PA_3, //D3 - PA_4, //D4 - PA_5, //D5 - PA_6, //D6 - PA_7, //D7 - PA_8, //D8 - PA_9, //D9 - PA_10, //D10 - PA_11, //D11 - PA_12, //D12 - PA_13, //D13 - PA_14, //D14 - PA_15, //D15 - PB_0, //D16 - PB_1, //D17 - PB_2, //D18 - PB_3, //D19 - PB_4, //D20 - PB_5, //D21 - PB_6, //D22 - PB_7, //D23 - PB_8, //D24 - PB_9, //D25 - PB_10, //D26 - PB_11, //D27 - PB_12, //D28 - PB_13, //D29 - PB_14, //D30 - PB_15, //D31 - PC_0, //D32/A0 - PC_1, //D33/A1 - PC_2, //D34/A2 - PC_3, //D35 - PC_4, //D36 - PC_5, //D37 - PC_6, //D38 - PC_7, //D39 - PC_8, //D40 - PC_9, //D41 - PC_10, //D42 - PC_11, //D43 - PC_12, //D44 - PC_13, //D45 - PC_14, //D46 - PC_15, //D47 - PD_0, //D48 - PD_1, //D49 - PD_2, //D50 - PD_3, //D51 - PD_4, //D52 - PD_5, //D53 - PD_6, //D54 - PD_7, //D55 - PD_8, //D56 - PD_9, //D57 - PD_10, //D58 - PD_11, //D59 - PD_12, //D60 - PD_13, //D61 - PD_14, //D62 - PD_15, //D63 - PE_0, //D64 - PE_1, //D65 - PE_2, //D66 - PE_3, //D67 - PE_4, //D68 - PE_5, //D69 - PE_6, //D70 - PE_7, //D71 - PE_8, //D72 - PE_9, //D73 - PE_10, //D74 - PE_11, //D75 - PE_12, //D76 - PE_13, //D77 - PE_14, //D78 - PE_15 //D79 - }; +// Pin number +const PinName digitalPin[] = { + PA_0, //D0 + PA_1, //D1 + PA_2, //D2 + PA_3, //D3 + PA_4, //D4 + PA_5, //D5 + PA_6, //D6 + PA_7, //D7 + PA_8, //D8 + PA_9, //D9 + PA_10, //D10 + PA_11, //D11 + PA_12, //D12 + PA_13, //D13 + PA_14, //D14 + PA_15, //D15 + PB_0, //D16 + PB_1, //D17 + PB_2, //D18 + PB_3, //D19 + PB_4, //D20 + PB_5, //D21 + PB_6, //D22 + PB_7, //D23 + PB_8, //D24 + PB_9, //D25 + PB_10, //D26 + PB_11, //D27 + PB_12, //D28 + PB_13, //D29 + PB_14, //D30 + PB_15, //D31 + PC_0, //D32/A0 + PC_1, //D33/A1 + PC_2, //D34/A2 + PC_3, //D35 + PC_4, //D36 + PC_5, //D37 + PC_6, //D38 + PC_7, //D39 + PC_8, //D40 + PC_9, //D41 + PC_10, //D42 + PC_11, //D43 + PC_12, //D44 + PC_13, //D45 + PC_14, //D46 + PC_15, //D47 + PD_0, //D48 + PD_1, //D49 + PD_2, //D50 + PD_3, //D51 + PD_4, //D52 + PD_5, //D53 + PD_6, //D54 + PD_7, //D55 + PD_8, //D56 + PD_9, //D57 + PD_10, //D58 + PD_11, //D59 + PD_12, //D60 + PD_13, //D61 + PD_14, //D62 + PD_15, //D63 + PE_0, //D64 + PE_1, //D65 + PE_2, //D66 + PE_3, //D67 + PE_4, //D68 + PE_5, //D69 + PE_6, //D70 + PE_7, //D71 + PE_8, //D72 + PE_9, //D73 + PE_10, //D74 + PE_11, //D75 + PE_12, //D76 + PE_13, //D77 + PE_14, //D78 + PE_15 //D79 +}; #ifdef __cplusplus } @@ -128,70 +128,70 @@ extern "C" { extern "C" { #endif - /** - * @brief System Clock Configuration - * The system Clock is configured as follow : - * System Clock source = PLL (HSE) - * SYSCLK(Hz) = 168000000 - * HCLK(Hz) = 168000000 - * AHB Prescaler = 1 - * APB1 Prescaler = 4 - * APB2 Prescaler = 2 - * HSE Frequency(Hz) = 8000000 - * PLL_M = 8 - * PLL_N = 336 - * PLL_P = 2 - * PLL_Q = 7 - * VDD(V) = 3.3 - * Main regulator output voltage = Scale1 mode - * Flash Latency(WS) = 5 - * @param None - * @retval None - */ - WEAK void SystemClock_Config(void) - { - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_OscInitTypeDef RCC_OscInitStruct; +/** +* @brief System Clock Configuration +* The system Clock is configured as follow : +* System Clock source = PLL (HSE) +* SYSCLK(Hz) = 168000000 +* HCLK(Hz) = 168000000 +* AHB Prescaler = 1 +* APB1 Prescaler = 4 +* APB2 Prescaler = 2 +* HSE Frequency(Hz) = 8000000 +* PLL_M = 8 +* PLL_N = 336 +* PLL_P = 2 +* PLL_Q = 7 +* VDD(V) = 3.3 +* Main regulator output voltage = Scale1 mode +* Flash Latency(WS) = 5 +* @param None +* @retval None +*/ +WEAK void SystemClock_Config(void) +{ + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ - __HAL_RCC_PWR_CLK_ENABLE(); - - /* The voltage scaling allows optimizing the power consumption when the device is - clocked below the maximum system frequency, to update the voltage scaling value - regarding system frequency refer to product datasheet. */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + __HAL_RCC_PWR_CLK_ENABLE(); - /* Enable HSE Oscillator and activate PLL with HSE as source */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 8; - RCC_OscInitStruct.PLL.PLLN = 336; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = 7; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - _Error_Handler(__FILE__, __LINE__); - } + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 - clocks dividers */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | - RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + _Error_Handler(__FILE__, __LINE__); + } - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { - _Error_Handler(__FILE__, __LINE__); - } + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | + RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - /* Ensure CCM RAM clock is enabled */ - __HAL_RCC_CCMDATARAMEN_CLK_ENABLE(); + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + _Error_Handler(__FILE__, __LINE__); } + /* Ensure CCM RAM clock is enabled */ + __HAL_RCC_CCMDATARAMEN_CLK_ENABLE(); +} + #ifdef __cplusplus } #endif