-Update History V4.1.0 / 29-April-2016
+Update History V4.2.0 / 31-March-2017
+
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+
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+
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+ Main
+Changes
Use _Pos and _Mask macros for all Bit Definitions Remove Core-CM3 bit definitions from CMSIS devices drivers: duplicated with bit definitions in core_cm3.h. General updates in header files to support LL drivers Remove TIM SMCR OCCS and TIM CCER CC4NP bit definitions Add new USART defines: USART_CR1_OVER8 and USART_CR3_ONEBIT Add I2C_DR_DR bit definition Add new I2C macros: IS_SMBUS_ALL_INSTANCE Add new LL I2S defines: SPI_I2S_SUPPORT and I2S2_I2S3_CLOCK_FEATURE Rename DAC instance to DAC1 Rename PWR_CR_PLS_XXX to PWR_CR_PLS_LEVX Add RCC LL defines RCC_HSE_MIN RCC_HSE_MAX RCC_MAX_FREQUENCY RCC_PLL_SUPPORT RCC_PLLI2S_SUPPORT Add new TIM macros to check TIM feature instance support: IS_TIM_COUNTER_MODE_SELECT_INSTANCE() IS_TIM_ADVANCED_INSTANCE IS_TIM_ETR_INSTANCE IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE IS_TIM_32B_COUNTER_INSTANCE IS_TIM_BREAK_INSTANCE() IS_TIM_CCXN_INSTANCE() IS_TIM_REPETITION_COUNTER_INSTANCE() IS_TIM_COMMUTATION_EVENT_INSTANCE() V4.1.0 / 29-April-2016
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xb.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xb.s
index 599ed3fe52..fbf19b7ca6 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xb.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xb.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f100xb.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F100xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xe.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xe.s
index c1bc579904..1159ddf2b7 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xe.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xe.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f100xe.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F100xE Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101x6.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101x6.s
index 6b6128e64c..07915af4f4 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101x6.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101x6.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f101x6.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F101x6 Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xb.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xb.s
index 1a3132457e..52b3297002 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xb.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xb.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f101xb.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F101xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xe.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xe.s
index 4135b33906..f4aefc2011 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xe.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xe.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f101xe.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F101xE Value Line Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xg.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xg.s
index 6813e05a9d..7e79d0c849 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xg.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xg.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f101xg.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F101xG Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102x6.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102x6.s
index 07e61f0acc..219c326b3b 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102x6.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102x6.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f102x6.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F102x6 Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102xb.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102xb.s
index a6fe71db78..2372c69d8e 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102xb.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102xb.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f102xb.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F102xB Value Line Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103x6.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103x6.s
index 2c349746e3..1e033fb08c 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103x6.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103x6.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103x6.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F103x6 Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xb.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xb.s
index 2c499cd500..1bdd5240d6 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xb.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xb.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103xb.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F103xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s
index 6f8559de1d..0727d65899 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103xe.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F103xE Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -18,7 +18,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xg.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xg.s
index a55edfde99..1ae0faf7e7 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xg.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xg.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103xb.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F103xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f105xc.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f105xc.s
index 87729a3a0d..dc57f1dfd8 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f105xc.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f105xc.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f105xc.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F105xC Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f107xc.s b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f107xc.s
index 4d6aa39c03..35bf316b51 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f107xc.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f107xc.s
@@ -1,9 +1,9 @@
/**
- *************** (C) COPYRIGHT 2016 STMicroelectronics ************************
+ *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f107xc.s
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief STM32F107xC Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
@@ -16,7 +16,7 @@
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c
index e78886bc51..789b551c70 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c
+++ b/system/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
@@ -35,7 +35,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -93,12 +93,12 @@
*/
#if !defined (HSE_VALUE)
- #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
+ #define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
- #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
+ #define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
@@ -110,7 +110,7 @@
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field.
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
@@ -134,13 +134,13 @@
* Clock Definitions
*******************************************************************************/
#if defined(STM32F100xB) ||defined(STM32F100xE)
- uint32_t SystemCoreClock = 24000000; /*!< System Clock Frequency (Core Clock) */
+ uint32_t SystemCoreClock = 24000000U; /*!< System Clock Frequency (Core Clock) */
#else /*!< HSI Selected as System Clock source */
- uint32_t SystemCoreClock = 72000000; /*!< System Clock Frequency (Core Clock) */
+ uint32_t SystemCoreClock = 72000000U; /*!< System Clock Frequency (Core Clock) */
#endif
-const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
+const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
@@ -176,42 +176,42 @@ void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
- RCC->CR |= (uint32_t)0x00000001;
+ RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
- RCC->CFGR &= (uint32_t)0xF8FF0000;
+ RCC->CFGR &= 0xF8FF0000U;
#else
- RCC->CFGR &= (uint32_t)0xF0FF0000;
+ RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
- RCC->CR &= (uint32_t)0xFEF6FFFF;
+ RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
- RCC->CR &= (uint32_t)0xFFFBFFFF;
+ RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
- RCC->CFGR &= (uint32_t)0xFF80FFFF;
+ RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
- RCC->CR &= (uint32_t)0xEBFFFFFF;
+ RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
- RCC->CIR = 0x00FF0000;
+ RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
- RCC->CFGR2 = 0x00000000;
+ RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
- RCC->CIR = 0x009F0000;
+ RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
- RCC->CFGR2 = 0x00000000;
+ RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
- RCC->CIR = 0x009F0000;
+ RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
@@ -264,14 +264,14 @@ void SystemInit (void)
*/
void SystemCoreClockUpdate (void)
{
- uint32_t tmp = 0, pllmull = 0, pllsource = 0;
+ uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
- uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0;
+ uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
- uint32_t prediv1factor = 0;
+ uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
@@ -279,37 +279,37 @@ void SystemCoreClockUpdate (void)
switch (tmp)
{
- case 0x00: /* HSI used as system clock */
+ case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
- case 0x04: /* HSE used as system clock */
+ case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
- case 0x08: /* PLL used as system clock */
+ case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
- pllmull = ( pllmull >> 18) + 2;
+ pllmull = ( pllmull >> 18U) + 2U;
- if (pllsource == 0x00)
+ if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
- SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
+ SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
- prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
+ prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
- SystemCoreClock = (HSE_VALUE >> 1) * pllmull;
+ SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
@@ -318,30 +318,30 @@ void SystemCoreClockUpdate (void)
#endif
}
#else
- pllmull = pllmull >> 18;
+ pllmull = pllmull >> 18U;
- if (pllmull != 0x0D)
+ if (pllmull != 0x0DU)
{
- pllmull += 2;
+ pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
- pllmull = 13 / 2;
+ pllmull = 13U / 2U;
}
- if (pllsource == 0x00)
+ if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
- SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
+ SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
- prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
+ prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
- if (prediv1source == 0)
+ if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
@@ -350,8 +350,8 @@ void SystemCoreClockUpdate (void)
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
- prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1;
- pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2;
+ prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
+ pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
@@ -365,7 +365,7 @@ void SystemCoreClockUpdate (void)
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
- tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
@@ -394,13 +394,13 @@ void SystemInit_ExtMemCtl(void)
required, then adjust the Register Addresses */
/* Enable FSMC clock */
- RCC->AHBENR = 0x00000114;
+ RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
- RCC->APB2ENR = 0x000001E0;
+ RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
@@ -413,23 +413,23 @@ void SystemInit_ExtMemCtl(void)
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
- GPIOD->CRL = 0x44BB44BB;
- GPIOD->CRH = 0xBBBBBBBB;
+ GPIOD->CRL = 0x44BB44BBU;
+ GPIOD->CRH = 0xBBBBBBBBU;
- GPIOE->CRL = 0xB44444BB;
- GPIOE->CRH = 0xBBBBBBBB;
+ GPIOE->CRL = 0xB44444BBU;
+ GPIOE->CRH = 0xBBBBBBBBU;
- GPIOF->CRL = 0x44BBBBBB;
- GPIOF->CRH = 0xBBBB4444;
+ GPIOF->CRL = 0x44BBBBBBU;
+ GPIOF->CRH = 0xBBBB4444U;
- GPIOG->CRL = 0x44BBBBBB;
- GPIOG->CRH = 0x444B4B44;
+ GPIOG->CRL = 0x44BBBBBBU;
+ GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
- FSMC_Bank1->BTCR[4] = 0x00001091;
- FSMC_Bank1->BTCR[5] = 0x00110212;
+ FSMC_Bank1->BTCR[4U] = 0x00001091U;
+ FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f301x8.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f301x8.h
index f226230e37..a20c44ef2e 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f301x8.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f301x8.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f301x8.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F301x8 Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -3541,9 +3539,19 @@ typedef struct
#define EXTI_IMR2_IM35 EXTI_IMR2_MR35
#endif
+#if defined(EXTI_IMR2_MR33) && defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
#define EXTI_IMR2_IM_Pos (0U)
#define EXTI_IMR2_IM_Msk (0xFU << EXTI_IMR2_IM_Pos) /*!< 0x0000000F */
#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#elif defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0xDU << EXTI_IMR2_IM_Pos) /*!< 0x0000000D */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#else
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0x1U << EXTI_IMR2_IM_Pos) /*!< 0x00000001 */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#endif
/******************* Bit definition for EXTI_EMR2 ****************************/
#define EXTI_EMR2_MR32_Pos (0U)
@@ -3562,6 +3570,20 @@ typedef struct
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
#endif
+#if defined(EXTI_EMR2_MR33) && defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#elif defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xDU << EXTI_EMR2_EM_Pos) /*!< 0x0000000D */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#else
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0x1U << EXTI_EMR2_EM_Pos) /*!< 0x00000001 */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#endif
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -3811,21 +3833,6 @@ typedef struct
#define OB_WRP1_nWRP1_Msk (0xFFU << OB_WRP1_nWRP1_Pos) /*!< 0xFF000000 */
#define OB_WRP1_nWRP1 OB_WRP1_nWRP1_Msk /*!< Flash memory write protection complemented option bytes */
-/****************** Bit definition for FLASH_WRP2 register ******************/
-#define OB_WRP2_WRP2_Pos (0U)
-#define OB_WRP2_WRP2_Msk (0xFFU << OB_WRP2_WRP2_Pos) /*!< 0x000000FF */
-#define OB_WRP2_WRP2 OB_WRP2_WRP2_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP2_nWRP2_Pos (8U)
-#define OB_WRP2_nWRP2_Msk (0xFFU << OB_WRP2_nWRP2_Pos) /*!< 0x0000FF00 */
-#define OB_WRP2_nWRP2 OB_WRP2_nWRP2_Msk /*!< Flash memory write protection complemented option bytes */
-
-/****************** Bit definition for FLASH_WRP3 register ******************/
-#define OB_WRP3_WRP3_Pos (16U)
-#define OB_WRP3_WRP3_Msk (0xFFU << OB_WRP3_WRP3_Pos) /*!< 0x00FF0000 */
-#define OB_WRP3_WRP3 OB_WRP3_WRP3_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP3_nWRP3_Pos (24U)
-#define OB_WRP3_nWRP3_Msk (0xFFU << OB_WRP3_nWRP3_Pos) /*!< 0xFF000000 */
-#define OB_WRP3_nWRP3 OB_WRP3_nWRP3_Msk /*!< Flash memory write protection complemented option bytes */
/******************************************************************************/
/* */
@@ -5442,9 +5449,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -5494,6 +5501,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h
index 0d203c7fb3..b5753c5b1d 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302x8.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f302x8.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F302x8 Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7137,9 +7135,19 @@ typedef struct
#define EXTI_IMR2_IM35 EXTI_IMR2_MR35
#endif
+#if defined(EXTI_IMR2_MR33) && defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
#define EXTI_IMR2_IM_Pos (0U)
#define EXTI_IMR2_IM_Msk (0xFU << EXTI_IMR2_IM_Pos) /*!< 0x0000000F */
#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#elif defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0xDU << EXTI_IMR2_IM_Pos) /*!< 0x0000000D */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#else
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0x1U << EXTI_IMR2_IM_Pos) /*!< 0x00000001 */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#endif
/******************* Bit definition for EXTI_EMR2 ****************************/
#define EXTI_EMR2_MR32_Pos (0U)
@@ -7158,6 +7166,20 @@ typedef struct
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
#endif
+#if defined(EXTI_EMR2_MR33) && defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#elif defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xDU << EXTI_EMR2_EM_Pos) /*!< 0x0000000D */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#else
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0x1U << EXTI_EMR2_EM_Pos) /*!< 0x00000001 */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#endif
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -7407,21 +7429,6 @@ typedef struct
#define OB_WRP1_nWRP1_Msk (0xFFU << OB_WRP1_nWRP1_Pos) /*!< 0xFF000000 */
#define OB_WRP1_nWRP1 OB_WRP1_nWRP1_Msk /*!< Flash memory write protection complemented option bytes */
-/****************** Bit definition for FLASH_WRP2 register ******************/
-#define OB_WRP2_WRP2_Pos (0U)
-#define OB_WRP2_WRP2_Msk (0xFFU << OB_WRP2_WRP2_Pos) /*!< 0x000000FF */
-#define OB_WRP2_WRP2 OB_WRP2_WRP2_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP2_nWRP2_Pos (8U)
-#define OB_WRP2_nWRP2_Msk (0xFFU << OB_WRP2_nWRP2_Pos) /*!< 0x0000FF00 */
-#define OB_WRP2_nWRP2 OB_WRP2_nWRP2_Msk /*!< Flash memory write protection complemented option bytes */
-
-/****************** Bit definition for FLASH_WRP3 register ******************/
-#define OB_WRP3_WRP3_Pos (16U)
-#define OB_WRP3_WRP3_Msk (0xFFU << OB_WRP3_WRP3_Pos) /*!< 0x00FF0000 */
-#define OB_WRP3_WRP3 OB_WRP3_WRP3_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP3_nWRP3_Pos (24U)
-#define OB_WRP3_nWRP3_Msk (0xFFU << OB_WRP3_nWRP3_Pos) /*!< 0xFF000000 */
-#define OB_WRP3_nWRP3 OB_WRP3_nWRP3_Msk /*!< Flash memory write protection complemented option bytes */
/******************************************************************************/
/* */
@@ -9058,9 +9065,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -9110,6 +9117,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h
index 68e6441e42..807124fcc7 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f302xc.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F302xC Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7343,9 +7341,15 @@ typedef struct
#define EXTI_IMR2_IM34 EXTI_IMR2_MR34
#define EXTI_IMR2_IM35 EXTI_IMR2_MR35
+#if defined(EXTI_IMR2_MR33)
#define EXTI_IMR2_IM_Pos (0U)
#define EXTI_IMR2_IM_Msk (0xFU << EXTI_IMR2_IM_Pos) /*!< 0x0000000F */
#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#else
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0xDU << EXTI_IMR2_IM_Pos) /*!< 0x0000000D */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#endif
/******************* Bit definition for EXTI_EMR2 ****************************/
#define EXTI_EMR2_MR32_Pos (0U)
@@ -7366,6 +7370,16 @@ typedef struct
#define EXTI_EMR2_EM34 EXTI_EMR2_MR34
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
+#if defined(EXTI_EMR2_MR33)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#else
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xDU << EXTI_EMR2_EM_Pos) /*!< 0x0000000D */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#endif
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -9295,9 +9309,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -9347,6 +9361,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xe.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xe.h
index 484c51b43b..754bab04e8 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xe.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xe.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f302xe.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F302xE Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7371,9 +7369,15 @@ typedef struct
#define EXTI_IMR2_IM34 EXTI_IMR2_MR34
#define EXTI_IMR2_IM35 EXTI_IMR2_MR35
+#if defined(EXTI_IMR2_MR33)
#define EXTI_IMR2_IM_Pos (0U)
#define EXTI_IMR2_IM_Msk (0xFU << EXTI_IMR2_IM_Pos) /*!< 0x0000000F */
#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#else
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0xDU << EXTI_IMR2_IM_Pos) /*!< 0x0000000D */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#endif
/******************* Bit definition for EXTI_EMR2 ****************************/
#define EXTI_EMR2_MR32_Pos (0U)
@@ -7394,6 +7398,16 @@ typedef struct
#define EXTI_EMR2_EM34 EXTI_EMR2_MR34
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
+#if defined(EXTI_EMR2_MR33)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#else
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xDU << EXTI_EMR2_EM_Pos) /*!< 0x0000000D */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#endif
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -10974,9 +10988,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -11026,6 +11040,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303x8.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303x8.h
index 4f5c2f5a20..2a4b8cc7eb 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303x8.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303x8.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f303x8.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F303x8 Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7151,9 +7149,19 @@ typedef struct
#define EXTI_IMR2_IM35 EXTI_IMR2_MR35
#endif
+#if defined(EXTI_IMR2_MR33) && defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
#define EXTI_IMR2_IM_Pos (0U)
#define EXTI_IMR2_IM_Msk (0xFU << EXTI_IMR2_IM_Pos) /*!< 0x0000000F */
#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#elif defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0xDU << EXTI_IMR2_IM_Pos) /*!< 0x0000000D */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#else
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0x1U << EXTI_IMR2_IM_Pos) /*!< 0x00000001 */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#endif
/******************* Bit definition for EXTI_EMR2 ****************************/
#define EXTI_EMR2_MR32_Pos (0U)
@@ -7172,6 +7180,20 @@ typedef struct
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
#endif
+#if defined(EXTI_EMR2_MR33) && defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#elif defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xDU << EXTI_EMR2_EM_Pos) /*!< 0x0000000D */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#else
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0x1U << EXTI_EMR2_EM_Pos) /*!< 0x00000001 */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#endif
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -7421,21 +7443,6 @@ typedef struct
#define OB_WRP1_nWRP1_Msk (0xFFU << OB_WRP1_nWRP1_Pos) /*!< 0xFF000000 */
#define OB_WRP1_nWRP1 OB_WRP1_nWRP1_Msk /*!< Flash memory write protection complemented option bytes */
-/****************** Bit definition for FLASH_WRP2 register ******************/
-#define OB_WRP2_WRP2_Pos (0U)
-#define OB_WRP2_WRP2_Msk (0xFFU << OB_WRP2_WRP2_Pos) /*!< 0x000000FF */
-#define OB_WRP2_WRP2 OB_WRP2_WRP2_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP2_nWRP2_Pos (8U)
-#define OB_WRP2_nWRP2_Msk (0xFFU << OB_WRP2_nWRP2_Pos) /*!< 0x0000FF00 */
-#define OB_WRP2_nWRP2 OB_WRP2_nWRP2_Msk /*!< Flash memory write protection complemented option bytes */
-
-/****************** Bit definition for FLASH_WRP3 register ******************/
-#define OB_WRP3_WRP3_Pos (16U)
-#define OB_WRP3_WRP3_Msk (0xFFU << OB_WRP3_WRP3_Pos) /*!< 0x00FF0000 */
-#define OB_WRP3_WRP3 OB_WRP3_WRP3_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP3_nWRP3_Pos (24U)
-#define OB_WRP3_nWRP3_Msk (0xFFU << OB_WRP3_nWRP3_Pos) /*!< 0xFF000000 */
-#define OB_WRP3_nWRP3 OB_WRP3_nWRP3_Msk /*!< Flash memory write protection complemented option bytes */
/******************************************************************************/
/* */
@@ -9012,9 +9019,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -9064,6 +9071,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
@@ -9605,12 +9617,6 @@ typedef struct
#define SPI_SR_TXE_Pos (1U)
#define SPI_SR_TXE_Msk (0x1U << SPI_SR_TXE_Pos) /*!< 0x00000002 */
#define SPI_SR_TXE SPI_SR_TXE_Msk /*!< Transmit buffer Empty */
-#define SPI_SR_CHSIDE_Pos (2U)
-#define SPI_SR_CHSIDE_Msk (0x1U << SPI_SR_CHSIDE_Pos) /*!< 0x00000004 */
-#define SPI_SR_CHSIDE SPI_SR_CHSIDE_Msk /*!< Channel side */
-#define SPI_SR_UDR_Pos (3U)
-#define SPI_SR_UDR_Msk (0x1U << SPI_SR_UDR_Pos) /*!< 0x00000008 */
-#define SPI_SR_UDR SPI_SR_UDR_Msk /*!< Underrun flag */
#define SPI_SR_CRCERR_Pos (4U)
#define SPI_SR_CRCERR_Msk (0x1U << SPI_SR_CRCERR_Pos) /*!< 0x00000010 */
#define SPI_SR_CRCERR SPI_SR_CRCERR_Msk /*!< CRC Error flag */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h
index 35f1d3a2ea..ec70ffd225 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xc.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f303xc.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F303xC Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7911,6 +7909,10 @@ typedef struct
#define EXTI_EMR2_EM34 EXTI_EMR2_MR34
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -9897,9 +9899,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -9949,6 +9951,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xe.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xe.h
index 44520de449..6e1348b119 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xe.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f303xe.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f303xe.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F303xE Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7917,6 +7915,10 @@ typedef struct
#define EXTI_EMR2_EM34 EXTI_EMR2_MR34
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -11562,9 +11564,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -11614,6 +11616,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f318xx.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f318xx.h
index f59f855ebd..d732bb6d2b 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f318xx.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f318xx.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f318xx.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F318xx Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -3540,9 +3538,19 @@ typedef struct
#define EXTI_IMR2_IM35 EXTI_IMR2_MR35
#endif
+#if defined(EXTI_IMR2_MR33) && defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
#define EXTI_IMR2_IM_Pos (0U)
#define EXTI_IMR2_IM_Msk (0xFU << EXTI_IMR2_IM_Pos) /*!< 0x0000000F */
#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#elif defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0xDU << EXTI_IMR2_IM_Pos) /*!< 0x0000000D */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#else
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0x1U << EXTI_IMR2_IM_Pos) /*!< 0x00000001 */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#endif
/******************* Bit definition for EXTI_EMR2 ****************************/
#define EXTI_EMR2_MR32_Pos (0U)
@@ -3561,6 +3569,20 @@ typedef struct
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
#endif
+#if defined(EXTI_EMR2_MR33) && defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#elif defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xDU << EXTI_EMR2_EM_Pos) /*!< 0x0000000D */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#else
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0x1U << EXTI_EMR2_EM_Pos) /*!< 0x00000001 */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#endif
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -5415,9 +5437,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -5467,6 +5489,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f328xx.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f328xx.h
index 768c7fab08..a743cc3774 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f328xx.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f328xx.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f328xx.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F328xx Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7150,9 +7148,19 @@ typedef struct
#define EXTI_IMR2_IM35 EXTI_IMR2_MR35
#endif
+#if defined(EXTI_IMR2_MR33) && defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
#define EXTI_IMR2_IM_Pos (0U)
#define EXTI_IMR2_IM_Msk (0xFU << EXTI_IMR2_IM_Pos) /*!< 0x0000000F */
#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#elif defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0xDU << EXTI_IMR2_IM_Pos) /*!< 0x0000000D */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#else
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0x1U << EXTI_IMR2_IM_Pos) /*!< 0x00000001 */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#endif
/******************* Bit definition for EXTI_EMR2 ****************************/
#define EXTI_EMR2_MR32_Pos (0U)
@@ -7171,6 +7179,20 @@ typedef struct
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
#endif
+#if defined(EXTI_EMR2_MR33) && defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#elif defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xDU << EXTI_EMR2_EM_Pos) /*!< 0x0000000D */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#else
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0x1U << EXTI_EMR2_EM_Pos) /*!< 0x00000001 */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#endif
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -7420,21 +7442,6 @@ typedef struct
#define OB_WRP1_nWRP1_Msk (0xFFU << OB_WRP1_nWRP1_Pos) /*!< 0xFF000000 */
#define OB_WRP1_nWRP1 OB_WRP1_nWRP1_Msk /*!< Flash memory write protection complemented option bytes */
-/****************** Bit definition for FLASH_WRP2 register ******************/
-#define OB_WRP2_WRP2_Pos (0U)
-#define OB_WRP2_WRP2_Msk (0xFFU << OB_WRP2_WRP2_Pos) /*!< 0x000000FF */
-#define OB_WRP2_WRP2 OB_WRP2_WRP2_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP2_nWRP2_Pos (8U)
-#define OB_WRP2_nWRP2_Msk (0xFFU << OB_WRP2_nWRP2_Pos) /*!< 0x0000FF00 */
-#define OB_WRP2_nWRP2 OB_WRP2_nWRP2_Msk /*!< Flash memory write protection complemented option bytes */
-
-/****************** Bit definition for FLASH_WRP3 register ******************/
-#define OB_WRP3_WRP3_Pos (16U)
-#define OB_WRP3_WRP3_Msk (0xFFU << OB_WRP3_WRP3_Pos) /*!< 0x00FF0000 */
-#define OB_WRP3_WRP3 OB_WRP3_WRP3_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP3_nWRP3_Pos (24U)
-#define OB_WRP3_nWRP3_Msk (0xFFU << OB_WRP3_nWRP3_Pos) /*!< 0xFF000000 */
-#define OB_WRP3_nWRP3 OB_WRP3_nWRP3_Msk /*!< Flash memory write protection complemented option bytes */
/******************************************************************************/
/* */
@@ -8985,9 +8992,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -9037,6 +9044,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
@@ -9578,12 +9590,6 @@ typedef struct
#define SPI_SR_TXE_Pos (1U)
#define SPI_SR_TXE_Msk (0x1U << SPI_SR_TXE_Pos) /*!< 0x00000002 */
#define SPI_SR_TXE SPI_SR_TXE_Msk /*!< Transmit buffer Empty */
-#define SPI_SR_CHSIDE_Pos (2U)
-#define SPI_SR_CHSIDE_Msk (0x1U << SPI_SR_CHSIDE_Pos) /*!< 0x00000004 */
-#define SPI_SR_CHSIDE SPI_SR_CHSIDE_Msk /*!< Channel side */
-#define SPI_SR_UDR_Pos (3U)
-#define SPI_SR_UDR_Msk (0x1U << SPI_SR_UDR_Pos) /*!< 0x00000008 */
-#define SPI_SR_UDR SPI_SR_UDR_Msk /*!< Underrun flag */
#define SPI_SR_CRCERR_Pos (4U)
#define SPI_SR_CRCERR_Msk (0x1U << SPI_SR_CRCERR_Pos) /*!< 0x00000010 */
#define SPI_SR_CRCERR SPI_SR_CRCERR_Msk /*!< CRC Error flag */
@@ -9966,15 +9972,6 @@ typedef struct
#define SYSCFG_CFGR3_ADC2_DMA_RMP SYSCFG_CFGR3_ADC2_DMA_RMP_Msk /*!< ADC2 DMA remap */
#define SYSCFG_CFGR3_ADC2_DMA_RMP_0 (0x1U << SYSCFG_CFGR3_ADC2_DMA_RMP_Pos) /*!< 0x00000100 */
#define SYSCFG_CFGR3_ADC2_DMA_RMP_1 (0x2U << SYSCFG_CFGR3_ADC2_DMA_RMP_Pos) /*!< 0x00000200 */
-#define SYSCFG_CFGR3_TRIGGER_RMP_Pos (16U)
-#define SYSCFG_CFGR3_TRIGGER_RMP_Msk (0x3U << SYSCFG_CFGR3_TRIGGER_RMP_Pos) /*!< 0x00030000 */
-#define SYSCFG_CFGR3_TRIGGER_RMP SYSCFG_CFGR3_TRIGGER_RMP_Msk /*!< Trigger remap mask */
-#define SYSCFG_CFGR3_DAC1_TRG3_RMP_Pos (16U)
-#define SYSCFG_CFGR3_DAC1_TRG3_RMP_Msk (0x1U << SYSCFG_CFGR3_DAC1_TRG3_RMP_Pos) /*!< 0x00010000 */
-#define SYSCFG_CFGR3_DAC1_TRG3_RMP SYSCFG_CFGR3_DAC1_TRG3_RMP_Msk /*!< DAC1 TRG3 remap */
-#define SYSCFG_CFGR3_DAC1_TRG5_RMP_Pos (17U)
-#define SYSCFG_CFGR3_DAC1_TRG5_RMP_Msk (0x1U << SYSCFG_CFGR3_DAC1_TRG5_RMP_Pos) /*!< 0x00020000 */
-#define SYSCFG_CFGR3_DAC1_TRG5_RMP SYSCFG_CFGR3_DAC1_TRG5_RMP_Msk /*!< DAC1 TRG5 remap */
/******************************************************************************/
/* */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f334x8.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f334x8.h
index cf075c5c3e..4101bac424 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f334x8.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f334x8.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f334x8.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F334x8 Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7339,9 +7337,19 @@ typedef struct
#define EXTI_IMR2_IM35 EXTI_IMR2_MR35
#endif
+#if defined(EXTI_IMR2_MR33) && defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0xFU << EXTI_IMR2_IM_Pos) /*!< 0x0000000F */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#elif defined(EXTI_IMR2_MR34) && defined(EXTI_IMR2_MR35)
+#define EXTI_IMR2_IM_Pos (0U)
+#define EXTI_IMR2_IM_Msk (0xDU << EXTI_IMR2_IM_Pos) /*!< 0x0000000D */
+#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#else
#define EXTI_IMR2_IM_Pos (0U)
#define EXTI_IMR2_IM_Msk (0x1U << EXTI_IMR2_IM_Pos) /*!< 0x00000001 */
#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk
+#endif
/******************* Bit definition for EXTI_EMR2 ****************************/
#define EXTI_EMR2_MR32_Pos (0U)
@@ -7360,6 +7368,20 @@ typedef struct
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
#endif
+#if defined(EXTI_EMR2_MR33) && defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#elif defined(EXTI_EMR2_MR34) && defined(EXTI_EMR2_MR35)
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xDU << EXTI_EMR2_EM_Pos) /*!< 0x0000000D */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#else
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0x1U << EXTI_EMR2_EM_Pos) /*!< 0x00000001 */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+#endif
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -7609,21 +7631,6 @@ typedef struct
#define OB_WRP1_nWRP1_Msk (0xFFU << OB_WRP1_nWRP1_Pos) /*!< 0xFF000000 */
#define OB_WRP1_nWRP1 OB_WRP1_nWRP1_Msk /*!< Flash memory write protection complemented option bytes */
-/****************** Bit definition for FLASH_WRP2 register ******************/
-#define OB_WRP2_WRP2_Pos (0U)
-#define OB_WRP2_WRP2_Msk (0xFFU << OB_WRP2_WRP2_Pos) /*!< 0x000000FF */
-#define OB_WRP2_WRP2 OB_WRP2_WRP2_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP2_nWRP2_Pos (8U)
-#define OB_WRP2_nWRP2_Msk (0xFFU << OB_WRP2_nWRP2_Pos) /*!< 0x0000FF00 */
-#define OB_WRP2_nWRP2 OB_WRP2_nWRP2_Msk /*!< Flash memory write protection complemented option bytes */
-
-/****************** Bit definition for FLASH_WRP3 register ******************/
-#define OB_WRP3_WRP3_Pos (16U)
-#define OB_WRP3_WRP3_Msk (0xFFU << OB_WRP3_WRP3_Pos) /*!< 0x00FF0000 */
-#define OB_WRP3_WRP3 OB_WRP3_WRP3_Msk /*!< Flash memory write protection option bytes */
-#define OB_WRP3_nWRP3_Pos (24U)
-#define OB_WRP3_nWRP3_Msk (0xFFU << OB_WRP3_nWRP3_Pos) /*!< 0xFF000000 */
-#define OB_WRP3_nWRP3 OB_WRP3_nWRP3_Msk /*!< Flash memory write protection complemented option bytes */
/******************************************************************************/
/* */
@@ -11958,9 +11965,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -12010,6 +12017,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
@@ -12551,12 +12563,6 @@ typedef struct
#define SPI_SR_TXE_Pos (1U)
#define SPI_SR_TXE_Msk (0x1U << SPI_SR_TXE_Pos) /*!< 0x00000002 */
#define SPI_SR_TXE SPI_SR_TXE_Msk /*!< Transmit buffer Empty */
-#define SPI_SR_CHSIDE_Pos (2U)
-#define SPI_SR_CHSIDE_Msk (0x1U << SPI_SR_CHSIDE_Pos) /*!< 0x00000004 */
-#define SPI_SR_CHSIDE SPI_SR_CHSIDE_Msk /*!< Channel side */
-#define SPI_SR_UDR_Pos (3U)
-#define SPI_SR_UDR_Msk (0x1U << SPI_SR_UDR_Pos) /*!< 0x00000008 */
-#define SPI_SR_UDR SPI_SR_UDR_Msk /*!< Underrun flag */
#define SPI_SR_CRCERR_Pos (4U)
#define SPI_SR_CRCERR_Msk (0x1U << SPI_SR_CRCERR_Pos) /*!< 0x00000010 */
#define SPI_SR_CRCERR SPI_SR_CRCERR_Msk /*!< CRC Error flag */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f358xx.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f358xx.h
index b33054fd57..b2518d8006 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f358xx.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f358xx.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f358xx.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F358xx Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7863,6 +7861,10 @@ typedef struct
#define EXTI_EMR2_EM34 EXTI_EMR2_MR34
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -9806,9 +9808,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -9858,6 +9860,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f373xc.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f373xc.h
index 4a5545a70d..47025d87d6 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f373xc.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f373xc.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f373xc.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F373xC Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -8374,9 +8372,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -8426,6 +8424,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f378xx.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f378xx.h
index 35e2c1adeb..fdede2a040 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f378xx.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f378xx.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f378xx.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F378xx Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -8287,9 +8285,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -8339,6 +8337,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f398xx.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f398xx.h
index 295d3c5a95..5972d1fa44 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f398xx.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f398xx.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f398xx.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F398xx Devices Peripheral Access Layer Header File.
*
* This file contains:
@@ -7867,6 +7865,10 @@ typedef struct
#define EXTI_EMR2_EM34 EXTI_EMR2_MR34
#define EXTI_EMR2_EM35 EXTI_EMR2_MR35
+#define EXTI_EMR2_EM_Pos (0U)
+#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */
+#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk
+
/****************** Bit definition for EXTI_RTSR2 register ********************/
#define EXTI_RTSR2_TR32_Pos (0U)
#define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */
@@ -11469,9 +11471,9 @@ typedef struct
#define RTC_CR_COSEL_Pos (19U)
#define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */
#define RTC_CR_COSEL RTC_CR_COSEL_Msk
-#define RTC_CR_BCK_Pos (18U)
-#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */
-#define RTC_CR_BCK RTC_CR_BCK_Msk
+#define RTC_CR_BKP_Pos (18U)
+#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */
+#define RTC_CR_BKP RTC_CR_BKP_Msk
#define RTC_CR_SUB1H_Pos (17U)
#define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */
#define RTC_CR_SUB1H RTC_CR_SUB1H_Msk
@@ -11521,6 +11523,11 @@ typedef struct
#define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */
#define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */
+/* Legacy defines */
+#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos
+#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk
+#define RTC_CR_BCK RTC_CR_BKP
+
/******************** Bits definition for RTC_ISR register ******************/
#define RTC_ISR_RECALPF_Pos (16U)
#define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h
index bca50c7d14..012868e7c3 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f3xx.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS STM32F3xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
@@ -121,11 +119,11 @@
#endif /* USE_HAL_DRIVER */
/**
- * @brief CMSIS Device version number V2.3.1
+ * @brief CMSIS Device version number V2.3.2
*/
#define __STM32F3_CMSIS_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F3_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
-#define __STM32F3_CMSIS_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
+#define __STM32F3_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32F3_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F3_CMSIS_VERSION ((__STM32F3_CMSIS_VERSION_MAIN << 24)\
|(__STM32F3_CMSIS_VERSION_SUB1 << 16)\
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h
index d17cd7dc76..3670bcffbc 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/system_stm32f3xx.h
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f3xx.h
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS Cortex-M4 Device System Source File for STM32F3xx devices.
******************************************************************************
* @attention
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Release_Notes.html b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Release_Notes.html
index 4f194f63ca..ebe2c8fe27 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Release_Notes.html
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Release_Notes.html
@@ -1,4 +1,4 @@
-
+
@@ -87,7 +87,9 @@
Update History
- V2.3.1 / 16-December-2016 Main
+ V2.3.2 / 23-June-2017 Main
+Changes
+Remove support of Atollic TrueSTUDIO STM32 (TrueSTUDIO) toolchain. FLASH updates Clean-up OB_WRP2_nWRP2 && OB_WRP2_nWRP3 (Option Byte) definitions according to family diversity. RTC updates Renamed RTC_CR_BCK to RTC_CR_BKP in RTC_CR register in order to be aligned with STM32F3xx Reference Manual. SYSCFG updates Removed SYSCFG_CFGR3_DAC1_TRG3, SYSCFG_CFGR3_DAC1_TRG5, SYSCFG_CFGR3_TRIGGER definitions for STM32F328xx devices. SPI updates Removed SPI_SR_CHSIDE, SPI_SR_UDR definitions for STM32F303x8, STM32F328xx, STM32F334x8 devices. EXTI updates Add EXTI_EMR2_EM definition. COMP updates Clean-up COMPx_CSR definitions according to family diversity. V2.3.1 / 16-December-2016 Main
Changes
COMP updates Corrected COMP inputs definition for STM32F3xxxx devices ADC updates Corrected SDADC_CONF1R_COMMON1_1 bit definition for STM32F373xC and STM32F378xx devices TIM updates Added macro IS_TIM_ADVANCED_INSTANCE() to identify advanced timer instances Remove
TIM_CR2_OIS2N, TIM_CR2_OIS3, TIM_CR2_OIS3N and
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F301X8_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F301X8_FLASH.ld
deleted file mode 100644
index 16920c26f8..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F301X8_FLASH.ld
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F301X8_FLASH.ld
-**
-** Abstract : Linker script for STM32F301x8 device with
-** 64-KByte FLASH, 16-KByte RAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20003FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302X8_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302X8_FLASH.ld
deleted file mode 100644
index b0109d88f2..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302X8_FLASH.ld
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F302X8_FLASH.ld
-**
-** Abstract : Linker script for STM32F302x8 device with
-** 64-KByte FLASH, 16-KByte RAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20003FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XC_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XC_FLASH.ld
deleted file mode 100644
index beeccfa96f..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XC_FLASH.ld
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F302XC_FLASH.ld
-**
-** Abstract : Linker script for STM32F302xC device with
-** 256-KByte FLASH, 32-KByte RAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20009FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XE_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XE_FLASH.ld
deleted file mode 100644
index b945851687..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F302XE_FLASH.ld
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F302XE_FLASH.ld
-**
-** Abstract : Linker script for STM32F303xE device with
-** 512-KByte FLASH, 64-KByte RAM, 16-KByte CCMRAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x2000FFFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303X8_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303X8_FLASH.ld
deleted file mode 100644
index 5743dc2f43..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303X8_FLASH.ld
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F303X8_FLASH.ld
-**
-** Abstract : Linker script for STM32F303x8 device with
-** 64-KByte FLASH, 16-KByte RAM, 4-KByte CCMRAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20002FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 12K
-CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 4K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
- _siccmram = LOADADDR(.ccmram);
-
- /* CCM-RAM section
- *
- * IMPORTANT NOTE!
- * If initialized variables will be placed in this section,
- * the startup code needs to be modified to copy the init-values.
- */
- .ccmram :
- {
- . = ALIGN(4);
- _sccmram = .; /* create a global symbol at ccmram start */
- *(.ccmram)
- *(.ccmram*)
-
- . = ALIGN(4);
- _eccmram = .; /* create a global symbol at ccmram end */
- } >CCMRAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XC_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XC_FLASH.ld
deleted file mode 100644
index 07bf754372..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XC_FLASH.ld
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F303XC_FLASH.ld
-**
-** Abstract : Linker script for STM32F303xC device with
-** 256-KByte FLASH, 40-KByte RAM, 8-KByte CCMRAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20009FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K
-CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 8K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
- _siccmram = LOADADDR(.ccmram);
-
- /* CCM-RAM section
- *
- * IMPORTANT NOTE!
- * If initialized variables will be placed in this section,
- * the startup code needs to be modified to copy the init-values.
- */
- .ccmram :
- {
- . = ALIGN(4);
- _sccmram = .; /* create a global symbol at ccmram start */
- *(.ccmram)
- *(.ccmram*)
-
- . = ALIGN(4);
- _eccmram = .; /* create a global symbol at ccmram end */
- } >CCMRAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XE_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XE_FLASH.ld
deleted file mode 100644
index 7b7593f58a..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F303XE_FLASH.ld
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F303XE_FLASH.ld
-**
-** Abstract : Linker script for STM32F303xE device with
-** 512-KByte FLASH, 64-KByte RAM, 16-KByte CCMRAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x2000FFFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
-CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 16K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
- _siccmram = LOADADDR(.ccmram);
-
- /* CCM-RAM section
- *
- * IMPORTANT NOTE!
- * If initialized variables will be placed in this section,
- * the startup code needs to be modified to copy the init-values.
- */
- .ccmram :
- {
- . = ALIGN(4);
- _sccmram = .; /* create a global symbol at ccmram start */
- *(.ccmram)
- *(.ccmram*)
-
- . = ALIGN(4);
- _eccmram = .; /* create a global symbol at ccmram end */
- } >CCMRAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F318XX_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F318XX_FLASH.ld
deleted file mode 100644
index 2505057633..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F318XX_FLASH.ld
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F318XX_FLASH.ld
-**
-** Abstract : Linker script for STM32F381xx device with
-** 64-KByte FLASH, 16-KByte RAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20003FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F328XX_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F328XX_FLASH.ld
deleted file mode 100644
index 7278951e77..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F328XX_FLASH.ld
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F328XX_FLASH.ld
-**
-** Abstract : Linker script for STM32F328xx device with
-** 64-KByte FLASH, 16-KByte RAM, 4-KByte CCMRAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20002FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 12K
-CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 4K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
- _siccmram = LOADADDR(.ccmram);
-
- /* CCM-RAM section
- *
- * IMPORTANT NOTE!
- * If initialized variables will be placed in this section,
- * the startup code needs to be modified to copy the init-values.
- */
- .ccmram :
- {
- . = ALIGN(4);
- _sccmram = .; /* create a global symbol at ccmram start */
- *(.ccmram)
- *(.ccmram*)
-
- . = ALIGN(4);
- _eccmram = .; /* create a global symbol at ccmram end */
- } >CCMRAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F334X8_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F334X8_FLASH.ld
deleted file mode 100644
index 9d0e34d68e..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F334X8_FLASH.ld
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F334X8_FLASH.ld
-**
-** Abstract : Linker script for STM32F334x8 device with
-** 64-KByte FLASH, 16-KByte RAM, 4-KByte CCMRAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20002FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 12K
-CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 4K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
- _siccmram = LOADADDR(.ccmram);
-
- /* CCM-RAM section
- *
- * IMPORTANT NOTE!
- * If initialized variables will be placed in this section,
- * the startup code needs to be modified to copy the init-values.
- */
- .ccmram :
- {
- . = ALIGN(4);
- _sccmram = .; /* create a global symbol at ccmram start */
- *(.ccmram)
- *(.ccmram*)
-
- . = ALIGN(4);
- _eccmram = .; /* create a global symbol at ccmram end */
- } >CCMRAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F358XX_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F358XX_FLASH.ld
deleted file mode 100644
index f5eed0d6ed..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F358XX_FLASH.ld
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F358XX_FLASH.ld
-**
-** Abstract : Linker script for STM32F358xx device with
-** 256-KByte FLASH, 40-KByte RAM, 8-KByte CCMRAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20009FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K
-CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 8K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
- _siccmram = LOADADDR(.ccmram);
-
- /* CCM-RAM section
- *
- * IMPORTANT NOTE!
- * If initialized variables will be placed in this section,
- * the startup code needs to be modified to copy the init-values.
- */
- .ccmram :
- {
- . = ALIGN(4);
- _sccmram = .; /* create a global symbol at ccmram start */
- *(.ccmram)
- *(.ccmram*)
-
- . = ALIGN(4);
- _eccmram = .; /* create a global symbol at ccmram end */
- } >CCMRAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F373XC_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F373XC_FLASH.ld
deleted file mode 100644
index 3cadbf058c..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F373XC_FLASH.ld
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F373XC_FLASH.ld
-**
-** Abstract : Linker script for STM32F373xC Device with
-** 256KByte FLASH, 32KByte RAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20007FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F378XX_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F378XX_FLASH.ld
deleted file mode 100644
index bf7f73f81f..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F378XX_FLASH.ld
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F378XX_FLASH.ld
-**
-** Abstract : Linker script for STM32F378xx Device with
-** 256KByte FLASH, 32KByte RAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20007FFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F398XX_FLASH.ld b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F398XX_FLASH.ld
deleted file mode 100644
index 278ba16c44..0000000000
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/linker/STM32F398XX_FLASH.ld
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : STM32F398XX_FLASH.ld
-**
-** Abstract : Linker script for STM32F398xx device with
-** 512-KByte FLASH, 64-KByte RAM, 16-KByte CCMRAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Environment : Atollic TrueSTUDIO(R)
-**
-** Distribution: The file is distributed “as is,” without any warranty
-** of any kind.
-**
-** (c)Copyright Atollic AB.
-** You may use this file as-is or modify it according to the needs of your
-** project. This file may only be built (assembled or compiled and linked)
-** using the Atollic TrueSTUDIO(R) product. The use of this file together
-** with other tools than Atollic TrueSTUDIO(R) is not permitted.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x2000FFFF; /* end of RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
-CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 16K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
- _siccmram = LOADADDR(.ccmram);
-
- /* CCM-RAM section
- *
- * IMPORTANT NOTE!
- * If initialized variables will be placed in this section,
- * the startup code needs to be modified to copy the init-values.
- */
- .ccmram :
- {
- . = ALIGN(4);
- _sccmram = .; /* create a global symbol at ccmram start */
- *(.ccmram)
- *(.ccmram*)
-
- . = ALIGN(4);
- _eccmram = .; /* create a global symbol at ccmram end */
- } >CCMRAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
-
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f301x8.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f301x8.s
index 0e5ee2485a..b858bc0955 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f301x8.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f301x8.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f301x8.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F301x6/STM32F301x8 devices vector table for
- * Atollic TrueSTUDIO toolchain.
+ * @brief STM32F301x6/STM32F301x8 devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302x8.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302x8.s
index c4d8c74943..06af18634a 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302x8.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302x8.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f302x8.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F302x6/STM32F302x8 devices vector table for
- * Atollic TrueSTUDIO toolchain.
+ * @brief STM32F302x6/STM32F302x8 devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302xc.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302xc.s
index 253575bedb..fee7707aa8 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302xc.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302xc.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f302xc.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F302xB/STM32F302xC devices vector table for Atollic
- * TrueSTUDIO toolchain.
+ * @brief STM32F302xB/STM32F302xC devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302xe.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302xe.s
index 3de41e67fa..3f1793d9bb 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302xe.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f302xe.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f302xe.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F302xE devices vector table for Atollic
- * TrueSTUDIO toolchain.
+ * @brief STM32F302xE devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303x8.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303x8.s
index d67d016d5e..64c71d5ef6 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303x8.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303x8.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f303x8.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F303x6/STM32F303x8 devices vector table for
- * Atollic TrueSTUDIO toolchain.
+ * @brief STM32F303x6/STM32F303x8 devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303xc.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303xc.s
index e876961bc3..22adab806d 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303xc.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303xc.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f303xc.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F303xB/STM32F303xC devices vector table for Atollic
- * TrueSTUDIO toolchain.
+ * @brief STM32F303xB/STM32F303xC devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303xe.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303xe.s
index 5d40f82154..8defa5c6c4 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303xe.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f303xe.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f303xe.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F303xE devices vector table for Atollic
- * TrueSTUDIO toolchain.
+ * @brief STM32F303xE devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f318xx.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f318xx.s
index efa89e2880..361f2bc28d 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f318xx.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f318xx.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f318xx.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F318xx device vector table for
- * Atollic TrueSTUDIO toolchain.
+ * @brief STM32F318xx device vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f328xx.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f328xx.s
index 4014588ba7..27ba9a18c9 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f328xx.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f328xx.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f328xx.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F328xx device vector table for
- * Atollic TrueSTUDIO toolchain.
+ * @brief STM32F328xx device vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f334x8.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f334x8.s
index 6ba740ef07..6582b96f78 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f334x8.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f334x8.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f334x8.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F334x4/STM32F334x6/STM32F334x8 devices vector table for
- * Atollic TrueSTUDIO toolchain.
+ * @brief STM32F334x4/STM32F334x6/STM32F334x8 devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f358xx.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f358xx.s
index e1d1b71449..6bf50fc7c8 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f358xx.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f358xx.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f358xx.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F358xx device vector table for Atollic
- * TrueSTUDIO toolchain.
+ * @brief STM32F358xx device vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f373xc.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f373xc.s
index 67c48a1a7e..33e9d2bbf4 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f373xc.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f373xc.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f373xc.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F373xB/STM32F373xC devices vector table for
- * Atollic TrueSTUDIO toolchain.
+ * @brief STM32F373xB/STM32F373xC devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f378xx.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f378xx.s
index 950f89706c..1a0091711c 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f378xx.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f378xx.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f378xx.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F378xx device vector table for
- * Atollic TrueSTUDIO toolchain.
+ * @brief STM32F378xx device vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f398xx.s b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f398xx.s
index b70a08ad2a..1c89f21451 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f398xx.s
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/startup_stm32f398xx.s
@@ -2,10 +2,7 @@
******************************************************************************
* @file startup_stm32f398xx.s
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
- * @brief STM32F398xx devices vector table for Atollic
- * TrueSTUDIO toolchain.
+ * @brief STM32F398xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
diff --git a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c
index 92dfd33343..895a710619 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c
+++ b/system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/system_stm32f3xx.c
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f3xx.c
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
diff --git a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md
index 3cba135694..e031949d76 100644
--- a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md
+++ b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md
@@ -1,9 +1,9 @@
# STM32YYxx CMSIS version:
* STM32F0: 2.3.3
- * STM32F1: 4.1.0
+ * STM32F1: 4.2.0
* STM32F2: 2.2.1
- * STM32F3: 2.3.1
+ * STM32F3: 2.3.2
* STM32F4: 2.6.2
* STM32F7: 1.2.1
* STM32L0: 1.7.2
diff --git a/system/STM32F0xx/system_stm32f0xx.c b/system/STM32F0xx/system_stm32f0xx.c
index 71a519bfd8..36b4652529 100644
--- a/system/STM32F0xx/system_stm32f0xx.c
+++ b/system/STM32F0xx/system_stm32f0xx.c
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f0xx.c
* @author MCD Application Team
- * @version V2.3.1
- * @date 04-November-2016
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
@@ -135,7 +133,7 @@
call the 2 first functions listed above, since SystemCoreClock variable is
updated automatically.
*/
-uint32_t SystemCoreClock = F_CPU;
+uint32_t SystemCoreClock = 8000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
diff --git a/system/STM32F1xx/system_stm32f1xx.c b/system/STM32F1xx/system_stm32f1xx.c
index a582b704d1..f70ca97e2f 100644
--- a/system/STM32F1xx/system_stm32f1xx.c
+++ b/system/STM32F1xx/system_stm32f1xx.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
- * @version V4.1.0
- * @date 29-April-2016
+ * @version V4.2.0
+ * @date 31-March-2017
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
@@ -35,7 +35,7 @@
******************************************************************************
* @attention
*
- * © COPYRIGHT(c) 2016 STMicroelectronics
+ * © COPYRIGHT(c) 2017 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -93,12 +93,12 @@
*/
#if !defined (HSE_VALUE)
- #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
+ #define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
- #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
+ #define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
@@ -111,7 +111,7 @@
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#ifndef VECT_TAB_OFFSET
-#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field.
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif
@@ -135,10 +135,14 @@
/*******************************************************************************
* Clock Definitions
*******************************************************************************/
-uint32_t SystemCoreClock = F_CPU; /*!< System Clock Frequency (Core Clock) */
+#if defined(STM32F100xB) ||defined(STM32F100xE)
+ uint32_t SystemCoreClock = 24000000U; /*!< System Clock Frequency (Core Clock) */
+#else /*!< HSI Selected as System Clock source */
+ uint32_t SystemCoreClock = 72000000U; /*!< System Clock Frequency (Core Clock) */
+#endif
-const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
+const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
@@ -174,42 +178,42 @@ void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
- RCC->CR |= (uint32_t)0x00000001;
+ RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
- RCC->CFGR &= (uint32_t)0xF8FF0000;
+ RCC->CFGR &= 0xF8FF0000U;
#else
- RCC->CFGR &= (uint32_t)0xF0FF0000;
+ RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
- RCC->CR &= (uint32_t)0xFEF6FFFF;
+ RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
- RCC->CR &= (uint32_t)0xFFFBFFFF;
+ RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
- RCC->CFGR &= (uint32_t)0xFF80FFFF;
+ RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
- RCC->CR &= (uint32_t)0xEBFFFFFF;
+ RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
- RCC->CIR = 0x00FF0000;
+ RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
- RCC->CFGR2 = 0x00000000;
+ RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
- RCC->CIR = 0x009F0000;
+ RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
- RCC->CFGR2 = 0x00000000;
+ RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
- RCC->CIR = 0x009F0000;
+ RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
@@ -262,14 +266,14 @@ void SystemInit (void)
*/
void SystemCoreClockUpdate (void)
{
- uint32_t tmp = 0, pllmull = 0, pllsource = 0;
+ uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
- uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0;
+ uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
- uint32_t prediv1factor = 0;
+ uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
@@ -277,37 +281,37 @@ void SystemCoreClockUpdate (void)
switch (tmp)
{
- case 0x00: /* HSI used as system clock */
+ case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
- case 0x04: /* HSE used as system clock */
+ case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
- case 0x08: /* PLL used as system clock */
+ case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
- pllmull = ( pllmull >> 18) + 2;
+ pllmull = ( pllmull >> 18U) + 2U;
- if (pllsource == 0x00)
+ if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
- SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
+ SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
- prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
+ prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
- SystemCoreClock = (HSE_VALUE >> 1) * pllmull;
+ SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
@@ -316,30 +320,30 @@ void SystemCoreClockUpdate (void)
#endif
}
#else
- pllmull = pllmull >> 18;
+ pllmull = pllmull >> 18U;
- if (pllmull != 0x0D)
+ if (pllmull != 0x0DU)
{
- pllmull += 2;
+ pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
- pllmull = 13 / 2;
+ pllmull = 13U / 2U;
}
- if (pllsource == 0x00)
+ if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
- SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
+ SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
- prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
+ prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
- if (prediv1source == 0)
+ if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
@@ -348,8 +352,8 @@ void SystemCoreClockUpdate (void)
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
- prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1;
- pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2;
+ prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
+ pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
@@ -363,7 +367,7 @@ void SystemCoreClockUpdate (void)
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
- tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
@@ -392,13 +396,13 @@ void SystemInit_ExtMemCtl(void)
required, then adjust the Register Addresses */
/* Enable FSMC clock */
- RCC->AHBENR = 0x00000114;
+ RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
- RCC->APB2ENR = 0x000001E0;
+ RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
@@ -411,23 +415,23 @@ void SystemInit_ExtMemCtl(void)
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
- GPIOD->CRL = 0x44BB44BB;
- GPIOD->CRH = 0xBBBBBBBB;
+ GPIOD->CRL = 0x44BB44BBU;
+ GPIOD->CRH = 0xBBBBBBBBU;
- GPIOE->CRL = 0xB44444BB;
- GPIOE->CRH = 0xBBBBBBBB;
+ GPIOE->CRL = 0xB44444BBU;
+ GPIOE->CRH = 0xBBBBBBBBU;
- GPIOF->CRL = 0x44BBBBBB;
- GPIOF->CRH = 0xBBBB4444;
+ GPIOF->CRL = 0x44BBBBBBU;
+ GPIOF->CRH = 0xBBBB4444U;
- GPIOG->CRL = 0x44BBBBBB;
- GPIOG->CRH = 0x444B4B44;
+ GPIOG->CRL = 0x44BBBBBBU;
+ GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
- FSMC_Bank1->BTCR[4] = 0x00001091;
- FSMC_Bank1->BTCR[5] = 0x00110212;
+ FSMC_Bank1->BTCR[4U] = 0x00001091U;
+ FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
diff --git a/system/STM32F2xx/system_stm32f2xx.c b/system/STM32F2xx/system_stm32f2xx.c
index ad8ba038b1..d5849d637a 100644
--- a/system/STM32F2xx/system_stm32f2xx.c
+++ b/system/STM32F2xx/system_stm32f2xx.c
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f2xx.c
* @author MCD Application Team
- * @version V2.2.0
- * @date 17-March-2017
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
@@ -123,7 +121,7 @@
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
- uint32_t SystemCoreClock = F_CPU;
+ uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
diff --git a/system/STM32F3xx/system_stm32f3xx.c b/system/STM32F3xx/system_stm32f3xx.c
index bacedd5249..895a710619 100644
--- a/system/STM32F3xx/system_stm32f3xx.c
+++ b/system/STM32F3xx/system_stm32f3xx.c
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f3xx.c
* @author MCD Application Team
- * @version V2.3.1
- * @date 16-December-2016
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
@@ -140,7 +138,7 @@
call the 2 first functions listed above, since SystemCoreClock variable is
updated automatically.
*/
-uint32_t SystemCoreClock = F_CPU;
+uint32_t SystemCoreClock = 8000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
diff --git a/system/STM32F4xx/system_stm32f4xx.c b/system/STM32F4xx/system_stm32f4xx.c
index 552357ec03..8f2b53e8d6 100644
--- a/system/STM32F4xx/system_stm32f4xx.c
+++ b/system/STM32F4xx/system_stm32f4xx.c
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f4xx.c
* @author MCD Application Team
- * @version V2.6.1
- * @date 14-February-2017
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
@@ -135,7 +133,7 @@
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
-uint32_t SystemCoreClock = F_CPU;
+uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
diff --git a/system/STM32F7xx/system_stm32f7xx.c b/system/STM32F7xx/system_stm32f7xx.c
index a118c469f5..cb4e56623f 100644
--- a/system/STM32F7xx/system_stm32f7xx.c
+++ b/system/STM32F7xx/system_stm32f7xx.c
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f7xx.c
* @author MCD Application Team
- * @version V1.2.0
- * @date 30-December-2016
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
@@ -122,7 +120,7 @@
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
- uint32_t SystemCoreClock = F_CPU;
+ uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
diff --git a/system/STM32L0xx/system_stm32l0xx.c b/system/STM32L0xx/system_stm32l0xx.c
index f0a0a0f2ee..a4109f6c85 100644
--- a/system/STM32L0xx/system_stm32l0xx.c
+++ b/system/STM32L0xx/system_stm32l0xx.c
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32l0xx.c
* @author MCD Application Team
- * @version V1.7.1
- * @date 25-November-2016
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
@@ -124,7 +122,7 @@
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
- uint32_t SystemCoreClock = F_CPU;
+ uint32_t SystemCoreClock = 2000000U;
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
diff --git a/system/STM32L1xx/system_stm32l1xx.c b/system/STM32L1xx/system_stm32l1xx.c
index 8319d08fb2..367a523825 100644
--- a/system/STM32L1xx/system_stm32l1xx.c
+++ b/system/STM32L1xx/system_stm32l1xx.c
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32l1xx.c
* @author MCD Application Team
- * @version 21-April-2017
- * @date V2.2.1
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
@@ -121,7 +119,7 @@
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
-uint32_t SystemCoreClock = F_CPU;
+uint32_t SystemCoreClock = 2097000U;
const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
diff --git a/system/STM32L4xx/system_stm32l4xx.c b/system/STM32L4xx/system_stm32l4xx.c
index b03f36968e..c76fe45ee1 100644
--- a/system/STM32L4xx/system_stm32l4xx.c
+++ b/system/STM32L4xx/system_stm32l4xx.c
@@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32l4xx.c
* @author MCD Application Team
- * @version V1.3.0
- * @date 17-February-2017
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
*
* This file provides two functions and one global variable to be called from
@@ -110,15 +108,15 @@
#include "stm32l4xx.h"
#if !defined (HSE_VALUE)
- #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
+ #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (MSI_VALUE)
- #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
+ #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
#endif /* MSI_VALUE */
#if !defined (HSI_VALUE)
- #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
@@ -167,12 +165,12 @@
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
- uint32_t SystemCoreClock = F_CPU;
+ uint32_t SystemCoreClock = 4000000U;
- const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
- const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
- const uint32_t MSIRangeTable[12] = {100000, 200000, 400000, 800000, 1000000, 2000000, \
- 4000000, 8000000, 16000000, 24000000, 32000000, 48000000};
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+ const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \
+ 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U};
/**
* @}
*/
@@ -201,24 +199,25 @@ void SystemInit(void)
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif
+
/* Reset the RCC clock configuration to the default reset state ------------*/
/* Set MSION bit */
RCC->CR |= RCC_CR_MSION;
/* Reset CFGR register */
- RCC->CFGR = 0x00000000;
+ RCC->CFGR = 0x00000000U;
/* Reset HSEON, CSSON , HSION, and PLLON bits */
- RCC->CR &= (uint32_t)0xEAF6FFFF;
+ RCC->CR &= 0xEAF6FFFFU;
/* Reset PLLCFGR register */
- RCC->PLLCFGR = 0x00001000;
+ RCC->PLLCFGR = 0x00001000U;
/* Reset HSEBYP bit */
- RCC->CR &= (uint32_t)0xFFFBFFFF;
+ RCC->CR &= 0xFFFBFFFFU;
/* Disable all interrupts */
- RCC->CIER = 0x00000000;
+ RCC->CIER = 0x00000000U;
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
@@ -272,16 +271,16 @@ void SystemInit(void)
*/
void SystemCoreClockUpdate(void)
{
- uint32_t tmp = 0, msirange = 0, pllvco = 0, pllr = 2, pllsource = 0, pllm = 2;
+ uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U;
/* Get MSI Range frequency--------------------------------------------------*/
if((RCC->CR & RCC_CR_MSIRGSEL) == RESET)
{ /* MSISRANGE from RCC_CSR applies */
- msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8;
+ msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U;
}
else
{ /* MSIRANGE from RCC_CR applies */
- msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4;
+ msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U;
}
/*MSI frequency range in HZ*/
msirange = MSIRangeTable[msirange];
@@ -306,7 +305,7 @@ void SystemCoreClockUpdate(void)
SYSCLK = PLL_VCO / PLLR
*/
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
- pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1 ;
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ;
switch (pllsource)
{
@@ -322,8 +321,8 @@ void SystemCoreClockUpdate(void)
pllvco = (msirange / pllm);
break;
}
- pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
- pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1) * 2;
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U;
SystemCoreClock = pllvco/pllr;
break;
@@ -333,7 +332,7 @@ void SystemCoreClockUpdate(void)
}
/* Compute HCLK clock frequency --------------------------------------------*/
/* Get HCLK prescaler */
- tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}