From ea78f40e02d877583010d04e8b0e690d8dbc3ac9 Mon Sep 17 00:00:00 2001 From: Alexandre Bourdiol Date: Mon, 20 Jun 2022 10:28:37 +0200 Subject: [PATCH 1/2] feat: Add support of Generic STM32G491RC, STM32G491RE and STM32G4A1RE Signed-off-by: Alexandre Bourdiol --- README.md | 2 + boards.txt | 67 +++++++ .../generic_clock.c | 45 ++++- .../ldscript.ld | 175 ++++++++++++++++++ 4 files changed, 287 insertions(+), 2 deletions(-) create mode 100644 variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/ldscript.ld diff --git a/README.md b/README.md index b1b14d3f20..3ea6810a1a 100644 --- a/README.md +++ b/README.md @@ -339,6 +339,8 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32G474RB
STM32G474RC
STM32G474RE | Generic Board | *2.0.0* | | | :green_heart: | STM32G483RE | Generic Board | *2.0.0* | | | :green_heart: | STM32G484RE | Generic Board | *2.0.0* | | +| :yellow_heart: | STM32G491RC | STM32G491RE | Generic Board | **2.3.0** | | +| :yellow_heart: | STM32G4A1RE | Generic Board | **2.3.0** | | ### Generic STM32H7 boards diff --git a/boards.txt b/boards.txt index 0666a3b308..e3cdc68499 100644 --- a/boards.txt +++ b/boards.txt @@ -3963,6 +3963,73 @@ GenG4.menu.pnum.GENERIC_G484RETX.build.board=GENERIC_G484RETX GenG4.menu.pnum.GENERIC_G484RETX.build.product_line=STM32G484xx GenG4.menu.pnum.GENERIC_G484RETX.build.variant=STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET + +# Generic G491RCIx +GenG4.menu.pnum.GENERIC_G491RCIX=Generic G491RCIx +GenG4.menu.pnum.GENERIC_G491RCIX.upload.maximum_size=262144 +GenG4.menu.pnum.GENERIC_G491RCIX.upload.maximum_data_size=131072 +GenG4.menu.pnum.GENERIC_G491RCIX.build.board=GENERIC_G491RCIX +GenG4.menu.pnum.GENERIC_G491RCIX.build.product_line=STM32G491xx +GenG4.menu.pnum.GENERIC_G491RCIX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y) + +# Generic G491REIx +GenG4.menu.pnum.GENERIC_G491REIX=Generic G491REIx +GenG4.menu.pnum.GENERIC_G491REIX.upload.maximum_size=524288 +GenG4.menu.pnum.GENERIC_G491REIX.upload.maximum_data_size=131072 +GenG4.menu.pnum.GENERIC_G491REIX.build.board=GENERIC_G491REIX +GenG4.menu.pnum.GENERIC_G491REIX.build.product_line=STM32G491xx +GenG4.menu.pnum.GENERIC_G491REIX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y) + +# Generic G491RCTx +GenG4.menu.pnum.GENERIC_G491RCTX=Generic G491RCTx +GenG4.menu.pnum.GENERIC_G491RCTX.upload.maximum_size=262144 +GenG4.menu.pnum.GENERIC_G491RCTX.upload.maximum_data_size=131072 +GenG4.menu.pnum.GENERIC_G491RCTX.build.board=GENERIC_G491RCTX +GenG4.menu.pnum.GENERIC_G491RCTX.build.product_line=STM32G491xx +GenG4.menu.pnum.GENERIC_G491RCTX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y) + +# Generic G491RETx +GenG4.menu.pnum.GENERIC_G491RETX=Generic G491RETx +GenG4.menu.pnum.GENERIC_G491RETX.upload.maximum_size=524288 +GenG4.menu.pnum.GENERIC_G491RETX.upload.maximum_data_size=131072 +GenG4.menu.pnum.GENERIC_G491RETX.build.board=GENERIC_G491RETX +GenG4.menu.pnum.GENERIC_G491RETX.build.product_line=STM32G491xx +GenG4.menu.pnum.GENERIC_G491RETX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y) + +# Generic G491REYx +GenG4.menu.pnum.GENERIC_G491REYX=Generic G491REYx +GenG4.menu.pnum.GENERIC_G491REYX.upload.maximum_size=524288 +GenG4.menu.pnum.GENERIC_G491REYX.upload.maximum_data_size=131072 +GenG4.menu.pnum.GENERIC_G491REYX.build.board=GENERIC_G491REYX +GenG4.menu.pnum.GENERIC_G491REYX.build.product_line=STM32G491xx +GenG4.menu.pnum.GENERIC_G491REYX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y) + +# Generic G4A1REIx +GenG4.menu.pnum.GENERIC_G4A1REIX=Generic G4A1REIx +GenG4.menu.pnum.GENERIC_G4A1REIX.upload.maximum_size=524288 +GenG4.menu.pnum.GENERIC_G4A1REIX.upload.maximum_data_size=131072 +GenG4.menu.pnum.GENERIC_G4A1REIX.build.board=GENERIC_G4A1REIX +GenG4.menu.pnum.GENERIC_G4A1REIX.build.product_line=STM32G4A1xx +GenG4.menu.pnum.GENERIC_G4A1REIX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y) + +# Generic G4A1RETx +GenG4.menu.pnum.GENERIC_G4A1RETX=Generic G4A1RETx +GenG4.menu.pnum.GENERIC_G4A1RETX.upload.maximum_size=524288 +GenG4.menu.pnum.GENERIC_G4A1RETX.upload.maximum_data_size=131072 +GenG4.menu.pnum.GENERIC_G4A1RETX.build.board=GENERIC_G4A1RETX +GenG4.menu.pnum.GENERIC_G4A1RETX.build.product_line=STM32G4A1xx +GenG4.menu.pnum.GENERIC_G4A1RETX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y) + +# Generic G4A1REYx +GenG4.menu.pnum.GENERIC_G4A1REYX=Generic G4A1REYx +GenG4.menu.pnum.GENERIC_G4A1REYX.upload.maximum_size=524288 +GenG4.menu.pnum.GENERIC_G4A1REYX.upload.maximum_data_size=131072 +GenG4.menu.pnum.GENERIC_G4A1REYX.build.board=GENERIC_G4A1REYX +GenG4.menu.pnum.GENERIC_G4A1REYX.build.product_line=STM32G4A1xx +GenG4.menu.pnum.GENERIC_G4A1REYX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y) + + + # Upload menu GenG4.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) GenG4.menu.upload_method.swdMethod.upload.protocol=0 diff --git a/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/generic_clock.c b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/generic_clock.c index 54874d00e0..7c83e5a416 100644 --- a/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/generic_clock.c +++ b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/generic_clock.c @@ -23,8 +23,49 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /** Configure the main internal regulator output voltage + */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST); + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; + RCC_OscInitStruct.PLL.PLLN = 85; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { + Error_Handler(); + } + /** Initializes the peripherals clocks + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/ldscript.ld b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/ldscript.ld new file mode 100644 index 0000000000..75944d1d9b --- /dev/null +++ b/variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/ldscript.ld @@ -0,0 +1,175 @@ +/** + ****************************************************************************** + * @file LinkerScript.ld + * @author Auto-generated by STM32CubeIDE + * @brief Linker script for STM32G481RETx Device from STM32G4 series + * + * Set heap size, stack size and stack location according + * to application requirements. + * + * Set memory bank area and size if external memory is used + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} From 05dbfe9581a01f1901e06cccfd18f81e4ac2d481 Mon Sep 17 00:00:00 2001 From: Alexandre Bourdiol Date: Mon, 20 Jun 2022 13:58:28 +0200 Subject: [PATCH 2/2] Fix: CMSIS stm32g491 and stm32g4a1 add missing aliases for TIM7 and COMP4/5/6 Internal ticket 130525 Fixes #1742 Signed-off-by: Alexandre Bourdiol --- ...491-and-stm32g4a1-add-missing-aliase.patch | 51 +++++++++++++++++++ README.md | 2 +- .../Device/ST/STM32G4xx/Include/stm32g491xx.h | 4 ++ .../Device/ST/STM32G4xx/Include/stm32g4a1xx.h | 4 ++ 4 files changed, 60 insertions(+), 1 deletion(-) create mode 100644 CI/update/patch/CMSIS/G4/0001-Fix-CMSIS-stm32g491-and-stm32g4a1-add-missing-aliase.patch diff --git a/CI/update/patch/CMSIS/G4/0001-Fix-CMSIS-stm32g491-and-stm32g4a1-add-missing-aliase.patch b/CI/update/patch/CMSIS/G4/0001-Fix-CMSIS-stm32g491-and-stm32g4a1-add-missing-aliase.patch new file mode 100644 index 0000000000..af22f672f3 --- /dev/null +++ b/CI/update/patch/CMSIS/G4/0001-Fix-CMSIS-stm32g491-and-stm32g4a1-add-missing-aliase.patch @@ -0,0 +1,51 @@ +From 43d68baed68625b2e99d15d841c31cb1bfb2475a Mon Sep 17 00:00:00 2001 +From: Alexandre Bourdiol +Date: Mon, 20 Jun 2022 13:58:28 +0200 +Subject: [PATCH] Fix: CMSIS stm32g491 and stm32g4a1 add missing aliases for + TIM7 and COMP4/5/6 + +Internal ticket 130525 + +Signed-off-by: Alexandre Bourdiol +--- + .../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h | 4 ++++ + .../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h | 4 ++++ + 2 files changed, 8 insertions(+) + +diff --git a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h +index ca9874b3..84f12c6e 100644 +--- a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h ++++ b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h +@@ -13694,8 +13694,12 @@ typedef struct + /******************************************************************************/ + + /* Aliases for __IRQn */ ++#define TIM7_DAC_IRQn TIM7_IRQn ++#define COMP4_5_6_IRQn COMP4_IRQn + + /* Aliases for __IRQHandler */ ++#define TIM7_DAC_IRQHandler TIM7_IRQHandler ++#define COMP4_5_6_IRQHandler COMP4_IRQHandler + + #ifdef __cplusplus + } +diff --git a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h +index 2fb6e6f5..2431b284 100644 +--- a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h ++++ b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h +@@ -13926,8 +13926,12 @@ typedef struct + /******************************************************************************/ + + /* Aliases for __IRQn */ ++#define TIM7_DAC_IRQn TIM7_IRQn ++#define COMP4_5_6_IRQn COMP4_IRQn + + /* Aliases for __IRQHandler */ ++#define TIM7_DAC_IRQHandler TIM7_IRQHandler ++#define COMP4_5_6_IRQHandler COMP4_IRQHandler + + #ifdef __cplusplus + } +-- +2.31.1.windows.1 + diff --git a/README.md b/README.md index 3ea6810a1a..0e6350fdb5 100644 --- a/README.md +++ b/README.md @@ -339,7 +339,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32G474RB
STM32G474RC
STM32G474RE | Generic Board | *2.0.0* | | | :green_heart: | STM32G483RE | Generic Board | *2.0.0* | | | :green_heart: | STM32G484RE | Generic Board | *2.0.0* | | -| :yellow_heart: | STM32G491RC | STM32G491RE | Generic Board | **2.3.0** | | +| :yellow_heart: | STM32G491RC
STM32G491RE | Generic Board | **2.3.0** | | | :yellow_heart: | STM32G4A1RE | Generic Board | **2.3.0** | | ### Generic STM32H7 boards diff --git a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h index ca9874b3a4..84f12c6efd 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h @@ -13694,8 +13694,12 @@ typedef struct /******************************************************************************/ /* Aliases for __IRQn */ +#define TIM7_DAC_IRQn TIM7_IRQn +#define COMP4_5_6_IRQn COMP4_IRQn /* Aliases for __IRQHandler */ +#define TIM7_DAC_IRQHandler TIM7_IRQHandler +#define COMP4_5_6_IRQHandler COMP4_IRQHandler #ifdef __cplusplus } diff --git a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h index 2fb6e6f538..2431b284aa 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h @@ -13926,8 +13926,12 @@ typedef struct /******************************************************************************/ /* Aliases for __IRQn */ +#define TIM7_DAC_IRQn TIM7_IRQn +#define COMP4_5_6_IRQn COMP4_IRQn /* Aliases for __IRQHandler */ +#define TIM7_DAC_IRQHandler TIM7_IRQHandler +#define COMP4_5_6_IRQHandler COMP4_IRQHandler #ifdef __cplusplus }