diff --git a/CI/build/.flake8 b/CI/build/.flake8 index 9b7e20c3a6..c5d8607073 100644 --- a/CI/build/.flake8 +++ b/CI/build/.flake8 @@ -1,2 +1,3 @@ [flake8] -max-line-length = 95 +max-line-length = 90 +ignore = E402 diff --git a/CI/build/arduino-cli.py b/CI/build/arduino-cli.py index f13ac2651e..8063a88d94 100644 --- a/CI/build/arduino-cli.py +++ b/CI/build/arduino-cli.py @@ -2,47 +2,54 @@ import collections import concurrent.futures from datetime import timedelta +from glob import glob import json import os from packaging import version +from pathlib import Path +import random import re -import shutil import subprocess import sys import tempfile import textwrap import time +script_path = Path(__file__).parent.resolve() +sys.path.append(str(script_path.parent)) +from utils import createFolder, deleteFolder + if sys.platform.startswith("win32"): from colorama import init init(autoreset=True) -home = os.path.expanduser("~") -tempdir = tempfile.gettempdir() -build_id = time.strftime("_%Y-%m-%d_%H-%M-%S") -script_path = os.path.dirname(os.path.abspath(__file__)) -path_config_filename = os.path.join(script_path, "path_config.json") +home = Path.home() +tempdir = Path(tempfile.gettempdir()) +build_id = time.strftime(".%Y-%m-%d_%H-%M-%S") +path_config_filename = script_path / "path_config.json" -arduino_cli_path = "" -stm32_url = "https://github.com/stm32duino/BoardManagerFiles/raw/main/package_stmicroelectronics_index.json" +arduino_cli_path = Path("") +stm32_url_base = "https://github.com/stm32duino/BoardManagerFiles/raw/main/" +stm32_url = f"{stm32_url_base}package_stmicroelectronics_index.json" sketches_path_list = [] -default_build_output_dir = os.path.join(tempdir, "build_arduinoCliOutput") -build_output_dir = os.path.join(tempdir, "build_arduinoCliOutput" + build_id) -build_output_cache_dir = os.path.join(build_output_dir, "cache") -root_output_dir = os.path.join(home, "Documents", "arduinoCliOutput") +search_path_list = [] +default_build_output_dir = tempdir / "build_arduinoCliOutput" +build_output_dir = tempdir / f"build_arduinoCliOutput{build_id}" +build_output_cache_dir = build_output_dir / "cache" +root_output_dir = home / "Documents" / "arduinoCliOutput" -output_dir = "" -log_file = "" +output_dir = Path("") +log_file = Path("") -# Ouput directory path +# Output directory path bin_dir = "binaries" # Default -sketch_default = os.path.join(script_path, "examples", "BareMinimum") -exclude_file_default = os.path.join(script_path, "conf", "exclude_list.txt") -cores_config_file_default = os.path.join(script_path, "conf", "cores_config.json") -cores_config_file_ci = os.path.join(script_path, "conf", "cores_config_ci.json") +sketch_default = script_path / "examples" / "BareMinimum" +exclude_file_default = script_path / "conf" / "exclude_list.txt" +cores_config_file_default = script_path / "conf" / "cores_config.json" +cores_config_file_ci = script_path / "conf" / "cores_config_ci.json" maintainer_default = "STMicroelectronics" arch_default = "stm32" @@ -53,8 +60,8 @@ arch = arch_default arduino_platform = arduino_platform_default arduino_cli = "" -arduino_cli_default_version = "0.18.0" -arduino_cli_version = arduino_cli_default_version +arduino_cli_default_ver = "0.19.0" +arduino_cli_ver = arduino_cli_default_ver # List sketch_list = [] @@ -81,25 +88,28 @@ fail_count = 0 skip_count = 0 +# error or fatal error +fork_pattern = re.compile(r"^Error during build: fork/exec") +error_pattern = re.compile(r":\d+:\d+:\s.*error:\s|^Error:") +ld_pattern = re.compile("arm-none-eabi/bin/ld:") +overflow_pattern = re.compile( + r"(will not fit in |section .+ is not within )?region( .+ overflowed by [\d]+ bytes)?" +) + # format build_format_header = "| {:^8} | {:42} | {:^10} | {:^7} |" build_format_result = "| {:^8} | {:42} | {:^19} | {:^6.2f}s |" build_separator = "-" * 80 +fsucc = "\033[32msucceeded\033[0m" +ffail = "\033[31mfailed\033[0m" +fskip = "\033[33mskipped\033[0m" +nl = "\n" - -# Create a folder if not exists -def createFolder(folder): - try: - if not os.path.exists(folder): - os.makedirs(folder) - except OSError: - print("Error: Creating directory. " + folder) - - -# Delete targeted folder recursively -def deleteFolder(folder): - if os.path.isdir(folder): - shutil.rmtree(folder, ignore_errors=True) +# index build configuration +idx_b_name = 0 +idx_build = 1 +idx_log = 2 +idx_cmd = 3 def cat(file): @@ -112,17 +122,15 @@ def cat(file): def create_output_log_tree(): # Log output file with open(log_file, "w") as file: - file.write(build_separator + "\nStarts ") + file.write(f"{build_separator}\nStarts ") file.write(time.strftime("%A %d %B %Y %H:%M:%S ")) - file.write( - "\nLog will be available here:\n{}\n".format(os.path.abspath(output_dir)) - ) - file.write(build_separator + "\n") + file.write(f"\nLog will be available here:\n{output_dir.resolve()}\n") + file.write(f"{build_separator}\n") # Folders for board in board_fqbn: - createFolder(os.path.join(output_dir, board, bin_dir)) - createFolder(os.path.join(output_dir, board)) - createFolder(os.path.join(build_output_dir, board)) + createFolder(output_dir / board / bin_dir) + createFolder(output_dir / board) + createFolder(build_output_dir / board) def create_config(): @@ -131,19 +139,16 @@ def create_config(): global build_output_dir global root_output_dir # Create a Json file for a better path management - print( - "'{}' file created. Please check the configuration.".format( - path_config_filename - ) - ) + print(f"'{path_config_filename}' file created.") + print("Please check the configuration.") path_config_file = open(path_config_filename, "w") path_config_file.write( json.dumps( { - "ARDUINO_CLI_PATH": arduino_cli_path, - "SKETCHES_PATHS": sketches_path_list, - "BUILD_OUPUT_DIR": default_build_output_dir, - "ROOT_OUPUT_DIR": root_output_dir, + "ARDUINO_CLI_PATH": str(arduino_cli_path), + "SKETCHES_PATHS": [str(fp) for fp in sketches_path_list], + "BUILD_OUPUT_DIR": str(default_build_output_dir), + "ROOT_OUPUT_DIR": str(root_output_dir), }, indent=2, ) @@ -154,9 +159,10 @@ def create_config(): def check_config(): global arduino_cli - global arduino_cli_version + global arduino_cli_ver global arduino_cli_path global sketches_path_list + global search_path_list global build_output_dir global root_output_dir global output_dir @@ -164,74 +170,119 @@ def check_config(): global stm32_url if args.ci is False: - if os.path.isfile(path_config_filename): + if path_config_filename.is_file(): try: path_config_file = open(path_config_filename, "r") path_config = json.load(path_config_file) # Common path - arduino_cli_path = path_config["ARDUINO_CLI_PATH"] - sketches_path_list = path_config["SKETCHES_PATHS"] - build_output_dir = path_config["BUILD_OUPUT_DIR"] + build_id - root_output_dir = path_config["ROOT_OUPUT_DIR"] + arduino_cli_path = Path(path_config["ARDUINO_CLI_PATH"]) + sketches_path_list = [Path(fp) for fp in path_config["SKETCHES_PATHS"]] + build_output_dir = Path(path_config["BUILD_OUPUT_DIR"]) + build_output_dir = build_output_dir.with_suffix(build_id) + root_output_dir = Path(path_config["ROOT_OUPUT_DIR"]) path_config_file.close() except IOError: print("Failed to open " + path_config_file) else: create_config() - output_dir = os.path.join(root_output_dir, "build" + build_id) - log_file = os.path.join(output_dir, "build_result.log") + output_dir = root_output_dir / f"build{build_id}" + log_file = output_dir / "build_result.log" - if arduino_cli_path != "": - assert os.path.exists( - arduino_cli_path - ), "Path does not exist: {} . Please check the path in the json config file".format( - arduino_cli_path + if arduino_cli_path != Path(): + assert arduino_cli_path.exists(), ( + f"Path {arduino_cli_path} does not exist." + f" Please check path in the json config file." ) if sys.platform.startswith("win32"): - arduino_cli = os.path.join(arduino_cli_path, "arduino-cli.exe") - elif sys.platform.startswith("linux"): - arduino_cli = os.path.join(arduino_cli_path, "arduino-cli") - elif sys.platform.startswith("darwin"): - arduino_cli = os.path.join(arduino_cli_path, "arduino-cli") + arduino_cli = str(arduino_cli_path / "arduino-cli.exe") else: - arduino_cli = "arduino-cli" + arduino_cli = str(arduino_cli_path / "arduino-cli") + # Check arduino-cli version try: output = subprocess.check_output( - [arduino_cli, "version"], stderr=subprocess.STDOUT, + [arduino_cli, "version"], + stderr=subprocess.STDOUT, ) except subprocess.CalledProcessError as e: - print('"' + " ".join(e.cmd) + '" failed with code: {}!'.format(e.returncode)) + print(f"'{' '.join(e.cmd)}' failed with code: {e.returncode}!") print(e.stdout.decode("utf-8")) quit(e.returncode) else: res = re.match(r".*Version:\s+(\d+\.\d+\.\d+).*", output.decode("utf-8")) if res: - arduino_cli_version = res.group(1) - print("Arduino CLI version used: " + arduino_cli_version) + arduino_cli_ver = res.group(1) + print(f"Arduino CLI version used: {arduino_cli_ver}") + if version.parse(arduino_cli_ver) < version.parse(arduino_cli_default_ver): + print(f"Arduino CLI version < {arduino_cli_default_ver} not supported") else: - print( - "Unable to define Arduino CLI version, use default: " - + arduino_cli_default_version - ) + print("Unable to define Arduino CLI version.") + print(f"Use default: {arduino_cli_default_ver}") if args.url: stm32_url = args.url + # Ensure a configuration exists try: + print("Check/update arduino-cli configuration") + # Try to create configuration file output = subprocess.check_output( - [arduino_cli, "core", "search", "stm32", "--additional-urls", stm32_url], + [arduino_cli, "config", "init", "--additional-urls", stm32_url], + stderr=subprocess.STDOUT, + ).decode("utf-8") + except subprocess.CalledProcessError: + try: + output = subprocess.check_output( + [ + arduino_cli, + "config", + "dump", + ], + stderr=subprocess.STDOUT, + ) + except subprocess.CalledProcessError as e: + print(f"'{' '.join(e.cmd)}' failed with code: {e.returncode}!") + print(e.stdout.decode("utf-8")) + quit(e.returncode) + else: + # Check if url is already part of the arduino-cli config + if stm32_url not in output.decode("utf-8"): + # Add it to the config + try: + output = subprocess.check_output( + [ + arduino_cli, + "config", + "add", + "board_manager.additional_urls", + stm32_url, + ], + stderr=subprocess.STDOUT, + ) + except subprocess.CalledProcessError as e: + print(f"'{' '.join(e.cmd)}' failed with code: {e.returncode}!") + print(e.stdout.decode("utf-8")) + quit(e.returncode) + # Check if requested platform is installed + try: + output = subprocess.check_output( + [ + arduino_cli, + "core", + "search", + "stm32", + ], stderr=subprocess.STDOUT, ) except subprocess.CalledProcessError as e: - print('"' + " ".join(e.cmd) + '" failed with code: {}!'.format(e.returncode)) + print(f"'{' '.join(e.cmd)}' failed with code: {e.returncode}!") print(e.stdout.decode("utf-8")) quit(e.returncode) else: if arduino_platform not in output.decode("utf-8"): - print(arduino_platform + " is not installed!") + print(f"{arduino_platform} is not installed!") quit(1) # Add core and library path to sketches_path_list try: @@ -240,24 +291,29 @@ def check_config(): stderr=subprocess.STDOUT, ).decode("utf-8") except subprocess.CalledProcessError as e: - print( - '"' + " ".join(e.cmd) + '" failed with code: {}!'.format(e.returncode) - ) + print(f"'{' '.join(e.cmd)}' failed with code: {e.returncode}!") print(e.stdout.decode("utf-8")) quit(e.returncode) else: cli_config = json.loads(output) if cli_config is not None: if cli_config["directories"]["data"] is not None: - sketches_path_list.append(cli_config["directories"]["data"]) + sketches_path_list.append(Path(cli_config["directories"]["data"])) else: print("No data directory") quit(1) if cli_config["directories"]["user"] is not None: - sketches_path_list.append(cli_config["directories"]["user"]) + sketches_path_list.append(Path(cli_config["directories"]["user"])) else: print("No user directory!") quit(1) + # Fill search_path_list to avoid search on the same path + sorted_spl = sorted(set(sketches_path_list)) + search_path_list = [] + while sorted_spl: + p = sorted_spl.pop(0) + if not any(root in p.parents for root in search_path_list): + search_path_list.append(Path(p)) else: print("No arduino-cli config!") quit(1) @@ -269,9 +325,7 @@ def load_core_config(): global arch cores_config_filename = "" if args.config: - assert os.path.exists( - args.config - ), "User core configuration JSON file does not exist" + assert args.config.exists(), f"{args.config} not found" cores_config_filename = args.config else: if args.ci: @@ -291,35 +345,23 @@ def load_core_config(): if arch == core["architecture"]: core_config = core maintainer = core["maintainer"] - print( - "Build configuration for '" - + maintainer - + "' maintainer and '" - + arch - + "' architecture" - ) + print("Build configuration for:") + print(f"- '{maintainer}' maintainer") + print(f"- '{arch}' architecture") break else: - print( - "Core architecture '" + arch + "' not found in " + cores_config_filename - ) + print(f"Core architecture '{arch}' not found in:") + print(f"{cores_config_filename}") arch = arch_default core_config = None except IOError: - print( - "Can't open {} file. Build configuration will not be used.".format( - cores_config_filename - ) - ) + print(f"Can't open {cores_config_filename} file.") + print("Build configuration will not be used.") finally: if core_config is None: - print( - "Using default configuration for '" - + maintainer_default - + "' maintainer and '" - + arch_default - + "' architecture" - ) + print("Using default configuration for:") + print(f"- '{maintainer_default}' maintainer") + print(f"- '{arch_default}' architecture") # Board list have to be initialized before call this function @@ -359,81 +401,83 @@ def parse_core_config(): # print("{}: {}\n".format(key, value)) -def manage_exclude_list(file): - with open(file, "r") as f: +def manage_exclude_list(exfile): + with open(exfile, "r") as f: for line in f.readlines(): if line.rstrip(): exclude_list.append(line.rstrip()) if exclude_list: for pattern in exclude_list: - exclude_pattern = re.compile(".*" + pattern + ".*", re.IGNORECASE) + exclude_pattern = re.compile(f".*{pattern}.*", re.IGNORECASE) for s in reversed(sketch_list): - if exclude_pattern.search(s): + if exclude_pattern.search(str(s)): sketch_list.remove(s) # Manage sketches list def manage_inos(): - # Find all inos or all patterned inos if args.all or args.sketches or args.list == "sketch": find_inos() if args.exclude: - assert os.path.exists(args.exclude), "Excluded list file does not exist" - manage_exclude_list(args.exclude) - elif os.path.exists(exclude_file_default): + exclude_file = Path(args.exclude) + assert exclude_file.exists(), "Excluded list file does not exist" + manage_exclude_list(exclude_file) + elif exclude_file_default.exists(): manage_exclude_list(exclude_file_default) # Only one sketch elif args.ino: - if os.path.exists(args.ino): + ino_file = Path(args.ino) + if ino_file.exists(): # Store only the path - if os.path.isfile(args.ino): - sketch_list.append(os.path.dirname(args.ino)) + if ino_file.is_file(args.ino): + sketch_list.append(ino_file.parent) else: sketch_list.append(args.ino) else: for path in sketches_path_list: - fp = os.path.join(path, args.ino) - if os.path.exists(fp): + fp = path / ino_file + if fp.exists(): # Store only the path - if os.path.isfile(fp): - sketch_list.append(os.path.dirname(fp)) + if fp.is_file(): + sketch_list.append(fp.parent) else: sketch_list.append(fp) break else: - print("Sketch {} path does not exist!".format(args.ino)) + print(f"Sketch {args.ino} path does not exist!") quit(1) # Sketches listed in a file elif args.file: - assert os.path.exists(args.file), "Sketches list file does not exist" - with open(args.file, "r") as f: + sketches_files = Path(args.file) + assert sketches_files.exists(), f"{sketches_files} not found" + with open(sketches_files, "r") as f: for line in f.readlines(): if line.rstrip(): - ino = line.rstrip() - if os.path.exists(ino): + ino = Path(line.rstrip()) + if ino.exists(): # Store only the path - if os.path.isfile(ino): - sketch_list.append(os.path.dirname(ino)) + if ino.is_file(): + sketch_list.append(ino.parent) else: sketch_list.append(ino) else: for path in sketches_path_list: - fp = os.path.join(path, ino) - if os.path.exists(fp): + fp = path / ino + if fp.exists(): # Store only the path - if os.path.isfile(fp): - sketch_list.append(os.path.dirname(fp)) + if fp.is_file(): + sketch_list.append(fp.parent) else: sketch_list.append(fp) break else: - print("Ignore {} as it does not exist.".format(ino)) + print(f"Ignore {ino} as it does not exist.") # Default sketch to build else: sketch_list.append(sketch_default) if len(sketch_list) == 0: - print("No sketch to build for " + arduino_platform + "!") + print(f"No sketch to build for {arduino_platform}!") quit(1) @@ -443,18 +487,28 @@ def find_inos(): # key: path, value: name if args.sketches: arg_sketch_pattern = re.compile(args.sketches, re.IGNORECASE) - for path in sketches_path_list: - for root, dirs, files in os.walk(path, followlinks=True): - for file in files: - if file.endswith((".ino", ".pde")): - if args.sketches: - if arg_sketch_pattern.search(os.path.join(root, file)) is None: - continue - sketch_list.append(root) + for spath in search_path_list: + # Due to issue with Path.glob() which does not follow symlink + # use glob.glob + # See: https://bugs.python.org/issue33428 + # for spath_object in spath.glob("**/*.[ip][nd][oe]"): + # if args.sketches: + # if arg_sketch_pattern.search(str(spath_object)) is None: + # continue + # if spath_object.is_file(): + # sketch_list.append(spath_object.parent) + for sk_ino in glob(str(spath / "**" / "*.[ip][nd][oe]"), recursive=True): + if args.sketches: + if arg_sketch_pattern.search(sk_ino) is None: + continue + p_ino = Path(sk_ino) + if p_ino.is_file(): + sketch_list.append(p_ino.parent) sketch_list = sorted(set(sketch_list)) -# Return a list of all board using the arduino-cli for the specified architecture +# Return a list of all board using the arduino-cli for the specified +# architecture def find_board(): global board_fqbn board_found = {} @@ -462,87 +516,73 @@ def find_board(): if args.board: arg_board_pattern = re.compile(args.board, re.IGNORECASE) - if version.parse(arduino_cli_version) >= version.parse("0.18.0"): - fqbn_key = "fqbn" - else: - fqbn_key = "FQBN" - fqbn_list_tmp = [] try: output = subprocess.check_output( - [arduino_cli, "board", "listall", "--format", "json"], + [arduino_cli, "board", "search", arduino_platform, "--format", "json"], stderr=subprocess.STDOUT, ).decode("utf-8") except subprocess.CalledProcessError as e: - print('"' + " ".join(e.cmd) + '" failed with code: {}!'.format(e.returncode)) + print(f"'{' '.join(e.cmd)}' failed with code: {e.returncode}!") print(e.stdout.decode("utf-8")) quit(e.returncode) else: - boards_list = json.loads(output) - if boards_list is not None: - for board in boards_list["boards"]: - if arduino_platform in board[fqbn_key]: - fqbn_list_tmp.append(board[fqbn_key]) + fqbn_list_tmp = [board["fqbn"] for board in json.loads(output)] if not len(fqbn_list_tmp): - print("No boards found for " + arduino_platform) + print(f"No boards found for {arduino_platform}") quit(1) # For STM32 core, pnum is requested for fqbn in fqbn_list_tmp: try: output = subprocess.check_output( - [arduino_cli, "board", "details", "--additional-urls", stm32_url, "--format", "json", fqbn], + [ + arduino_cli, + "board", + "details", + "--format", + "json", + "-b", + fqbn, + ], stderr=subprocess.STDOUT, ).decode("utf-8") except subprocess.CalledProcessError as e: - print( - '"' + " ".join(e.cmd) + '" failed with code: {}!'.format(e.returncode) - ) + print(f"'{' '.join(e.cmd)}' failed with code: {e.returncode}!") print(e.stdout.decode("utf-8")) quit(e.returncode) else: board_detail = json.loads(output) - if board_detail is not None: - if "config_options" not in board_detail: - print("No config_options found for " + fqbn) - quit(1) - for option in board_detail["config_options"]: - if option["option"] == "pnum": - for value in option["values"]: - if args.board: - if arg_board_pattern.search(value["value"]) is None: - continue - board_found[value["value"]] = ( - fqbn + ":pnum=" + value["value"] - ) - break - else: - print('No detail found for:"' + fqbn + '"!') + for val in next( + ( + item + for item in board_detail.get("config_options", []) + if item["option"] == "pnum" + ), + {}, + ).get("values", []): + if args.board: + if arg_board_pattern.search(val["value"]) is None: + continue + board_found[val["value"]] = f"{fqbn}:pnum={val['value']}" if board_found: board_fqbn = collections.OrderedDict(sorted(board_found.items())) else: - print("No board found for " + arduino_platform + "!") + print(f"No board found for {arduino_platform}!") quit(1) # Check the status -def check_status(status, build_conf, boardKo): +def check_status(status, build_conf, boardKo, nb_build_conf): global nb_build_passed global nb_build_failed - sketch_name = os.path.basename(build_conf[4][-1]) + sketch_name = build_conf[idx_cmd][-1].name if status[1] == 0: - result = "\033[32msucceeded\033[0m" + result = fsucc nb_build_passed += 1 elif status[1] == 1: # Check if failed due to a region overflowed - logFile = os.path.join(build_conf[3], sketch_name + ".log") - # error or fatal error - fork_pattern = re.compile(r"^Error during build: fork/exec") - error_pattern = re.compile(r":\d+:\d+:\s.*error:\s|^Error:") - ld_pattern = re.compile("arm-none-eabi/bin/ld:") - overflow_pattern = re.compile( - r"(will not fit in |section .+ is not within )?region( .+ overflowed by [\d]+ bytes)?" - ) + logFile = build_conf[idx_log] / f"{sketch_name}.log" error_found = False for i, line in enumerate(open(logFile)): if error_pattern.search(line): @@ -554,8 +594,8 @@ def check_status(status, build_conf, boardKo): if overflow_pattern.search(line) is None: error_found = True if error_found: - result = "\033[31mfailed\033[0m" - boardKo.append(build_conf[0]) + result = ffail + boardKo.append(build_conf[idx_b_name]) if args.ci: cat(logFile) nb_build_failed += 1 @@ -566,11 +606,12 @@ def check_status(status, build_conf, boardKo): nb_build_passed += 1 else: result = "\033[31merror\033[0m" - + boardKo.append(build_conf[idx_b_name]) + nb_build_failed += 1 print( - (build_format_result).format( - "{}/{}".format(build_conf[1], build_conf[2]), - build_conf[0], + f"{build_format_result}".format( + f"{build_conf[idx_build]}/{nb_build_conf}", + build_conf[idx_b_name], result, status[0], ) @@ -579,148 +620,95 @@ def check_status(status, build_conf, boardKo): # Log sketch build result def log_sketch_build_result(sketch, boardKo, boardSkipped): + nb_ok = len(board_fqbn) - len(boardKo) - len(boardSkipped) + nb_ko = len(boardKo) + nb_na = len(boardSkipped) # Log file with open(log_file, "a") as f: f.write(build_separator + "\n") - f.write( - "Sketch: {} ({}/{})\n".format( - os.path.basename(sketch), - sketch_list.index(sketch) + 1, - len(sketch_list), - ) - ) - f.write(os.path.dirname(sketch)) - f.write( - "\n{} {}, {} {}, {} {}\n".format( - len(board_fqbn) - len(boardKo) - len(boardSkipped), - "succeeded", - len(boardKo), - "failed", - len(boardSkipped), - "skipped", - ) - ) + bcounter = f"{sketch_list.index(sketch) + 1}/{len(sketch_list)}" + f.write(f"Sketch: {sketch.name} ({bcounter})\n") + f.write(str(sketch.parent)) + f.write(f"\n{nb_ok} succeeded, {nb_ko} failed, {nb_na} skipped\n") if len(boardKo): - f.write( - "Failed boards :\n" - + "\n".join( - textwrap.wrap(", ".join(boardKo), 80, break_long_words=False) - ) - ) + sKo = ", ".join(boardKo) + wKo = textwrap.wrap(sKo, 80, break_long_words=False) + f.write(f"Failed boards :\n{nl.join(wKo)}") # f.write("Failed boards :\n" + "\n".join(boardKo)) f.write("\n") if len(boardSkipped): - f.write( - "Skipped boards :\n" - + "\n".join( - textwrap.wrap(", ".join(boardSkipped), 80, break_long_words=False) - ) - ) + sskipped = ", ".join(boardSkipped) + wskipped = textwrap.wrap(sskipped, 80, break_long_words=False) + f.write(f"Skipped boards :\n{nl.join(wskipped)}") # f.write("Skipped boards :\n" + "\n".join(boardSkipped)) f.write("\n") - f.write(build_separator + "\n") + f.write(f"{build_separator}\n") # Standard output print(build_separator) - print( - "Build Summary: {} {}, {} {}, {} {}".format( - len(board_fqbn) - len(boardKo) - len(boardSkipped), - "\033[32msucceeded\033[0m", - len(boardKo), - "\033[31mfailed\033[0m", - len(boardSkipped), - "\033[33mskipped\033[0m", - ) - ) + + print(f"Build Summary: {nb_ok} {fsucc}, {nb_ko} {ffail}, {nb_na} {fskip}") print(build_separator) # Log final result def log_final_result(): # Also equal to len(board_fqbn) * len(sketch_list) - nb_build_total = nb_build_passed + nb_build_failed + nb_build_skipped + nb_build_total = nb_build_passed + nb_build_failed stat_passed = round(nb_build_passed * 100.0 / nb_build_total, 2) stat_failed = round(nb_build_failed * 100.0 / nb_build_total, 2) - stat_skipped = round(nb_build_skipped * 100.0 / nb_build_total, 2) duration = str(timedelta(seconds=time.time() - full_buildTime)) # Log file with open(log_file, "a") as f: - f.write("\n" + build_separator + "\n") + f.write(f"\n{build_separator}\n") f.write("| {:^76} |\n".format("Build summary")) f.write(build_separator + "\n") - f.write( - "{} {} ({}%), {} {} ({}%), {} {} ({}%) of {} builds\n".format( - nb_build_passed, - "succeeded", - stat_passed, - nb_build_failed, - "failed", - stat_failed, - nb_build_skipped, - "skipped", - stat_skipped, - nb_build_total, - ) - ) - f.write("Ends ") - f.write(time.strftime("%A %d %B %Y %H:%M:%S\n")) - f.write("Duration: ") - f.write(duration) - f.write("\nLogs are available here:\n") - f.write(output_dir + "\n") - f.write(build_separator + "\n\n") + ssucc = f"{nb_build_passed} succeeded ({stat_passed}%)" + sfail = f"{nb_build_failed} failed ({stat_failed}%)" + sskip = f"{nb_build_skipped} skipped)" + f.write(f"{ssucc}, {sfail} of {nb_build_total} builds ({sskip})\n") + f.write(f"Ends {time.strftime('%A %d %B %Y %H:%M:%S')}\n") + f.write(f"Duration: {duration}\n") + f.write(f"Logs are available here:\n{output_dir}\n") + f.write(f"{build_separator}\n\n") # Standard output - print( - "Builds Summary: {} {} ({}%), {} {} ({}%), {} {} ({}%) of {} builds".format( - nb_build_passed, - "\033[32msucceeded\033[0m", - stat_passed, - nb_build_failed, - "\033[31mfailed\033[0m", - stat_failed, - nb_build_skipped, - "\033[33mskipped\033[0m", - stat_skipped, - nb_build_total, - ) - ) - print("Duration: " + duration) + ssucc = f"{nb_build_passed} {fsucc} ({stat_passed}%)" + sfail = f"{nb_build_failed} {ffail} ({stat_failed}%)" + sskip = f"{nb_build_skipped} {fskip}" + print(f"Builds Summary: {ssucc}, {sfail} of {nb_build_total} builds ({sskip})") + print(f"Duration: {duration}") print("Logs are available here:") print(output_dir) -# Set up specific options to customise arduino builder command +# Set up specific options to customise arduino-cli command def get_fqbn(b_name): if b_name in board_custom_fqbn and board_custom_fqbn[b_name]: return board_custom_fqbn[b_name] else: if b_name in board_options and board_options[b_name]: - return board_fqbn[b_name] + "," + board_options[b_name] + return f"{board_fqbn[b_name]},{board_options[b_name]}" else: return board_fqbn[b_name] -# Generate arduino builder basic command +# Generate arduino-cli basic command def genBasicCommand(b_name): cmd = [] cmd.append(arduino_cli) cmd.append("compile") # cmd.append("-warnings=all") cmd.append("--build-path") - cmd.append(os.path.join(build_output_dir, b_name)) + cmd.append(build_output_dir / b_name) cmd.append("--build-cache-path") cmd.append(build_output_cache_dir) if args.verbose: cmd.append("--verbose") - if version.parse(arduino_cli_version) <= version.parse("0.10.0"): - cmd.append("--output") - cmd.append(os.path.join(output_dir, b_name, bin_dir, "dummy_sketch")) - else: - cmd.append("--output-dir") - cmd.append(os.path.join(output_dir, b_name, bin_dir)) + cmd.append("--output-dir") + cmd.append(output_dir / b_name / bin_dir) cmd.append("--fqbn") cmd.append(get_fqbn(b_name)) cmd.append("dummy_sketch") @@ -729,63 +717,46 @@ def genBasicCommand(b_name): def create_build_conf_list(): build_conf_list = [] - idx = 1 - for b_name in board_fqbn: + for idx, b_name in enumerate(board_fqbn, start=1): build_conf_list.append( - ( + [ b_name, idx, - len(board_fqbn), - os.path.join(output_dir, b_name), + output_dir / b_name, genBasicCommand(b_name), - ) + ] ) - idx += 1 return build_conf_list def build_config(sketch, boardSkipped): global nb_build_skipped - build_conf_list = create_build_conf_list() - - for idx in reversed(range(len(build_conf_list))): - build_conf_list[idx][4][-1] = sketch - build_conf_list[idx][4][-4] = build_conf_list[idx][4][-4].replace( - "dummy_sketch", os.path.basename(sketch) - ) - if na_sketch_pattern: - if build_conf_list[idx][0] in na_sketch_pattern: - for pattern in na_sketch_pattern[build_conf_list[idx][0]]: - if re.search(pattern, sketch, re.IGNORECASE): - print( - (build_format_result).format( - "{}/{}".format( - build_conf_list[idx][1], build_conf_list[idx][2] - ), - build_conf_list[idx][0], - "\033[33mskipped\033[0m", - 0.00, - ) - ) - - boardSkipped.append(build_conf_list[idx][0]) - del build_conf_list[idx] - nb_build_skipped += 1 - break - else: - # get specific sketch options to append to the fqbn - for pattern in sketch_options: - print - if pattern in sketch_options: - if re.search(pattern, sketch, re.IGNORECASE): - if build_conf_list[idx][4][-2].count(":") == 3: - build_conf_list[idx][4][-2] += ( - "," + sketch_options[pattern] - ) - else: - build_conf_list[idx][4][-2] += ( - ":" + sketch_options[pattern] - ) + build_conf_list = [] + build_conf_list_tmp = create_build_conf_list() + + while len(build_conf_list_tmp): + build_conf = build_conf_list_tmp.pop(0) + build_conf[idx_cmd][-1] = sketch + b_name = build_conf[idx_b_name] + s_sketch = str(sketch) + build_conf[idx_build] = len(build_conf_list) + 1 + if b_name in na_sketch_pattern: + for pattern in na_sketch_pattern[b_name]: + if re.search(pattern, s_sketch, re.IGNORECASE): + boardSkipped.append(b_name) + nb_build_skipped += 1 + break + else: + # Get specific sketch options to append to the fqbn + for pattern in sketch_options: + if re.search(pattern, s_sketch, re.IGNORECASE): + if build_conf[idx_cmd][-2].count(":") == 3: + build_conf[idx_cmd][-2] += f",{sketch_options[pattern]}" + else: + build_conf[idx_cmd][-2] += f":{sketch_options[pattern]}" + build_conf_list.append(build_conf) + else: + build_conf_list.append(build_conf) return build_conf_list @@ -793,32 +764,35 @@ def build_config(sketch, boardSkipped): def build_all(): create_output_log_tree() wrapper = textwrap.TextWrapper(width=76) + if args.dry: + print("Performing a dry run (no build)") + build = dry_build + else: + build = real_build for sketch_nb, sketch in enumerate(sketch_list, start=1): boardKo = [] boardSkipped = [] - print("\n") - print(build_separator) + print(f"\n{build_separator}") print( "| {:^85} |".format( - "Sketch \033[34m{}\033[0m ({}/{})".format( - os.path.basename(sketch), sketch_nb, len(sketch_list) - ) + f"Sketch \033[34m{sketch.name}\033[0m ({sketch_nb}/{len(sketch_list)})" ) ) - wrapped_path_ = wrapper.wrap(text=os.path.dirname(sketch)) + wrapped_path_ = wrapper.wrap(text=str(sketch.parent)) for line in wrapped_path_: - print("| {:^76} |".format("{}".format(line))) + print("| {:^76} |".format(f"{line}")) print(build_separator) print((build_format_header).format("Num", "Board", "Result", "Time")) print(build_separator) build_conf_list = build_config(sketch, boardSkipped) + nb_build_conf = len(build_conf_list) with concurrent.futures.ProcessPoolExecutor(os.cpu_count() - 1) as executor: for build_conf, res in zip( build_conf_list, executor.map(build, build_conf_list) ): - check_status(res, build_conf, boardKo) + check_status(res, build_conf, boardKo, nb_build_conf) log_sketch_build_result(sketch, boardKo, boardSkipped) # Ensure no cache issue deleteFolder(build_output_cache_dir) @@ -826,12 +800,10 @@ def build_all(): # Run arduino-cli command -def build(build_conf): - cmd = build_conf[4] +def real_build(build_conf): + cmd = build_conf[idx_cmd] status = [time.monotonic()] - with open( - os.path.join(build_conf[3], os.path.basename(cmd[-1]) + ".log"), "w" - ) as stdout: + with open(build_conf[idx_log] / f"{cmd[-1].name}.log", "w") as stdout: res = subprocess.Popen(cmd, stdout=stdout, stderr=subprocess.STDOUT) res.wait() status[0] = time.monotonic() - status[0] @@ -839,6 +811,23 @@ def build(build_conf): return status +# Run arduino-cli command +def dry_build(build_conf): + # cmd = build_conf[4] + status = [random.random() * 10, random.randint(0, 1)] + if status[1] == 1: + # Create dummy log file + logFile = build_conf[idx_log] / f"{ build_conf[idx_cmd][-1].name}.log" + # random failed + dummy = open(logFile, "w") + if random.randint(0, 1) == 1: + dummy.writelines("region `FLASH' overflowed by 5612 bytes") + else: + dummy.writelines("Error:") + dummy.close() + return status + + # Parser parser = argparse.ArgumentParser( description="Manage arduino-cli to build sketche(s) for STM32 boards." @@ -867,29 +856,32 @@ def build(build_conf): parser.add_argument( "-c", "--clean", help="clean output directory.", action="store_true" ) + +parser.add_argument( + "-d", "--dry", help="perform a dry run (no build)", action="store_true" +) + parser.add_argument( "--arch", metavar="architecture", - help="core architecture to build. Default build architecture is '" - + arch_default - + "'", + help=f"core architecture to build. Default build architecture is {arch_default}", ) parser.add_argument( "--config", metavar="", - help="JSON file containing the build configuration for one or more\ + help=f"JSON file containing the build configuration for one or more\ maintainer/architecture. Board options for build, applicability of\ sketches for boards or required options. If sketch is not listed\ - then applicable to all board. Default core configuration is for '" - + arch_default - + " 'architecture in: " - + cores_config_file_default, + then applicable to all board. Default core configuration is for\ + '{arch_default}' architecture in: {cores_config_file_default}", ) parser.add_argument( - "-u", "--url", metavar="", help="additional URL for the board manager\ - Default url : " - + stm32_url, + "-u", + "--url", + metavar="", + help=f"additional URL for the board manager\ + Default url : {stm32_url}", ) parser.add_argument( @@ -901,7 +893,7 @@ def build(build_conf): # Sketch options sketchg0 = parser.add_argument_group( - title="Sketch(es) options", description="By default build " + sketch_default + title="Sketch(es) options", description=f"By default build {sketch_default}" ) sketchg1 = sketchg0.add_mutually_exclusive_group() @@ -924,9 +916,8 @@ def build(build_conf): "-e", "--exclude", metavar="", - help="file containing sketches pattern to ignore.\ - Default path : " - + exclude_file_default, + help=f"file containing sketches pattern to ignore.\ + Default path : {exclude_file_default}", ) args = parser.parse_args() @@ -939,18 +930,19 @@ def main(): deleteFolder(root_output_dir) load_core_config() - find_board() + if args.list != "sketch": + find_board() if args.list == "board": - print("%i board(s) available" % len(board_fqbn)) for board in board_fqbn: print(board) + print(f"{len(board_fqbn)} board(s) available") quit() manage_inos() if args.list == "sketch": for sketch in sketch_list: print(sketch) - print("%i sketches found" % len(sketch_list)) + print(f"{len(sketch_list)} sketches found") quit() if core_config: diff --git a/CI/build/conf/path_config_travis.json b/CI/build/conf/path_config_travis.json deleted file mode 100644 index 597663e91d..0000000000 --- a/CI/build/conf/path_config_travis.json +++ /dev/null @@ -1,7 +0,0 @@ -{ - "ARDUINO_PATH": "/home/travis/IDE/arduino", - "ARDUINO_PACKAGES": "/home/travis/.arduino15/packages", - "ARDUINO_USER_SKETCHBOOK": "/home/travis/Arduino", - "BUILD_OUPUT_DIR": "/tmp/BuildOutput", - "ROOT_OUPUT_DIR": "/home/travis/arduinoBuilderOutput" -} \ No newline at end of file diff --git a/CI/update/.flake8 b/CI/update/.flake8 new file mode 100644 index 0000000000..c55e852d7d --- /dev/null +++ b/CI/update/.flake8 @@ -0,0 +1,3 @@ +[flake8] +max-line-length = 95 +ignore = W503, E203, E402 diff --git a/CI/utils/README.md b/CI/update/README.md similarity index 100% rename from CI/utils/README.md rename to CI/update/README.md diff --git a/CI/utils/fqbn.py b/CI/update/fqbn.py similarity index 96% rename from CI/utils/fqbn.py rename to CI/update/fqbn.py index 71493e213b..4c9dde4e5e 100644 --- a/CI/utils/fqbn.py +++ b/CI/update/fqbn.py @@ -22,7 +22,10 @@ "-b", "--board", metavar="pattern", help="pattern to find one or more board(s) fqbn" ) parser.add_argument( - "-p", "--path", metavar="", help="Path to the arduino-cli tool.", + "-p", + "--path", + metavar="", + help="Path to the arduino-cli tool.", ) args = parser.parse_args() @@ -91,9 +94,7 @@ def main(): arduino_cli_path = args.path assert os.path.exists( arduino_cli_path - ), "Path does not exist: '{}'. Please check the path!".format( - arduino_cli_path - ) + ), "Path does not exist: '{}'. Please check the path!".format(arduino_cli_path) if sys.platform.startswith("win32"): arduino_cli = os.path.join(arduino_cli_path, "arduino-cli.exe") else: diff --git a/CI/utils/gen_wrapper.sh b/CI/update/gen_wrapper.sh old mode 100755 new mode 100644 similarity index 100% rename from CI/utils/gen_wrapper.sh rename to CI/update/gen_wrapper.sh diff --git a/CI/utils/patch/HAL/G4/0001-G4-Fix-LL-FMC-build-issue-introduce-in-HAL-version-v.patch b/CI/update/patch/HAL/G4/0001-G4-Fix-LL-FMC-build-issue-introduce-in-HAL-version-v.patch similarity index 100% rename from CI/utils/patch/HAL/G4/0001-G4-Fix-LL-FMC-build-issue-introduce-in-HAL-version-v.patch rename to CI/update/patch/HAL/G4/0001-G4-Fix-LL-FMC-build-issue-introduce-in-HAL-version-v.patch diff --git a/CI/utils/stm32cube.py b/CI/update/stm32cube.py similarity index 99% rename from CI/utils/stm32cube.py rename to CI/update/stm32cube.py index 39c82b7b2a..6785084aa2 100644 --- a/CI/utils/stm32cube.py +++ b/CI/update/stm32cube.py @@ -9,15 +9,17 @@ from jinja2 import Environment, FileSystemLoader from packaging import version from pathlib import Path -from stm32common import createFolder, deleteFolder, copyFolder, copyFile, genSTM32List from urllib.parse import urljoin +script_path = Path(__file__).parent.resolve() +sys.path.append(str(script_path.parent)) +from utils import copyFile, copyFolder, createFolder, deleteFolder, genSTM32List + if sys.platform.startswith("win32"): from colorama import init init(autoreset=True) -script_path = Path(__file__).parent.resolve() home = Path.home() path_config_filename = "update_config.json" diff --git a/CI/utils/stm32variant.py b/CI/update/stm32variant.py similarity index 95% rename from CI/utils/stm32variant.py rename to CI/update/stm32variant.py index a30476011a..1bcfb6b702 100644 --- a/CI/utils/stm32variant.py +++ b/CI/update/stm32variant.py @@ -863,25 +863,25 @@ def qspi_pinmap(lst): name = "OCTOSPI" hal = "OSPI" if lst == quadspidata0_list: - aname = name + "_DATA0" + aname = f"{name}_DATA0" elif lst == quadspidata1_list: - aname = name + "_DATA1" + aname = f"{name}_DATA1" elif lst == quadspidata2_list: - aname = name + "_DATA2" + aname = f"{name}_DATA2" elif lst == quadspidata3_list: - aname = name + "_DATA3" + aname = f"{name}_DATA3" elif lst == quadspidata4_list: - aname = name + "_DATA4" + aname = f"{name}_DATA4" elif lst == quadspidata5_list: - aname = name + "_DATA5" + aname = f"{name}_DATA5" elif lst == quadspidata6_list: - aname = name + "_DATA6" + aname = f"{name}_DATA6" elif lst == quadspidata7_list: - aname = name + "_DATA7" + aname = f"{name}_DATA7" elif lst == quadspisclk_list: - aname = name + "_SCLK" + aname = f"{name}_SCLK" else: - aname = name + "_SSEL" + aname = f"{name}_SSEL" for p in lst: # 2nd element is the XXXXSPI_YYYY signal instm = re.match(ospi_regex, p[2]) @@ -1093,7 +1093,7 @@ def manage_syswkup(): num -= 1 cmt = "" else: - cmt = " /* " + p[2] + " */" + cmt = f" /* {p[2]} */" syswkup_pins_list[num].append([p[0], cmt]) return syswkup_pins_list @@ -1144,7 +1144,7 @@ def print_pinamevar(): for idx, syswkup_list in enumerate(syswkup_pins_list, start=1): if len(syswkup_list) > 1: for idx2, lst in enumerate(syswkup_list[1:], start=1): - alt_syswkup_list.append("{}_{}".format(idx, idx2)) + alt_syswkup_list.append(f"{idx}_{idx2}") return alt_syswkup_list @@ -1246,7 +1246,7 @@ def serial_pins_variant(): if serialnum: serialnum = serialnum.group(1) if serial_inst.startswith("LP"): - serialnum = "10" + serialnum + serialnum = f"10{serialnum}" else: print("No serial instance number found!") serialnum = "-1" @@ -1302,8 +1302,8 @@ def print_variant(generic_list, alt_syswkup_list): for idx, io in enumerate(io_list): pyn = io[0].replace("_", "", 1) if [item for item in adclist if item[0] == io[0]]: - ax = "A{}".format(analog_index) - pins_number_list.append({"name": pyn, "val": "PIN_" + ax}) + ax = f"A{analog_index}" + pins_number_list.append({"name": pyn, "val": f"PIN_{ax}"}) pinnames_list.append({"name": io[0], "ax": analog_index}) analog_pins_list.append({"val": idx, "ax": ax, "pyn": pyn}) analog_index += 1 @@ -1314,8 +1314,8 @@ def print_variant(generic_list, alt_syswkup_list): for idx, io in enumerate(dualpad_list): pyn = io[0].replace("_", "", 1) if [item for item in adclist if item[0] == io[0]]: - ax = "A{}".format(analog_index) - pins_number_list.append({"name": pyn, "val": "PIN_" + ax}) + ax = f"A{analog_index}" + pins_number_list.append({"name": pyn, "val": f"PIN_{ax}"}) pinnames_list.append({"name": io[0], "ax": analog_index}) analog_pins_list.append({"val": idx + idx_sum, "ax": ax, "pyn": pyn}) analog_index += 1 @@ -1326,8 +1326,8 @@ def print_variant(generic_list, alt_syswkup_list): for idx, io in enumerate(remap_list): pyn = io[0].replace("_", "", 1) if [item for item in adclist if item[0] == io[0]]: - ax = "A{}".format(analog_index) - pins_number_list.append({"name": pyn, "val": "PIN_" + ax}) + ax = f"A{analog_index}" + pins_number_list.append({"name": pyn, "val": f"PIN_{ax}"}) pinnames_list.append({"name": io[0], "ax": analog_index}) analog_pins_list.append({"val": idx + idx_sum, "ax": ax, "pyn": pyn}) analog_index += 1 @@ -1822,7 +1822,7 @@ def group_by_flash(group_base_list, glist, index_mcu_base): ] # Merge key if key: - packages_per_flash[key + "-" + flash] = packages_per_flash.pop(key) + packages_per_flash[f"{key}-{flash}"] = packages_per_flash.pop(key) else: packages_per_flash[flash] = packages_list @@ -1832,7 +1832,7 @@ def group_by_flash(group_base_list, glist, index_mcu_base): if len(key) == 1: new_mcu_dirname += key else: - new_mcu_dirname += "(" + key + ")" + new_mcu_dirname += f"({key})" # Handle package with ANPQX # One case not manage: [Tx, TxX, Yx] # Assuming it is not an issue to have non existing mcu @@ -1845,9 +1845,7 @@ def group_by_flash(group_base_list, glist, index_mcu_base): # Assert if sub.group(2) != "x": print( - "Package of {} info contains {} instead of 'x'".format( - base_name, sub.group(2) - ) + "Package of {base_name} info contains {sub.group(2)} instead of 'x'" ) exit(1) if sub.group(3): @@ -1858,7 +1856,7 @@ def group_by_flash(group_base_list, glist, index_mcu_base): if len(pcounter) == 1: new_mcu_dirname += package_list[0] else: - new_mcu_dirname += "(" + "-".join(k for k in sorted(pcounter)) + ")" + new_mcu_dirname += f"({'-'.join(k for k in sorted(pcounter))})" if len(ecounter): new_mcu_dirname += "x" if (len(ecounter) == 1) and ( @@ -1867,7 +1865,7 @@ def group_by_flash(group_base_list, glist, index_mcu_base): # new_mcu_dirname += next(iter(ecounter)) new_mcu_dirname += ext_list[0] else: - new_mcu_dirname += "(" + "-".join(k for k in sorted(ecounter)) + ")" + new_mcu_dirname += f"({'-'.join(k for k in sorted(ecounter))})" del package_list[:] del ext_list[:] @@ -1903,12 +1901,11 @@ def merge_dir(out_temp_path, group_mcu_dir, mcu_family, periph_xml, variant_exp) for index, glist in enumerate(group_base_list): # Only one mcu if len(glist) == 1: - new_mcu_dirname += ("_" if index != 0 else "") + glist[0].strip("x") + new_mcu_dirname += f"{'_' if index != 0 else ''}{glist[0].strip('x')}" else: # Group using flash info - new_mcu_dirname += ("_" if index != 0 else "") + group_by_flash( - group_base_list, glist, index_mcu_base - ) + gbf = group_by_flash(group_base_list, glist, index_mcu_base) + new_mcu_dirname += f"{'_' if index != 0 else ''}{gbf}" del group_package_list[:] del group_flash_list[:] del group_base_list[:] @@ -1951,23 +1948,23 @@ def merge_dir(out_temp_path, group_mcu_dir, mcu_family, periph_xml, variant_exp) new_line_c = periph_xml.pop(0) for index, xml in enumerate(periph_xml, 1): if index % 2 == 0: - new_line_c += "\n * {}".format(xml) + new_line_c += f"\n * {xml}" else: - new_line_c += ", {}".format(xml) + new_line_c += f", {xml}" update_file(mcu_dir / periph_c_filename, periperalpins_regex, new_line_c) variant_exp.sort() variant_exp = list(OrderedDict.fromkeys(variant_exp)) new_line_c = variant_exp[0] - new_line_h = "{}".format(variant_exp.pop(0)) + new_line_h = f"{variant_exp.pop(0)}" for index, pre in enumerate(variant_exp, 1): if index % 2 == 0: - new_line_c += " ||\\\n {}".format(pre) - new_line_h += " &&\\\n !{}".format(pre) + new_line_c += f" ||\\\n {pre}" + new_line_h += f" &&\\\n !{pre}" else: - new_line_c += " || {}".format(pre) - new_line_h += " && !{}".format(pre) + new_line_c += f" || {pre}" + new_line_h += f" && !{pre}" update_file(mcu_dir / variant_cpp_filename, update_regex, new_line_c) update_file(mcu_dir / generic_clock_filename, update_regex, new_line_c) update_file(mcu_dir / variant_h_filename, update_regex, new_line_h) @@ -2102,7 +2099,7 @@ def default_cubemxdir(): def create_config(): # Create a Json file for a better path management try: - print("Please set your configuration in '{}' file".format(config_filename)) + print(f"Please set your configuration in '{config_filename}' file") config_file = open(config_filename, "w", newline="\n") config_file.write( json.dumps( @@ -2115,7 +2112,7 @@ def create_config(): ) config_file.close() except IOError: - print("Failed to open " + config_filename) + print(f"Failed to open {config_filename}") exit(1) @@ -2141,7 +2138,7 @@ def check_config(): if conf: cubemxdir = Path(conf) except IOError: - print("Failed to open " + config_filename) + print(f"Failed to open {config_filename}") else: create_config() @@ -2152,7 +2149,7 @@ def manage_repo(): try: if not args.skip: - print("Updating " + repo_name + "...") + print(f"Updating {repo_name}...") if repo_path.is_dir(): # Get new tags from the remote git_cmds = [ @@ -2189,7 +2186,7 @@ def manage_repo(): db_release = version_tag return True except subprocess.CalledProcessError as e: - print("Command {} failed with error code {}".format(e.cmd, e.returncode)) + print(f"Command {e.cmd} failed with error code {e.returncode}") return False @@ -2221,32 +2218,22 @@ def manage_repo(): # By default, generate for all mcu xml files description parser = argparse.ArgumentParser( description=textwrap.dedent( - """\ + f""" By default, generates: - - {}, - - {}, - - {}, - - {}, - - {} - - {} + - {periph_c_filename}, + - {pinvar_h_filename}, + - {variant_cpp_filename}, + - {variant_h_filename}, + - {boards_entry_filename} + - {generic_clock_filename} for all xml files description available in STM32CubeMX internal database. -Internal database path must be defined in {}. +Internal database path must be defined in {config_filename}. It can be the one from STM32CubeMX directory if defined: -\t{} +\t{cubemxdir} or the one from GitHub: -\t{} - -""".format( - periph_c_filename, - pinvar_h_filename, - variant_cpp_filename, - variant_h_filename, - boards_entry_filename, - generic_clock_filename, - config_filename, - cubemxdir, - gh_url, - ) +\t{gh_url} + +""" ), epilog=textwrap.dedent( """\ @@ -2287,18 +2274,16 @@ def manage_repo(): "-c", "--cube", help=textwrap.dedent( - """\ -Use STM32CubeMX internal database. Default use GitHub {} repository. -""".format( - repo_name - ) + f"""\ +Use STM32CubeMX internal database. Default use GitHub {repo_name} repository. +""" ), action="store_true", ) parser.add_argument( "-s", "--skip", - help="Skip {} clone/fetch".format(repo_name), + help=f"Skip {repo_name} clone/fetch", action="store_true", ) args = parser.parse_args() @@ -2315,12 +2300,10 @@ def manage_repo(): if fallback or args.cube: if not (cubemxdir.is_dir()): print( - """ + f""" Cube Mx seems not to be installed or not at the specified location. -Please check the value set for 'CUBEMX_DIRECTORY' in '{}' file.""".format( - config_filename - ) +Please check the value set for 'CUBEMX_DIRECTORY' in '{config_filename}' file.""" ) quit() @@ -2339,7 +2322,7 @@ def manage_repo(): release_match = re.match(release_regex, db_release) if release_match: db_release = release_match.group(1) -print("CubeMX DB release {}\n".format(db_release)) +print(f"CubeMX DB release {db_release}\n") # if args.mcu: # # Check input file exists @@ -2382,11 +2365,11 @@ def manage_repo(): xml_mcu.unlink() continue - print("Generating files for '{}'...".format(mcu_file.name)) + print(f"Generating files for '{mcu_file.name}'...") if not gpiofile: print("Could not find GPIO file") quit() - xml_gpio = parse(str(dirIP / ("GPIO-" + gpiofile + "_Modes.xml"))) + xml_gpio = parse(str(dirIP / f"GPIO-{gpiofile}_Modes.xml")) mcu_family_dir = mcu_family + "xx" out_temp_path = tmp_dir / mcu_family_dir / mcu_file.stem.replace("STM32", "") @@ -2415,17 +2398,14 @@ def manage_repo(): print_variant(generic_list, alt_syswkup_list) del alt_syswkup_list[:] del generic_list[:] - print( - "* Total I/O pins found: {}".format( - len(io_list) + len(alt_list) + len(dualpad_list) + len(remap_list) - ) - ) - print(" - {} I/O pins".format(len(io_list))) + sum_io = len(io_list) + len(alt_list) + len(dualpad_list) + len(remap_list) + print(f"* Total I/O pins found: {sum_io}") + print(f" - {len(io_list)} I/O pins") if len(dualpad_list): - print(" - {} dual pad".format(len(dualpad_list))) + print(f" - {len(dualpad_list)} dual pad") if len(remap_list): - print(" - {} remap pins".format(len(remap_list))) - print(" - {} ALT I/O pins".format(len(alt_list))) + print(f" - {len(remap_list)} remap pins") + print(f" - {len(alt_list)} ALT I/O pins") # for io in io_list: # print(io[0] + ", " + io[1]) diff --git a/CI/utils/stm32wrapper.py b/CI/update/stm32wrapper.py similarity index 91% rename from CI/utils/stm32wrapper.py rename to CI/update/stm32wrapper.py index 5830405443..04d90a9e06 100644 --- a/CI/utils/stm32wrapper.py +++ b/CI/update/stm32wrapper.py @@ -1,11 +1,14 @@ import argparse import re +import sys from itertools import groupby from jinja2 import Environment, FileSystemLoader, Template from pathlib import Path -from stm32common import createFolder, deleteFolder, genSTM32List script_path = Path(__file__).parent.resolve() +sys.path.append(str(script_path.parent)) +from utils import createFolder, deleteFolder, genSTM32List + # Base path core_path = script_path.parent.parent SrcWrapper_path = "" @@ -80,7 +83,7 @@ def checkConfig(arg_core, arg_cmsis): CMSIS_path = core_path.parent / "ArduinoModule-CMSIS" / "CMSIS_5" if not core_path.is_dir(): - print("Could not find " + core_path) + print(f"Could not find {core_path}") exit(1) system_path = core_path / "system" @@ -106,7 +109,7 @@ def printCMSISStartup(log): filelist = [pth.name for pth in filelist] if len(filelist): if log: - print("Number of startup files: {}".format(len(filelist))) + print(f"Number of startup files: {len(filelist)}") # Some mcu have two startup files # Ex: WL one for cm0plus and one for cm4 # In that case this is the same value line so add an extra defined @@ -138,7 +141,7 @@ def printSystemSTM32(log): filelist = sorted(system_path.glob("STM32*/system_stm32*.c")) if len(filelist): if log: - print("Number of system stm32 files: {}".format(len(filelist))) + print(f"Number of system stm32 files: {len(filelist)}") system_list = [] for fp in filelist: system_list.append({"serie": fp.parent.name, "fn": fp.name}) @@ -172,16 +175,16 @@ def wrap(arg_core, arg_cmsis, log): hal_c_dict = {} # Search all files for each series for serie in stm32_series: - src = HALDrivers_path / ("STM32" + serie + "xx_HAL_Driver") / "Src" - inc = HALDrivers_path / ("STM32" + serie + "xx_HAL_Driver") / "Inc" + src = HALDrivers_path / f"STM32{serie}xx_HAL_Driver" / "Src" + inc = HALDrivers_path / f"STM32{serie}xx_HAL_Driver" / "Inc" if src.exists(): if log: - print("Generating for " + serie + "...") + print(f"Generating for {serie}...") lower = serie.lower() # Search stm32yyxx_[hal|ll]*.c file - filelist = src.glob("stm32" + lower + "xx_*.c") + filelist = src.glob(f"stm32{lower}xx_*.c") for fp in filelist: # File name fn = fp.name @@ -201,7 +204,7 @@ def wrap(arg_core, arg_cmsis, log): hal_c_dict[peripheral] = [lower] # Search stm32yyxx_ll_*.h file - filelist = inc.glob("stm32" + lower + "xx_ll_*.h") + filelist = inc.glob(f"stm32{lower}xx_ll_*.h") for fp in filelist: # File name fn = fp.name @@ -264,7 +267,7 @@ def wrap(arg_core, arg_cmsis, log): # CMSIS DSP C source file if not CMSIS_path.is_dir(): - print("Could not find {}".format(CMSIS_path)) + print(f"Could not find {CMSIS_path}") print("CMSIS DSP generation skipped.") else: # Delete all subfolders @@ -279,7 +282,7 @@ def wrap(arg_core, arg_cmsis, log): fdn = CMSIS_DSP_outSrc_path / dn if not fdn.is_dir(): createFolder(fdn) - out_file = open(fdn / (dn + ".c"), "w", newline="\n") + out_file = open(fdn / (f"{dn}.c"), "w", newline="\n") all_ll_file.write(dsp_file_template.render(dsp_path=dn)) out_file.close() return 0 @@ -288,19 +291,19 @@ def wrap(arg_core, arg_cmsis, log): if __name__ == "__main__": # Parser wrapparser = argparse.ArgumentParser( - description="Generate all wrappers files need by the STM32 core (HAL, LL, CMSIS, ...)" + description="Generate all wrappers files (HAL, LL, CMSIS, ...)" ) wrapparser.add_argument( "-c", "--core", metavar="core_path", - help="Root path of the STM32 core. Default: {}".format(core_path), + help=f"Root path of the STM32 core. Default: {core_path}", ) wrapparser.add_argument( "-s", "--cmsis", metavar="cmsis_path", - help="Root path of the CMSIS. Default: {}".format(CMSIS_path), + help=f"Root path of the CMSIS. Default: {CMSIS_path}", ) wrapargs = wrapparser.parse_args() diff --git a/CI/utils/templates/PeripheralPins.c b/CI/update/templates/PeripheralPins.c similarity index 100% rename from CI/utils/templates/PeripheralPins.c rename to CI/update/templates/PeripheralPins.c diff --git a/CI/utils/templates/PinNamesVar.h b/CI/update/templates/PinNamesVar.h similarity index 100% rename from CI/utils/templates/PinNamesVar.h rename to CI/update/templates/PinNamesVar.h diff --git a/CI/utils/templates/boards_entry.txt b/CI/update/templates/boards_entry.txt similarity index 100% rename from CI/utils/templates/boards_entry.txt rename to CI/update/templates/boards_entry.txt diff --git a/CI/utils/templates/generic_clock.c b/CI/update/templates/generic_clock.c similarity index 100% rename from CI/utils/templates/generic_clock.c rename to CI/update/templates/generic_clock.c diff --git a/CI/utils/templates/stm32_def_build.h b/CI/update/templates/stm32_def_build.h similarity index 100% rename from CI/utils/templates/stm32_def_build.h rename to CI/update/templates/stm32_def_build.h diff --git a/CI/utils/templates/stm32yyxx_hal_conf.h b/CI/update/templates/stm32yyxx_hal_conf.h similarity index 100% rename from CI/utils/templates/stm32yyxx_hal_conf.h rename to CI/update/templates/stm32yyxx_hal_conf.h diff --git a/CI/utils/templates/stm32yyxx_ll.h b/CI/update/templates/stm32yyxx_ll.h similarity index 100% rename from CI/utils/templates/stm32yyxx_ll.h rename to CI/update/templates/stm32yyxx_ll.h diff --git a/CI/utils/templates/stm32yyxx_ll_ppp.h b/CI/update/templates/stm32yyxx_ll_ppp.h similarity index 100% rename from CI/utils/templates/stm32yyxx_ll_ppp.h rename to CI/update/templates/stm32yyxx_ll_ppp.h diff --git a/CI/utils/templates/stm32yyxx_zz_ppp.c b/CI/update/templates/stm32yyxx_zz_ppp.c similarity index 100% rename from CI/utils/templates/stm32yyxx_zz_ppp.c rename to CI/update/templates/stm32yyxx_zz_ppp.c diff --git a/CI/utils/templates/system_stm32yyxx.c b/CI/update/templates/system_stm32yyxx.c similarity index 100% rename from CI/utils/templates/system_stm32yyxx.c rename to CI/update/templates/system_stm32yyxx.c diff --git a/CI/utils/templates/variant_generic.cpp b/CI/update/templates/variant_generic.cpp similarity index 100% rename from CI/utils/templates/variant_generic.cpp rename to CI/update/templates/variant_generic.cpp diff --git a/CI/utils/templates/variant_generic.h b/CI/update/templates/variant_generic.h similarity index 100% rename from CI/utils/templates/variant_generic.h rename to CI/update/templates/variant_generic.h diff --git a/CI/utils/__init__.py b/CI/utils/__init__.py new file mode 100644 index 0000000000..2f30247937 --- /dev/null +++ b/CI/utils/__init__.py @@ -0,0 +1 @@ +from .pathlib_ext import * diff --git a/CI/utils/stm32common.py b/CI/utils/pathlib_ext.py similarity index 77% rename from CI/utils/stm32common.py rename to CI/utils/pathlib_ext.py index f1aca9a163..27134f2624 100644 --- a/CI/utils/stm32common.py +++ b/CI/utils/pathlib_ext.py @@ -1,14 +1,14 @@ import re import shutil +import sys # Create a folder if not exists def createFolder(path): try: - if not path.exists(): - path.mkdir() + path.mkdir(parents=True, exist_ok=True) except OSError: - print("Error: Creating directory {}".format(path)) + print(f"Error: Creating directory {path}") # Delete targeted folder recursively @@ -23,7 +23,7 @@ def copyFolder(src, dest, ign_patt=set()): if src.is_dir(): shutil.copytree(src, dest, ignore=shutil.ignore_patterns(*ign_patt)) except OSError as e: - print("Error: Folder {} not copied. {}".format(src, e)) + print(f"Error: Folder {src} not copied. {e}") # copy one file to dest @@ -32,7 +32,7 @@ def copyFile(src, dest): if src.is_file(): shutil.copy(str(src), str(dest)) except OSError as e: - print("Error: File {} not copied. {}".format(src, e)) + print(f"Error: File {src} not copied. {e}") def genSTM32List(path, pattern): @@ -50,3 +50,8 @@ def genSTM32List(path, pattern): stm32_list.append(res.group(1)) stm32_list.sort() return stm32_list + + +if __name__ == "__main__": + print("This script is not intend to be called directly") + sys.exit() diff --git a/README.md b/README.md index cf752c1857..755e8f9a1e 100644 --- a/README.md +++ b/README.md @@ -333,7 +333,9 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32H747IG
STM32H747II | Generic Board | *2.0.0* | | | :green_heart: | STM32H750ZB | Generic Board | *2.0.0* | | | :green_heart: | STM32H750IB
STM32H750II | Generic Board | *2.0.0* | | -| :green_heart: | STM32H750IB | [Daisy ](https://www.electro-smith.com/daisy/daisy) | *1.9.0* | | +| :green_heart: | STM32H750IB | [Daisy](https://www.electro-smith.com/daisy/daisy) | *1.9.0* | | +| :yellow_heart: | STM32H750IB | [Daisy Patch SM](https://www.electro-smith.com/daisy/patch-sm) | *2.2.0* | | + | :green_heart: | STM32H750VB | Generic Board | *2.0.0* | | | :green_heart: | STM32H753VI | Generic Board | *2.0.0* | | | :green_heart: | STM32H753ZI | Generic Board | *2.0.0* | | diff --git a/boards.txt b/boards.txt index f805d8e7fe..1d8de58fa3 100644 --- a/boards.txt +++ b/boards.txt @@ -3721,6 +3721,17 @@ GenH7.menu.pnum.DAISY_SEED.build.variant=STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K- GenH7.menu.pnum.DAISY_SEED.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS GenH7.menu.pnum.DAISY_SEED.build.ldscript=DAISY_SEED.ld +# Daisy Patch SM board +GenH7.menu.pnum.DAISY_PATCH_SM=Daisy Patch SM +GenH7.menu.pnum.DAISY_PATCH_SM.upload.maximum_size=131072 +GenH7.menu.pnum.DAISY_PATCH_SM.upload.maximum_data_size=524288 +GenH7.menu.pnum.DAISY_PATCH_SM.build.board=DAISY_PATCH_SM +GenH7.menu.pnum.DAISY_PATCH_SM.build.product_line=STM32H750xx +GenH7.menu.pnum.DAISY_PATCH_SM.build.variant_h=variant_{build.board}.h +GenH7.menu.pnum.DAISY_PATCH_SM.build.variant=STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T) +GenH7.menu.pnum.DAISY_PATCH_SM.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS +GenH7.menu.pnum.DAISY_PATCH_SM.build.ldscript=DAISY_SEED.ld + # Generic H742IGKx GenH7.menu.pnum.GENERIC_H742IGKX=Generic H742IGKx GenH7.menu.pnum.GENERIC_H742IGKX.upload.maximum_size=1048576 diff --git a/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/PeripheralPins_DAISY_PATCH_SM.c b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/PeripheralPins_DAISY_PATCH_SM.c new file mode 100644 index 0000000000..0954ae58a2 --- /dev/null +++ b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/PeripheralPins_DAISY_PATCH_SM.c @@ -0,0 +1,646 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32H742I(G-I)Kx.xml, STM32H742I(G-I)Tx.xml + * STM32H743IGKx.xml, STM32H743IGTx.xml + * STM32H743IIKx.xml, STM32H743IITx.xml + * STM32H747BGTx.xml, STM32H747BITx.xml + * STM32H750IBKx.xml, STM32H750IBTx.xml + * STM32H753IIKx.xml, STM32H753IITx.xml + * STM32H757BITx.xml + * CubeMX DB release 6.0.30 + */ +#ifdef ARDUINO_DAISY_PATCH_SM + +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14 + {PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15 + {PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18 + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19 + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3 + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7 + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7 + // {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9 + // {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5 + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10 + {PC_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10 + {PC_0_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10 + // {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11 + // {PC_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11 + // {PC_1_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11 + {PC_2_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0 + {PC_3_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4 + {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4 + // {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8 + // {PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8 + // {PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_INP5 + // {PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_INP9 + // {PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_INP4 + // {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_INP8 + // {PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_INP3 + // {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_INP7 + // {PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_INP2 + // {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_INP6 + // {PF_11, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INP2 + // {PF_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_INP6 + // {PF_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INP2 + // {PF_14, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_INP6 + // {PH_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_INP13 + // {PH_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_INP14 + // {PH_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_INP15 + // {PH_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC3_INP16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + // {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + // {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + // {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + // {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PH_5, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PH_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + // {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + // {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + // {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + // {PH_4, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + // {PH_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PH_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT1, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7_ALT3, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + // {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + // {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + // {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + // {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + // {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + // {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + // {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + // {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + // {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + // {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + // {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + // {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + // {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_4, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + {PE_5, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + {PE_6, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PF_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 + {PF_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 + {PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PF_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + {PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PF_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N + // {PH_6, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PH_9, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PH_10, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PH_11, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PH_12, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PH_13, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PH_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PH_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PI_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PI_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PI_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PI_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PI_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PA_15, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_4, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + // {PB_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, + // {PB_6_ALT1, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + // {PB_6_ALT2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PB_13, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_14, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + // {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PH_13, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PA_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PB_3, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + // {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + // {PB_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, + // {PB_7_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_8, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + // {PB_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + // {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + // {PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PH_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PI_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_12_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + // {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + // {PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_11_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + // {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + // {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + // {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_13, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_7_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + // {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + // {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + // {PB_5_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3_C, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + // {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + // {PD_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_14, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PI_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_6_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2_C, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PG_9, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + // {PG_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + // {PH_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_3_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + // {PG_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_13, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + // {PH_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_4_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + // {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_8, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + // {PG_10, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PH_5, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + // {PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + // {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PH_14, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PI_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + // {PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + // {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PH_13, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +#ifdef HAL_ETH_MODULE_ENABLED +WEAK const PinMap PinMap_Ethernet[] = { + {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK + {PA_1_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_CLK + {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO + {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV + {PA_7_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_DV + // {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + // {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + // {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + // {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + // {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC + {PC_2_C, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2 + {PC_3_C, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK + {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0 + // {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1 + {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + // {PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + // {PG_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PH_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PH_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + // {PH_6, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + // {PH_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PI_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {NC, NP, 0} +}; +#endif + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA0[] = { + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + // {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PF_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PH_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA1[] = { + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + // {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PF_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PH_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA2[] = { + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PF_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + // {PG_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA3[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + // {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {PF_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PG_14, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_SCLK[] = { + // {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PF_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_SSEL[] = { + // {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PG_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB_OTG_FS[] = { + // {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_ID + {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_DM + {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_DP + {NC, NP, 0} +}; +#endif + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB_OTG_HS[] = { +#ifdef USE_USB_HS_IN_FS + {PA_4, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_SOF + // {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_ID + // {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS + {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_DM + {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_DP +#else + {PA_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_CK + // {PB_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D2 + // {PB_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D3 + // {PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D5 + // {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D6 + {PC_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_NXT + // {PH_4, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_NXT + // {PI_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_DIR +#endif /* USE_USB_HS_IN_FS */ + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD[] = { + {PA_0, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDIO2)}, // SDMMC2_CMD + {PB_3, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDIO2)}, // SDMMC2_D2 + {PB_4, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDIO2)}, // SDMMC2_D3 + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDIO1)}, // SDMMC1_CKIN + {PB_8_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D4 + {PB_8_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDIO2)}, // SDMMC2_D4 + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDIO1)}, // SDMMC1_CDIR + {PB_9_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D5 + {PB_9_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDIO2)}, // SDMMC2_D5 + {PB_14, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDIO2)}, // SDMMC2_D0 + {PB_15, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDIO2)}, // SDMMC2_D1 + {PC_1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDIO2)}, // SDMMC2_CK + // {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDIO1)}, // SDMMC1_D0DIR + // {PC_6_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D6 + // {PC_6_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDIO2)}, // SDMMC2_D6 + {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDIO1)}, // SDMMC1_D123DIR + {PC_7_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D7 + {PC_7_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDIO2)}, // SDMMC2_D7 + {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D0 + {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D1 + {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D2 + {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D3 + {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO1)}, // SDMMC1_CK + {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO1)}, // SDMMC1_CMD + // {PD_6, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDIO2)}, // SDMMC2_CK + // {PD_7, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDIO2)}, // SDMMC2_CMD + // {PG_11, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDIO2)}, // SDMMC2_D2 + {NC, NP, 0} +}; +#endif + +#endif /* ARDUINO_DAISY_PATCH_SM */ diff --git a/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/variant_DAISY_PATCH_SM.cpp b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/variant_DAISY_PATCH_SM.cpp new file mode 100644 index 0000000000..68f9d8bbc0 --- /dev/null +++ b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/variant_DAISY_PATCH_SM.cpp @@ -0,0 +1,260 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#ifdef ARDUINO_DAISY_PATCH_SM + +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A9 + PA_1, // D1/A8 + PA_2, // D2/A2 + PA_3, // D3/A0 + PA_4, // D4/A12 + PA_5, // D5/A13 + PA_6, // D6/A1 + PA_7, // D7/A3 + PA_9, // D8 + PA_10, // D9 + PA_11, // D10 + PA_12, // D11 + PA_13, // D12 + PA_14, // D13 + PA_15, // D14 + PB_1, // D15/A6 + PB_3, // D16 + PB_4, // D17 + PB_8, // D18 + PB_9, // D19 + PB_10, // D20 + PB_11, // D21 + PB_14, // D22 + PB_15, // D23 + PC_0, // D24/A5 + PC_1, // D25/A4 + PC_4, // D26/A7 + PC_7, // D27 + PC_8, // D28 + PC_9, // D29 + PC_10, // D30 + PC_11, // D31 + PC_12, // D32 + PC_13, // D33 + PC_14, // D34 + PD_0, // D35 + PD_1, // D36 + PD_2, // D37 + PD_3, // D38 + PD_8, // D39 + PD_9, // D40 + PD_10, // D41 + PD_14, // D42 + PD_15, // D43 + PE_0, // D44 + PE_1, // D45 + PE_2, // D46 + PE_3, // D47 + PE_4, // D48 + PE_5, // D49 + PE_6, // D50 + PE_7, // D51 + PE_8, // D52 + PE_9, // D53 + PE_10, // D54 + PE_11, // D55 + PE_12, // D56 + PE_13, // D57 + PE_14, // D58 + PE_15, // D59 + PF_0, // D60 + PF_1, // D61 + PF_2, // D62 + PF_3, // D63 + PF_4, // D64 + PF_5, // D65 + PF_6, // D66 + PF_7, // D67 + PF_8, // D68 + PF_9, // D69 + PF_10, // D70 + PF_11, // D71 + PF_12, // D72 + PF_13, // D73 + PF_14, // D74 + PF_15, // D75 + PG_0, // D76 + PG_1, // D77 + PG_2, // D78 + PG_3, // D79 + PG_4, // D80 + PG_5, // D81 + PG_6, // D82 + PG_8, // D83 + PG_13, // D84 + PG_14, // D85 + PG_15, // D86 + PH_0, // D87 + PH_1, // D88 + PH_2, // D89 + PH_3, // D90 + PH_5, // D91 + PH_8, // D92 + PH_9, // D93 + PH_10, // D94 + PH_11, // D95 + PH_12, // D96 + PH_13, // D97 + PH_14, // D98 + PH_15, // D99 + PI_0, // D100 + PI_1, // D101 + PI_2, // D102 + PI_3, // D103 + PI_4, // D104 + PI_5, // D105 + PI_6, // D106 + PI_7, // D107 + PI_9, // D108 + PI_10, // D109 + PC_2_C, // D110/A11 + PC_3_C // D111/A10 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 3, // A0, PA3 + 6, // A1, PA6 + 2, // A2, PA2 + 7, // A3, PA7 + 25, // A4, PC1 + 24, // A5, PC0 + 15, // A6, PB1 + 26, // A7, PC4 + 1, // A8, PA1 + 0, // A9, PA0 + 110, // A10, PC2_C + 111, // A11, PC3_C + 4, // A12, PA4 + 5, // A13, PA5 +}; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {}; + + /* Supply configuration update enable */ + HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); + /* Configure the main internal regulator output voltage */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); // 480MHz + + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + /* Macro to configure the PLL clock source */ + __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE); + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_OscInitStruct.OscillatorType + = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 4; + RCC_OscInitStruct.PLL.PLLN = 200; // 400MHz Mode + //RCC_OscInitStruct.PLL.PLLN = 240; // 480MHz Mode + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 5; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /* Initializes the CPU, AHB and APB busses clocks */ + RCC_ClkInitStruct.ClockType + = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 + | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; + RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + PeriphClkInitStruct.PeriphClockSelection + = RCC_PERIPHCLK_USART16 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_SPI123 + | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SDMMC + | RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_I2C123 + | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_QSPI | RCC_PERIPHCLK_FMC + | RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6; + // PLL 2 + PeriphClkInitStruct.PLL2.PLL2M = 4; + // PeriphClkInitStruct.PLL2.PLL2N = 115; // Max Freq @ 3v3 (overclocked SDRAM) + PeriphClkInitStruct.PLL2.PLL2N = 100; // 100Mhz -> FMC + PeriphClkInitStruct.PLL2.PLL2P = 8; // 57.5 + PeriphClkInitStruct.PLL2.PLL2Q = 10; // 46 + PeriphClkInitStruct.PLL2.PLL2R = 2; // 115Mhz + PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_2; + PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE; + PeriphClkInitStruct.PLL2.PLL2FRACN = 0; + // PLL 3 + PeriphClkInitStruct.PLL3.PLL3M = 6; + PeriphClkInitStruct.PLL3.PLL3N = 295; + PeriphClkInitStruct.PLL3.PLL3P = 64; // 12.29Mhz + PeriphClkInitStruct.PLL3.PLL3Q = 4; + PeriphClkInitStruct.PLL3.PLL3R = 32; // 24.xMhz + PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_1; + PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE; + PeriphClkInitStruct.PLL3.PLL3FRACN = 0; + PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2; + PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK; + PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL; + PeriphClkInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLL3; + PeriphClkInitStruct.Sai23ClockSelection = RCC_SAI23CLKSOURCE_PLL3; + PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2; + PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_D2PCLK1; + PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_D3PCLK1; + PeriphClkInitStruct.Usart234578ClockSelection + = RCC_USART234578CLKSOURCE_D2PCLK1; + PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; + PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; + PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_D2PCLK1; + PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL3; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { + Error_Handler(); + } + /* Enable USB Voltage detector */ + HAL_PWREx_EnableUSBVoltageDetector(); +} + +#ifdef __cplusplus +} +#endif + +#endif /* ARDUINO_DAISY_PATCH_SM */ diff --git a/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/variant_DAISY_PATCH_SM.h b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/variant_DAISY_PATCH_SM.h new file mode 100644 index 0000000000..446c9c7fad --- /dev/null +++ b/variants/STM32H7xx/H742I(G-I)(K-T)_H743I(G-I)(K-T)_H750IB(K-T)_H753II(K-T)/variant_DAISY_PATCH_SM.h @@ -0,0 +1,286 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A9 +#define PA1 PIN_A8 +#define PA2 PIN_A2 +#define PA3 PIN_A0 +#define PA4 PIN_A12 +#define PA5 PIN_A13 +#define PA6 PIN_A1 +#define PA7 PIN_A3 +#define PA9 8 +#define PA10 9 +#define PA11 10 +#define PA12 11 +#define PA13 12 +#define PA14 13 +#define PA15 14 +#define PB1 PIN_A6 +#define PB3 16 +#define PB4 17 +#define PB8 18 +#define PB9 19 +#define PB10 20 +#define PB11 21 +#define PB14 22 +#define PB15 23 +#define PC0 PIN_A5 +#define PC1 PIN_A4 +#define PC4 PIN_A7 +#define PC7 27 +#define PC8 28 +#define PC9 29 +#define PC10 30 +#define PC11 31 +#define PC12 32 +#define PC13 33 +#define PC14 34 +#define PD0 35 +#define PD1 36 +#define PD2 37 +#define PD3 38 +#define PD8 39 +#define PD9 40 +#define PD10 41 +#define PD14 42 +#define PD15 43 +#define PE0 44 +#define PE1 45 +#define PE2 46 +#define PE3 47 +#define PE4 48 +#define PE5 49 +#define PE6 50 +#define PE7 51 +#define PE8 52 +#define PE9 53 +#define PE10 54 +#define PE11 55 +#define PE12 56 +#define PE13 57 +#define PE14 58 +#define PE15 59 +#define PF0 60 +#define PF1 61 +#define PF2 62 +#define PF3 63 +#define PF4 64 +#define PF5 65 +#define PF6 66 +#define PF7 67 +#define PF8 68 +#define PF9 69 +#define PF10 70 +#define PF11 71 +#define PF12 72 +#define PF13 73 +#define PF14 74 +#define PF15 75 +#define PG0 76 +#define PG1 77 +#define PG2 78 +#define PG3 79 +#define PG4 80 +#define PG5 81 +#define PG6 82 +#define PG8 83 +#define PG13 84 +#define PG14 85 +#define PG15 86 +#define PH0 87 +#define PH1 88 +#define PH2 89 +#define PH3 90 +#define PH5 91 +#define PH8 92 +#define PH9 93 +#define PH10 94 +#define PH11 95 +#define PH12 96 +#define PH13 97 +#define PH14 98 +#define PH15 99 +#define PI0 100 +#define PI1 101 +#define PI2 102 +#define PI3 103 +#define PI4 104 +#define PI5 105 +#define PI6 106 +#define PI7 107 +#define PI9 108 +#define PI10 109 +#define PC2_C PIN_A11 +#define PC3_C PIN_A10 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA2_ALT2 (PA2 | ALT2) +#define PA3_ALT1 (PA3 | ALT1) +#define PA3_ALT2 (PA3 | ALT2) +#define PA4_ALT1 (PA4 | ALT1) +#define PA4_ALT2 (PA4 | ALT2) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PA15_ALT2 (PA15 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB3_ALT2 (PB3 | ALT2) +#define PB4_ALT1 (PB4 | ALT1) +#define PB4_ALT2 (PB4 | ALT2) +#define PB8_ALT1 (PB8 | ALT1) +#define PB8_ALT2 (PB8 | ALT2) +#define PB9_ALT1 (PB9 | ALT1) +#define PB9_ALT2 (PB9 | ALT2) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC0_ALT1 (PC0 | ALT1) +#define PC0_ALT2 (PC0 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC1_ALT2 (PC1 | ALT2) +#define PC4_ALT1 (PC4 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC7_ALT2 (PC7 | ALT2) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PF8_ALT1 (PF8 | ALT1) +#define PF9_ALT1 (PF9 | ALT1) + +#define NUM_DIGITAL_PINS 112 +#define NUM_DUALPAD_PINS 2 +#define NUM_ANALOG_INPUTS 14 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PC7 +#endif + +// HSE is 16MHz on Daisy Seed +#define HSE_VALUE (16000000UL) + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PB4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PC3_C +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PC2_C +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PD10 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PB9 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB8 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 4 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA1 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA0 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_ETH_MODULE_DISABLED) + #define HAL_ETH_MODULE_ENABLED +#endif +#if !defined(HAL_QSPI_MODULE_DISABLED) + #define HAL_QSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif