diff --git a/README.md b/README.md
index 15779e7729..8bc8282cec 100644
--- a/README.md
+++ b/README.md
@@ -149,6 +149,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32L475VG | [B-L475E-IOT01A](http://www.st.com/en/evaluation-tools/b-l475e-iot01a.html) | *1.0.1* | |
| :green_heart: | STM32F413ZH | [32F413HDISCOVERY](https://www.st.com/en/evaluation-tools/32f413hdiscovery.html) | *1.9.0* | |
| :green_heart: | STM32L4S5VI | [B-L4S5I-IOT01A](https://www.st.com/en/evaluation-tools/b-l4s5i-iot01a.html) | *2.0.0* | |
+| :yellow_heart: | STM32WB5MMG | [STM32WB5MM-DK](https://www.st.com/en/evaluation-tools/stm32wb5mm-dk.html) | **2.1.0** | |
### [Eval](https://www.st.com/en/evaluation-tools/stm32-eval-boards.html) boards
@@ -407,6 +408,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| Status | Device(s) | Name | Release | Notes |
| :----: | :-------: | ---- | :-----: | :---- |
| :green_heart: | STM32WB55CC
STM32WB55CE
STM32WB55CG | Generic Board | *2.0.0* | |
+| :yellow_heart: | STM32WB5MMG | Generic Board | **2.1.0** | |
| :green_heart: | STM32WB55RC
STM32WB55RE
STM32WB55RG | Generic Board | *2.0.0* | |
### Generic STM32WL boards
diff --git a/boards.txt b/boards.txt
index 8270e5fadf..cb1870026e 100644
--- a/boards.txt
+++ b/boards.txt
@@ -823,6 +823,20 @@ Disco.menu.pnum.B_L072Z_LRWAN1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
Disco.menu.pnum.B_L072Z_LRWAN1.build.cmsis_lib_gcc=arm_cortexM0l_math
Disco.menu.pnum.B_L072Z_LRWAN1.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
+# STM32WB5MM-DK board
+Disco.menu.pnum.STM32WB5MM_DK=STM32WB5MM-DK
+Disco.menu.pnum.STM32WB5MM_DK.node="DIS_WB5MMG"
+Disco.menu.pnum.STM32WB5MM_DK.upload.maximum_size=827392
+Disco.menu.pnum.STM32WB5MM_DK.upload.maximum_data_size=196608
+Disco.menu.pnum.STM32WB5MM_DK.build.mcu=cortex-m4
+Disco.menu.pnum.STM32WB5MM_DK.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
+Disco.menu.pnum.STM32WB5MM_DK.build.board=STM32WB5MM_DK
+Disco.menu.pnum.STM32WB5MM_DK.build.series=STM32WBxx
+Disco.menu.pnum.STM32WB5MM_DK.build.product_line=STM32WB5Mxx
+Disco.menu.pnum.STM32WB5MM_DK.build.variant=STM32WBxx/WB5MMGH
+Disco.menu.pnum.STM32WB5MM_DK.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
+Disco.menu.pnum.STM32WB5MM_DK.build.cmsis_lib_gcc=arm_cortexM4lf_math
+
# Upload menu
Disco.menu.upload_method.MassStorage=Mass Storage
Disco.menu.upload_method.MassStorage.upload.protocol=
@@ -4948,6 +4962,14 @@ GenWB.menu.pnum.GENERIC_WB55CGUX.build.board=GENERIC_WB55CGUX
GenWB.menu.pnum.GENERIC_WB55CGUX.build.product_line=STM32WB55xx
GenWB.menu.pnum.GENERIC_WB55CGUX.build.variant=STM32WBxx/WB55C(C-E-G)U
+# Generic WB5MMGHx
+GenWB.menu.pnum.GENERIC_WB5MMGHX=Generic WB5MMGHx
+GenWB.menu.pnum.GENERIC_WB5MMGHX.upload.maximum_size=827392
+GenWB.menu.pnum.GENERIC_WB5MMGHX.upload.maximum_data_size=196608
+GenWB.menu.pnum.GENERIC_WB5MMGHX.build.board=GENERIC_WB5MMGHX
+GenWB.menu.pnum.GENERIC_WB5MMGHX.build.product_line=STM32WB5Mxx
+GenWB.menu.pnum.GENERIC_WB5MMGHX.build.variant=STM32WBxx/WB5MMGH
+
# Generic WB55RCVx
GenWB.menu.pnum.GENERIC_WB55RCVX=Generic WB55RCVx
GenWB.menu.pnum.GENERIC_WB55RCVX.upload.maximum_size=131072
diff --git a/cores/arduino/stm32/lock_resource.h b/cores/arduino/stm32/lock_resource.h
index 99d50351a7..4a8ad1de5e 100644
--- a/cores/arduino/stm32/lock_resource.h
+++ b/cores/arduino/stm32/lock_resource.h
@@ -35,12 +35,41 @@ typedef enum {
* HW semaphore Complement ID list defined in hw_conf.h from STM32WB.
* They could be used also for H7 dualcore targets.
*/
+
+/**
+ * The CPU2 may be configured to store the Thread persistent data either in internal NVM storage on CPU2 or in
+ * SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
+ * When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
+ * In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
+ * + CPU1 takes CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
+ * + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
+ * + CPU1 releases CFG_HW_THREAD_NVM_SRAM_SEMID semaphore
+ * CFG_HW_THREAD_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
+ * There is no timing constraint on how long this semaphore can be kept.
+ */
+#define CFG_HW_THREAD_NVM_SRAM_SEMID 9
+
+/**
+ * The CPU2 may be configured to store the BLE persistent data either in internal NVM storage on CPU2 or in
+ * SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()
+ * When the CPU2 is requested to store persistent data in SRAM2, it can write data in this buffer at any time when needed.
+ * In order to read consistent data with the CPU1 from the SRAM2 buffer, the flow should be:
+ * + CPU1 takes CFG_HW_BLE_NVM_SRAM_SEMID semaphore
+ * + CPU1 reads all persistent data from SRAM2 (most of the time, the goal is to write these data into an NVM managed by CPU1)
+ * + CPU1 releases CFG_HW_BLE_NVM_SRAM_SEMID semaphore
+ * CFG_HW_BLE_NVM_SRAM_SEMID semaphore makes sure CPU2 does not update the persistent data in SRAM2 at the same time CPU1 is reading them.
+ * There is no timing constraint on how long this semaphore can be kept.
+ */
+#define CFG_HW_BLE_NVM_SRAM_SEMID 8
+
/*
* Index of the semaphore used by CPU2 to prevent the CPU1 to either write or
* erase data in flash. The CPU1 shall not either write or erase in flash when
* this semaphore is taken by the CPU2. When the CPU1 needs to either write or
* erase in flash, it shall first get the semaphore and release it just
* after writing a raw (64bits data) or erasing one sector.
+ * Once the Semaphore has been released, there shall be at least 1us before it can be taken again. This is required
+ * to give the opportunity to CPU2 to take it.
* On v1.4.0 and older CPU2 wireless firmware, this semaphore is unused and
* CPU2 is using PES bit. By default, CPU2 is using the PES bit to protect its
* timing. The CPU1 may request the CPU2 to use the semaphore instead of the
diff --git a/libraries/IWatchdog/src/IWatchdog.cpp b/libraries/IWatchdog/src/IWatchdog.cpp
index 02aca8db67..b44f8a80e3 100644
--- a/libraries/IWatchdog/src/IWatchdog.cpp
+++ b/libraries/IWatchdog/src/IWatchdog.cpp
@@ -38,7 +38,7 @@ void IWatchdogClass::begin(uint32_t timeout, uint32_t window)
}
// Enable the peripheral clock IWDG
-#ifdef STM32WBxx
+#ifdef RCC_CSR_LSI1ON
LL_RCC_LSI1_Enable();
while (LL_RCC_LSI1_IsReady() != 1) {
}
diff --git a/libraries/RGB_LED_TLC59731/examples/RGB_LED_TLC59731/RGB_LED_TLC59731.ino b/libraries/RGB_LED_TLC59731/examples/RGB_LED_TLC59731/RGB_LED_TLC59731.ino
new file mode 100644
index 0000000000..a5287a0cd3
--- /dev/null
+++ b/libraries/RGB_LED_TLC59731/examples/RGB_LED_TLC59731/RGB_LED_TLC59731.ino
@@ -0,0 +1,51 @@
+/*
+ RGB_LED_TLC59731
+
+ This example code is in the public domain.
+
+ Blink one RGB LED with different default colors:
+ RGB_LED_TLC59731::OFF
+ RGB_LED_TLC59731::RED
+ RGB_LED_TLC59731::GREEN
+ RGB_LED_TLC59731::BLUE
+ RGB_LED_TLC59731::MAGENTA
+ RGB_LED_TLC59731::CYAN
+ RGB_LED_TLC59731::YELLOW
+ RGB_LED_TLC59731::WHITE
+*/
+
+#include
+
+static uint8_t step = 0;
+static uint8_t* sequence[] = { RGB_LED_TLC59731::RED,
+ RGB_LED_TLC59731::GREEN,
+ RGB_LED_TLC59731::BLUE,
+ RGB_LED_TLC59731::MAGENTA,
+ RGB_LED_TLC59731::CYAN,
+ RGB_LED_TLC59731::YELLOW,
+ RGB_LED_TLC59731::WHITE
+ };
+/**
+ STM32WB5MM-DK have an RGB LED connected to TLC59731
+ It requires to enable it thanks LED_SELECT pin
+ and to have JP5 on and JP4 off
+*/
+#if defined(RGB_LED) && defined(LED_SELECT)
+RGB_LED_TLC59731 LED(RGB_LED, LED_SELECT);
+#else
+RGB_LED_TLC59731 LED;
+#endif
+
+void setup() {
+ /* Change Brightness */
+ LED.setBrightness(0x10);
+}
+
+void loop() {
+ /* Blink */
+ LED.on(sequence[step]);
+ delay(500);
+ LED.off();
+ delay(500);
+ step = (step == 6) ? 0 : step + 1;
+}
diff --git a/libraries/RGB_LED_TLC59731/keywords.txt b/libraries/RGB_LED_TLC59731/keywords.txt
new file mode 100644
index 0000000000..bb49f42a95
--- /dev/null
+++ b/libraries/RGB_LED_TLC59731/keywords.txt
@@ -0,0 +1,31 @@
+#######################################
+# Syntax Coloring Map For RGB_LED_TLC59731
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+RGB_LED_TLC59731 KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+on KEYWORD2
+off KEYWORD2
+getBrightness KEYWORD2
+setBrightness KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+
+OFF LITERAL1
+RED LITERAL1
+GREEN LITERAL1
+BLUE LITERAL1
+MAGENTA LITERAL1
+CYAN LITERAL1
+YELLOW LITERAL1
+WHITE LITERAL
diff --git a/libraries/RGB_LED_TLC59731/library.properties b/libraries/RGB_LED_TLC59731/library.properties
new file mode 100644
index 0000000000..bc88bbc407
--- /dev/null
+++ b/libraries/RGB_LED_TLC59731/library.properties
@@ -0,0 +1,9 @@
+name=RGB LED TLC59731
+version=1.0.0
+author=Frederic Pillon
+maintainer=stm32duino
+sentence=Allows to control one RGB LED driven by TLC59731 PWM LED Driver
+paragraph=Control one RGB LED driven by TLC59731 PWM LED Driver
+category=Signal Input/Output
+url=https://github.com/stm32duino/Arduino_Core_STM32/tree/master/libraries/RGB_LED_TLC59731
+architectures=stm32
diff --git a/libraries/RGB_LED_TLC59731/src/RGB_LED_TLC59731.cpp b/libraries/RGB_LED_TLC59731/src/RGB_LED_TLC59731.cpp
new file mode 100644
index 0000000000..9431a2a74b
--- /dev/null
+++ b/libraries/RGB_LED_TLC59731/src/RGB_LED_TLC59731.cpp
@@ -0,0 +1,142 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#include "RGB_LED_TLC59731.h"
+
+#define WRITE_COMMAND 0x3A
+#ifndef DEFAULT_BRIGHTNESS
+ #define DEFAULT_BRIGHTNESS 0x41
+#endif
+uint8_t RGB_LED_TLC59731::brightness = DEFAULT_BRIGHTNESS;
+uint8_t RGB_LED_TLC59731::OFF[3] = {0, 0, 0 };
+uint8_t RGB_LED_TLC59731::RED[3] = {DEFAULT_BRIGHTNESS, 0, 0 };
+uint8_t RGB_LED_TLC59731::GREEN[3] = {0, DEFAULT_BRIGHTNESS, 0 };
+uint8_t RGB_LED_TLC59731::BLUE[3] = {0, 0, DEFAULT_BRIGHTNESS};
+uint8_t RGB_LED_TLC59731::MAGENTA[3] = {DEFAULT_BRIGHTNESS, 0, DEFAULT_BRIGHTNESS};
+uint8_t RGB_LED_TLC59731::CYAN[3] = {0, DEFAULT_BRIGHTNESS, DEFAULT_BRIGHTNESS};
+uint8_t RGB_LED_TLC59731::YELLOW[3] = {DEFAULT_BRIGHTNESS, DEFAULT_BRIGHTNESS, 0 };
+uint8_t RGB_LED_TLC59731::WHITE[3] = {DEFAULT_BRIGHTNESS, DEFAULT_BRIGHTNESS, DEFAULT_BRIGHTNESS};
+
+/**
+ * @brief Set RGB LED color
+ * @param rgb[3]: red,green, blue value in range [0-255]
+ * @retval None
+ */
+void RGB_LED_TLC59731::on(uint8_t rgb[3])
+{
+ on(rgb[0], rgb[1], rgb[2]);
+}
+
+/**
+ * @brief Set RGB LED color
+ * @param red: red value in range [0-255]
+ * @param green: green value in range [0-255]
+ * @param blue: blue value in range [0-255]
+ * @retval None
+ */
+void RGB_LED_TLC59731::on(uint8_t red, uint8_t green, uint8_t blue)
+{
+ if (!_enabled) {
+ if (_enable_pin != NC) {
+ pinMode(pinNametoDigitalPin(_enable_pin), OUTPUT);
+ digitalWriteFast(_enable_pin, HIGH);
+ }
+
+ pinMode(pinNametoDigitalPin(_rgb_pin), OUTPUT);
+ _enabled = true;
+ }
+ /* Data Transfer Rate (T_CYCLE) Measurement Sequence */
+ digitalWriteFast(_rgb_pin, HIGH);
+ delayMicroseconds(_T_Rise);
+ digitalWriteFast(_rgb_pin, LOW);
+ delayMicroseconds(_T_Cycle0);
+ /* Write command */
+ senByte(WRITE_COMMAND);
+ /* Write the GS data */
+ senByte(red);
+ senByte(green);
+ senByte(blue);
+ /* GS Latch */
+ delayMicroseconds(_T_GS_Lat);
+}
+
+/**
+ * @brief Set RGB LED Off
+ * @param None
+ * @retval None
+ */
+void RGB_LED_TLC59731::off(void)
+{
+ /* Set RGB LED off value */
+ on(RGB_LED_TLC59731::OFF);
+ pinMode(pinNametoDigitalPin(_rgb_pin), INPUT_ANALOG);
+
+ if (_enable_pin != NC) {
+ digitalWriteFast(_enable_pin, LOW);
+ pinMode(pinNametoDigitalPin(_enable_pin), INPUT_ANALOG);
+ _enabled = false;
+ }
+}
+
+/**
+ * @brief Set brightness value
+ * @param value: new brightness value
+ * @retval None
+ */
+void RGB_LED_TLC59731::setBrightness(uint8_t value)
+{
+ RGB_LED_TLC59731::brightness = value;
+ RGB_LED_TLC59731::RED[0] = value;
+ RGB_LED_TLC59731::GREEN[1] = value;
+ RGB_LED_TLC59731::BLUE[2] = value;
+ RGB_LED_TLC59731::MAGENTA[0] = value;
+ RGB_LED_TLC59731::MAGENTA[2] = value;
+ RGB_LED_TLC59731::CYAN[1] = value;
+ RGB_LED_TLC59731::CYAN[2] = value;
+ RGB_LED_TLC59731::YELLOW[0] = value;
+ RGB_LED_TLC59731::YELLOW[1] = value;
+ RGB_LED_TLC59731::WHITE[0] = value;
+ RGB_LED_TLC59731::WHITE[1] = value;
+ RGB_LED_TLC59731::WHITE[2] = value;
+}
+
+/* Private */
+void RGB_LED_TLC59731::sendBit(uint8_t bit)
+{
+ /* Start next cycle */
+ digitalWriteFast(_rgb_pin, HIGH);
+ delayMicroseconds(_T_Rise);
+ digitalWriteFast(_rgb_pin, LOW);
+ delayMicroseconds(_T_Rise);
+
+ if (bit) {
+ digitalWriteFast(_rgb_pin, HIGH);
+ delayMicroseconds(_T_Rise);
+ digitalWriteFast(_rgb_pin, LOW);
+ delayMicroseconds(_T_Cycle1);
+ } else {
+ delayMicroseconds(_T_Cycle0);
+ }
+}
+
+
+void RGB_LED_TLC59731::senByte(uint8_t byte)
+{
+ sendBit(byte & (1 << 7));
+ sendBit(byte & (1 << 6));
+ sendBit(byte & (1 << 5));
+ sendBit(byte & (1 << 4));
+ sendBit(byte & (1 << 3));
+ sendBit(byte & (1 << 2));
+ sendBit(byte & (1 << 1));
+ sendBit(byte & (1 << 0));
+}
diff --git a/libraries/RGB_LED_TLC59731/src/RGB_LED_TLC59731.h b/libraries/RGB_LED_TLC59731/src/RGB_LED_TLC59731.h
new file mode 100644
index 0000000000..e80698bbc3
--- /dev/null
+++ b/libraries/RGB_LED_TLC59731/src/RGB_LED_TLC59731.h
@@ -0,0 +1,57 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __RGB_LED_TLC59731_H__
+#define __RGB_LED_TLC59731_H__
+
+#include "Arduino.h"
+
+class RGB_LED_TLC59731 {
+
+ public:
+ RGB_LED_TLC59731(uint32_t rgb_pin = LED_BUILTIN, uint32_t enable_pin = NC):
+ _rgb_pin(digitalPinToPinName(rgb_pin)), _enable_pin(digitalPinToPinName(enable_pin)) {};
+ void on(uint8_t rgb[3]);
+ void on(uint8_t red, uint8_t green, uint8_t blue);
+ void off(void);
+ inline uint8_t getBrightness(void)
+ {
+ return brightness;
+ }
+ void setBrightness(uint8_t value);
+
+ static uint8_t brightness;
+ static uint8_t OFF[3];
+ static uint8_t RED[3];
+ static uint8_t GREEN[3];
+ static uint8_t BLUE[3];
+ static uint8_t MAGENTA[3];
+ static uint8_t CYAN[3];
+ static uint8_t YELLOW[3];
+ static uint8_t WHITE[3];
+
+ private:
+ PinName _rgb_pin;
+ PinName _enable_pin;
+
+ bool _enabled{false};
+ const uint32_t _T_Rise{1};
+ const uint32_t _T_Cycle0{4};
+ const uint32_t _T_Cycle1{1};
+ // GS Data Latch (GSLAT) Sequence delay
+ const uint32_t _T_GS_Lat{_T_Cycle0 * 8};
+
+ void sendBit(uint8_t bit);
+ void senByte(uint8_t byte);
+};
+
+#endif /* __RGB_LED_TLC59731_H__ */
diff --git a/libraries/SrcWrapper/src/stm32/clock.c b/libraries/SrcWrapper/src/stm32/clock.c
index a50109a89f..d1e4bae99b 100644
--- a/libraries/SrcWrapper/src/stm32/clock.c
+++ b/libraries/SrcWrapper/src/stm32/clock.c
@@ -91,7 +91,7 @@ void enableClock(sourceClock_t source)
switch (source) {
case LSI_CLOCK:
-#ifdef STM32WBxx
+#ifdef RCC_FLAG_LSI1RDY
if (__HAL_RCC_GET_FLAG(RCC_FLAG_LSI1RDY) == RESET) {
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI1;
#else
diff --git a/variants/STM32WBxx/WB5MMGH/PeripheralPins_STM32WB5MM_DK.c b/variants/STM32WBxx/WB5MMGH/PeripheralPins_STM32WB5MM_DK.c
new file mode 100644
index 0000000000..43e06bbf02
--- /dev/null
+++ b/variants/STM32WBxx/WB5MMGH/PeripheralPins_STM32WB5MM_DK.c
@@ -0,0 +1,290 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2020-2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+/*
+ * Automatically generated from STM32WB5MMGHx.xml
+ * CubeMX DB release 6.0.21
+ */
+#if defined(ARDUINO_STM32WB5MM_DK)
+#include "Arduino.h"
+#include "PeripheralPins.h"
+
+/* =====
+ * Notes:
+ * - The pins mentioned Px_y_ALTz are alternative possibilities which use other
+ * HW peripheral instances. You can use them the same way as any other "normal"
+ * pin (i.e. analogWrite(PA7_ALT1, 128);).
+ *
+ * - Commented lines are alternative possibilities which are not used per default.
+ * If you change them, you will have to know what you do
+ * =====
+ */
+
+//*** ADC ***
+
+#ifdef HAL_ADC_MODULE_ENABLED
+WEAK const PinMap PinMap_ADC[] = {
+ {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
+ {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
+ {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
+ // {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
+ {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
+ {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
+ {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
+ {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
+ // {PA_8, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
+ // {PA_9, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16
+ {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
+ {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
+ {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
+ {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
+ {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
+ {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
+ {NC, NP, 0}
+};
+#endif
+
+//*** No DAC ***
+
+//*** I2C ***
+
+#ifdef HAL_I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SDA[] = {
+ {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ // {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ // {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_11, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {PB_14, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SCL[] = {
+ {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ // {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ // {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_10, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {PB_13, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {NC, NP, 0}
+};
+#endif
+
+//*** TIM ***
+
+#ifdef HAL_TIM_MODULE_ENABLED
+WEAK const PinMap PinMap_TIM[] = {
+ {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+ {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+ {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+ // {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+ {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+ {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1
+ {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+ {PA_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1
+ {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+ {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+ {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+ // {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+ {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+ // {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+ // {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N
+ // {PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N
+ {PB_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+ {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1
+ // {PB_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+ // {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1
+ {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+ // {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+ // {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+ {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+ {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+ {PD_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+ {PD_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+ {PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1
+ // {PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1
+ {NC, NP, 0}
+};
+#endif
+
+//*** UART ***
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_TX[] = {
+ {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ // {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ // {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RX[] = {
+ // {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PA_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RTS[] = {
+ // {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ // {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_CTS[] = {
+ {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ // {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
+ {NC, NP, 0}
+};
+#endif
+
+//*** SPI ***
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MOSI[] = {
+ {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ // {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
+ {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MISO[] = {
+ {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ // {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SCLK[] = {
+ {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ // {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ // {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ // {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ // {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SSEL[] = {
+ {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ // {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {NC, NP, 0}
+};
+#endif
+
+//*** No CAN ***
+
+//*** No ETHERNET ***
+
+//*** QUADSPI ***
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_DATA0[] = {
+ {PB_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0
+ {PD_4, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_DATA1[] = {
+ {PB_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1
+ {PD_5, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_DATA2[] = {
+ {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2
+ {PD_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_DATA3[] = {
+ {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3
+ {PD_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_SCLK[] = {
+ {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK
+ {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_SSEL[] = {
+ {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS
+ // {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS
+ {PD_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS
+ {NC, NP, 0}
+};
+#endif
+
+//*** USB ***
+
+#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED)
+WEAK const PinMap PinMap_USB[] = {
+ {PA_11, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_USB)}, // USB_DM
+ {PA_12, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_USB)}, // USB_DP
+ // {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE
+ // {PC_9, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE
+ {NC, NP, 0}
+};
+#endif
+
+//*** No SD ***
+
+#endif /* ARDUINO_STM32WB5MM_DK */
diff --git a/variants/STM32WBxx/WB5MMGH/generic_clock.c b/variants/STM32WBxx/WB5MMGH/generic_clock.c
index d4890fb05e..0ee30fc00b 100644
--- a/variants/STM32WBxx/WB5MMGH/generic_clock.c
+++ b/variants/STM32WBxx/WB5MMGH/generic_clock.c
@@ -12,6 +12,7 @@
*/
#if defined(ARDUINO_GENERIC_WB5MMGHX)
#include "pins_arduino.h"
+#include "lock_resource.h"
/**
* @brief System Clock Configuration
@@ -20,8 +21,75 @@
*/
WEAK void SystemClock_Config(void)
{
- /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
+
+ /* This prevents concurrent access to RCC registers by CPU2 (M0+) */
+ hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */
+ hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
+ | RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
+ RCC_OscInitStruct.PLL.PLLN = 32;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+ /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2
+ | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV2;
+ RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
+ Error_Handler();
+ }
+ /** Initializes the peripherals clocks
+ */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_CLK48SEL
+ | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_RNG;
+ PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
+ PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSI;
+ PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+ LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
+ LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
+ LL_PWR_SMPS_Enable();
+
+ /* Select HSI as system clock source after Wake Up from Stop mode */
+ LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
+
+ hsem_unlock(CFG_HW_RCC_SEMID);
}
#endif /* ARDUINO_GENERIC_* */
diff --git a/variants/STM32WBxx/WB5MMGH/ldscript.ld b/variants/STM32WBxx/WB5MMGH/ldscript.ld
new file mode 100644
index 0000000000..4c8c525f22
--- /dev/null
+++ b/variants/STM32WBxx/WB5MMGH/ldscript.ld
@@ -0,0 +1,176 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : STM32CubeIDE
+**
+** Abstract : Linker script for STM32WB5MMG Device
+** 1024Kbytes FLASH
+** 256Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © Copyright (c) 2020 STMicroelectronics.
+** All rights reserved.
+**
+** This software component is licensed by ST under BSD 3-Clause license,
+** the "License"; You may not use this file except in compliance with the
+** License. You may obtain a copy of the License at:
+** opensource.org/licenses/BSD-3-Clause
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20030000; /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200 ; /* required amount of heap */
+_Min_Stack_Size = 0x400 ; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+RAM1 (xrw) : ORIGIN = 0x20000004, LENGTH = LD_MAX_DATA_SIZE - 4
+RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K
+}
+
+/* Define output sections */
+SECTIONS
+{
+ /* The startup code goes first into FLASH */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data goes into FLASH */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data goes into FLASH */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+ .ARM : {
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ } >FLASH
+
+ .preinit_array :
+ {
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } >FLASH
+ .init_array :
+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } >FLASH
+ .fini_array :
+ {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >FLASH
+
+ /* used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections goes into RAM, load LMA copy after code */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+ } >RAM1 AT> FLASH
+
+ /* Uninitialized data section */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM1
+
+ /* User_heap_stack section, used to check that there is enough RAM left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM1
+
+ /* Remove information from the standard libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+ MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
+ MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
+ MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
+}
+
+
diff --git a/variants/STM32WBxx/WB5MMGH/variant_STM32WB5MM_DK.cpp b/variants/STM32WBxx/WB5MMGH/variant_STM32WB5MM_DK.cpp
new file mode 100644
index 0000000000..bd32ef83b9
--- /dev/null
+++ b/variants/STM32WBxx/WB5MMGH/variant_STM32WB5MM_DK.cpp
@@ -0,0 +1,199 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#if defined(ARDUINO_STM32WB5MM_DK)
+#include "pins_arduino.h"
+#include "lock_resource.h"
+
+// Digital PinName array
+const PinName digitalPin[] = {
+ PC_0, // D0/A9
+ PB_5, // D1
+ PD_12, // D2
+ PD_14, // D3
+ PE_4, // D4
+ PB_10, // D5
+ PE_0, // D6
+ PB_2, // D7
+ PD_13, // D8
+ PD_15, // D9
+ PA_4, // D10/A10
+ PA_7, // D11/A11
+ PB_4, // D12
+ PA_1, // D13/A12
+ PA_10, // D14
+ PB_8, // D15
+ PC_3, // D16/A0
+ PA_2, // D17/A1
+ PA_5, // D18/A2
+ PC_1, // D19/A3
+ PC_4, // D20/A4
+ PC_5, // D21/A5
+ PD_0, // D22
+ PA_6, // D23/A6
+ PD_4, // D24
+ PC_2, // D25/A7
+ PD_1, // D26
+ PB_12, // D27
+ PB_15, // D28
+ PB_14, // D29
+ PE_3, // D30
+ PD_8, // D31
+ PA_0, // D32/A8
+ PA_15, // D33
+ PC_11, // D34
+ PC_10, // D35
+ PC_12, // D36
+ PC_13, // D37
+ PB_6, // D38
+ PB_7, // D39
+ PA_11, // D40
+ PA_12, // D41
+ PD_3, // D42
+ PA_3, // D43
+ PB_9, // D44
+ PD_5, // D45
+ PD_6, // D46
+ PD_7, // D47
+ PA_8, // D48
+ PA_9, // D49
+ PC_6, // D50
+ PC_7, // D51
+ PD_10, // D52
+ PD_11, // D53
+ PC_8, // D54
+ PC_9, // D55
+ PH_0, // D56
+ PB_11, // D57
+ PB_13, // D58
+ PD_2, // D59
+ PD_9, // D60
+ PE_1, // D61
+ PA_13, // D62
+ PA_14, // D63
+ PB_3, // D64
+ PE_2, // D65
+ PH_1, // D66
+ PH_3 // D67
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+ 16, // A0, PC3
+ 17, // A1, PA2
+ 18, // A2, PA5
+ 19, // A3, PC1
+ 20, // A4, PC4
+ 21, // A5, PC5
+ 23, // A6, PA6
+ 25, // A7, PC2
+ 32, // A8, PA0
+ 0, // A9, PC0
+ 10, // A10, PA4
+ 11, // A11, PA7
+ 13 // A12, PA1
+};
+
+// ----------------------------------------------------------------------------
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief System Clock Configuration
+ * @param None
+ * @retval None
+ */
+WEAK void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
+
+ /* This prevents concurrent access to RCC registers by CPU2 (M0+) */
+ hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
+
+ /** Configure LSE Drive Capability
+ */
+ HAL_PWR_EnableBkUpAccess();
+ __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */
+ hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
+ | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
+ RCC_OscInitStruct.PLL.PLLN = 8;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+ /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2
+ | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV2;
+ RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
+ Error_Handler();
+ }
+ /** Initializes the peripherals clocks
+ */
+ /* RNG needs to be configured like in M0 core, i.e. with HSI48 */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP
+ | RCC_PERIPHCLK_CLK48SEL | RCC_PERIPHCLK_USB
+ | RCC_PERIPHCLK_RNG;
+ PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
+ PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
+ PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
+ PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE0;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+
+ LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
+ LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
+ LL_PWR_SMPS_Enable();
+
+ /* Select HSI as system clock source after Wake Up from Stop mode */
+ LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
+
+ hsem_unlock(CFG_HW_RCC_SEMID);
+}
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* ARDUINO_STM32WB5MM_DK */
diff --git a/variants/STM32WBxx/WB5MMGH/variant_STM32WB5MM_DK.h b/variants/STM32WBxx/WB5MMGH/variant_STM32WB5MM_DK.h
new file mode 100644
index 0000000000..026f1a0dac
--- /dev/null
+++ b/variants/STM32WBxx/WB5MMGH/variant_STM32WB5MM_DK.h
@@ -0,0 +1,187 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2020-2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/*----------------------------------------------------------------------------
+ * STM32 pins number
+ *----------------------------------------------------------------------------*/
+// Arduino UNO V3
+// CN4
+#define PC0 PIN_A9 // STMOD+ 3
+#define PB5 1 // STMOD+ 2
+#define PD12 2
+#define PD14 3
+#define PE4 4
+#define PB10 5
+#define PE0 6
+#define PB2 7
+// CN1
+#define PD13 8
+#define PD15 9
+#define PA4 PIN_A10
+#define PA7 PIN_A11 // LD4
+#define PB4 12
+#define PA1 PIN_A12
+#define PA10 14 // STMOD+ 10
+#define PB8 15 // STMOD+ 7
+// CN3
+#define PC3 PIN_A0
+#define PA2 PIN_A1
+#define PA5 PIN_A2 // STMOD+ 19
+#define PC1 PIN_A3 // STMOD+ 20
+#define PC4 PIN_A4
+#define PC5 PIN_A5
+// STMOD+ (CN5)
+#define PD0 22 // 1
+#define PA6 PIN_A6 // 1
+#define PD4 24 // 2
+#define PC2 PIN_A7 // 3
+#define PD1 26 // 4
+#define PB12 27 // 4
+#define PB15 28 // 8
+#define PB14 29 // 9
+#define PE3 30 // 11
+#define PD8 31 // 12
+#define PA0 PIN_A8 // 13
+#define PA15 33 // 14
+#define PC11 34 // 17
+#define PC10 35 // 18
+// USER button
+#define PC12 36 // USER_B1
+#define PC13 37 // USER_B2
+// VCP
+#define PB6 38 // VCP TX
+#define PB7 39 // VCP RX
+// USB user
+#define PA11 40 // USB_DM
+#define PA12 41 // USB_DP
+// QSPI
+#define PD3 42 // QSPI_BK_NCS
+#define PA3 43 // QSPI_BK_SCK
+#define PB9 44 // QSPI_BK_IO0 - IR_OUT
+#define PD5 45 // QSPI_BK_IO1
+#define PD6 46 // QSPI_BK_IO2
+#define PD7 47 // QSPI_BK_IO3
+// IMP34DT05TR
+#define PA8 48 // CLK
+#define PA9 49 // DOUT
+// Touch sensor
+#define PC6 50 // TSC_G4_IO1
+#define PC7 51 // TSC_G4_IO2
+#define PD10 52 // TSC_G6_IO1
+#define PD11 53 // TSC_G6_IO2
+// OLED display
+#define PC8 54 // RST_DISP
+#define PC9 55 // D/C_DISP
+#define PH0 56 // CS_DISP
+// I2C interface for ISM330DHCX, STTS22H and VL53L0CXV0DH/1
+#define PB11 57 // I2C3_SDA
+#define PB13 58 // I2C3_SCL
+#define PD2 59 // INT ISM330DHCX
+#define PD9 60 // INT VL53L0CXV0DH/1
+#define PE1 61 // DRDY STTS22H
+// Tag connect CN7
+#define PA13 62 // SWDIO
+#define PA14 63 // SWCLK
+#define PB3 64 // SWO
+// Other
+#define PE2 65 // GPIO_SELECT1 (Ctrl switch LPUART)
+#define PH1 66 // GPIO_SELECT2 (RGB LED/Infrared LED)
+#define PH3 67 // BOOT0
+
+// Alias
+#define LED_SELECT PH1
+#define RGB_LED PA7
+#define IR_LED PB9
+#define LPUART_SELECT PE2
+
+// Alternate pins number
+#define PA7_ALT1 (PA7 | ALT1)
+#define PB8_ALT1 (PB8 | ALT1)
+#define PB9_ALT1 (PB9 | ALT1)
+
+#define NUM_DIGITAL_PINS 68
+#define NUM_ANALOG_INPUTS 13
+
+// On-board LED pin number
+#define LD4 PA7 // LED RGB
+#ifndef LED_BUILTIN
+ #define LED_BUILTIN LD4
+#endif
+
+// On-board user button
+#define USER_B1 PC12
+#define USER_B2 PC13
+#ifndef USER_BTN
+ #define USER_BTN USER_B1
+#endif
+
+// Timer Definitions
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#ifndef TIMER_TONE
+ #define TIMER_TONE TIM16
+#endif
+#ifndef TIMER_SERVO
+ #define TIMER_SERVO TIM17
+#endif
+
+// UART Definitions
+#ifndef SERIAL_UART_INSTANCE
+ #define SERIAL_UART_INSTANCE 1
+#endif
+
+// Default pin used for generic 'Serial' instance
+// Mandatory for Firmata
+#ifndef PIN_SERIAL_RX
+ #define PIN_SERIAL_RX PB7
+#endif
+#ifndef PIN_SERIAL_TX
+ #define PIN_SERIAL_TX PB6
+#endif
+
+// Only 512k provided for cpu1, so defined the FLASH_PAGE_NUMBER
+// for EEPROM emulation to the last 808k pages.
+#define FLASH_PAGE_NUMBER 201
+
+// Extra HAL modules
+#if !defined(HAL_QSPI_MODULE_DISABLED)
+ #define HAL_QSPI_MODULE_ENABLED
+#endif
+
+/*----------------------------------------------------------------------------
+ * Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+ // These serial port names are intended to allow libraries and architecture-neutral
+ // sketches to automatically default to the correct port name for a particular type
+ // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+ // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+ //
+ // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
+ //
+ // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
+ //
+ // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
+ //
+ // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
+ //
+ // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
+ // pins are NOT connected to anything by default.
+ #ifndef SERIAL_PORT_MONITOR
+ #define SERIAL_PORT_MONITOR Serial
+ #endif
+ #ifndef SERIAL_PORT_HARDWARE
+ #define SERIAL_PORT_HARDWARE Serial
+ #endif
+#endif