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Merge pull request #1465 from fpistm/UpdateWL
Update STM32WL HAL and CMSIS drivers
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‎libraries/SrcWrapper/src/HAL/stm32yyxx_hal_smbus_ex.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,5 +14,7 @@
1414
#include "stm32l5xx_hal_smbus_ex.c"
1515
#elif STM32WBxx
1616
#include "stm32wbxx_hal_smbus_ex.c"
17+
#elif STM32WLxx
18+
#include "stm32wlxx_hal_smbus_ex.c"
1719
#endif
1820
#pragma GCC diagnostic pop

‎system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/stm32wl54xx.h

Lines changed: 17 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -14,13 +14,12 @@
1414
******************************************************************************
1515
* @attention
1616
*
17-
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
18-
* All rights reserved.</center></h2>
17+
* Copyright (c) 2020(-2021) STMicroelectronics.
18+
* All rights reserved.
1919
*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
22-
* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
20+
* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
22+
* If no LICENSE file comes with this software, it is provided AS-IS.
2423
*
2524
******************************************************************************
2625
*/
@@ -206,7 +205,7 @@ typedef enum
206205
#define __VTOR_PRESENT 1U /*!< Vector Table Register supported */
207206
#define __NVIC_PRIO_BITS 4U /*!< STM32WLxx uses 4 Bits for the Priority Levels */
208207
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
209-
#define __FPU_PRESENT 0U /*!< FPU present */
208+
#define __FPU_PRESENT 0U /*!< FPU not present */
210209

211210
#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
212211

@@ -481,7 +480,7 @@ typedef struct
481480
} GPIO_TypeDef;
482481

483482
/**
484-
* @brief Global TrustZone Controller
483+
* @brief Global Security Controller
485484
*/
486485
typedef struct{
487486
__IO uint32_t CR; /*!< TZSC control register, Address offset: 0x00 */
@@ -1188,6 +1187,15 @@ typedef struct
11881187
* @{
11891188
*/
11901189

1190+
/** @addtogroup Hardware_Constant_Definition
1191+
* @{
1192+
*/
1193+
#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
1194+
1195+
/**
1196+
* @}
1197+
*/
1198+
11911199
/** @addtogroup Peripheral_Registers_Bits_Definition
11921200
* @{
11931201
*/
@@ -4001,7 +4009,7 @@ typedef struct
40014009

40024010
/******************************************************************************/
40034011
/* */
4004-
/* Global TrustZone Control */
4012+
/* Global Security Control */
40054013
/* */
40064014
/******************************************************************************/
40074015
/******************* Bits definition for registers x = 0 ********************/

‎system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/stm32wl55xx.h

Lines changed: 17 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -14,13 +14,12 @@
1414
******************************************************************************
1515
* @attention
1616
*
17-
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
18-
* All rights reserved.</center></h2>
17+
* Copyright (c) 2020(-2021) STMicroelectronics.
18+
* All rights reserved.
1919
*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
22-
* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
20+
* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
22+
* If no LICENSE file comes with this software, it is provided AS-IS.
2423
*
2524
******************************************************************************
2625
*/
@@ -206,7 +205,7 @@ typedef enum
206205
#define __VTOR_PRESENT 1U /*!< Vector Table Register supported */
207206
#define __NVIC_PRIO_BITS 4U /*!< STM32WLxx uses 4 Bits for the Priority Levels */
208207
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
209-
#define __FPU_PRESENT 0U /*!< FPU present */
208+
#define __FPU_PRESENT 0U /*!< FPU not present */
210209

211210
#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
212211

@@ -481,7 +480,7 @@ typedef struct
481480
} GPIO_TypeDef;
482481

483482
/**
484-
* @brief Global TrustZone Controller
483+
* @brief Global Security Controller
485484
*/
486485
typedef struct{
487486
__IO uint32_t CR; /*!< TZSC control register, Address offset: 0x00 */
@@ -1188,6 +1187,15 @@ typedef struct
11881187
* @{
11891188
*/
11901189

1190+
/** @addtogroup Hardware_Constant_Definition
1191+
* @{
1192+
*/
1193+
#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
1194+
1195+
/**
1196+
* @}
1197+
*/
1198+
11911199
/** @addtogroup Peripheral_Registers_Bits_Definition
11921200
* @{
11931201
*/
@@ -4001,7 +4009,7 @@ typedef struct
40014009

40024010
/******************************************************************************/
40034011
/* */
4004-
/* Global TrustZone Control */
4012+
/* Global Security Control */
40054013
/* */
40064014
/******************************************************************************/
40074015
/******************* Bits definition for registers x = 0 ********************/

‎system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/stm32wle4xx.h

Lines changed: 15 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -14,13 +14,12 @@
1414
******************************************************************************
1515
* @attention
1616
*
17-
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
18-
* All rights reserved.</center></h2>
17+
* Copyright (c) 2020(-2021) STMicroelectronics.
18+
* All rights reserved.
1919
*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
22-
* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
20+
* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
22+
* If no LICENSE file comes with this software, it is provided AS-IS.
2423
*
2524
******************************************************************************
2625
*/
@@ -140,7 +139,7 @@ typedef enum
140139
#define __VTOR_PRESENT 1U /*!< Vector Table Register supported */
141140
#define __NVIC_PRIO_BITS 4U /*!< STM32WLxx uses 4 Bits for the Priority Levels */
142141
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
143-
#define __FPU_PRESENT 0U /*!< FPU present */
142+
#define __FPU_PRESENT 0U /*!< FPU not present */
144143

145144
#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
146145

@@ -1006,6 +1005,15 @@ typedef struct
10061005
* @{
10071006
*/
10081007

1008+
/** @addtogroup Hardware_Constant_Definition
1009+
* @{
1010+
*/
1011+
#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
1012+
1013+
/**
1014+
* @}
1015+
*/
1016+
10091017
/** @addtogroup Peripheral_Registers_Bits_Definition
10101018
* @{
10111019
*/

‎system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/stm32wle5xx.h

Lines changed: 15 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -14,13 +14,12 @@
1414
******************************************************************************
1515
* @attention
1616
*
17-
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
18-
* All rights reserved.</center></h2>
17+
* Copyright (c) 2020(-2021) STMicroelectronics.
18+
* All rights reserved.
1919
*
20-
* This software component is licensed by ST under Apache License, Version 2.0,
21-
* the "License"; You may not use this file except in compliance with the
22-
* License. You may obtain a copy of the License at:
23-
* opensource.org/licenses/Apache-2.0
20+
* This software is licensed under terms that can be found in the LICENSE file
21+
* in the root directory of this software component.
22+
* If no LICENSE file comes with this software, it is provided AS-IS.
2423
*
2524
******************************************************************************
2625
*/
@@ -140,7 +139,7 @@ typedef enum
140139
#define __VTOR_PRESENT 1U /*!< Vector Table Register supported */
141140
#define __NVIC_PRIO_BITS 4U /*!< STM32WLxx uses 4 Bits for the Priority Levels */
142141
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
143-
#define __FPU_PRESENT 0U /*!< FPU present */
142+
#define __FPU_PRESENT 0U /*!< FPU not present */
144143

145144
#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
146145

@@ -1006,6 +1005,15 @@ typedef struct
10061005
* @{
10071006
*/
10081007

1008+
/** @addtogroup Hardware_Constant_Definition
1009+
* @{
1010+
*/
1011+
#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
1012+
1013+
/**
1014+
* @}
1015+
*/
1016+
10091017
/** @addtogroup Peripheral_Registers_Bits_Definition
10101018
* @{
10111019
*/

‎system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/stm32wlxx.h

Lines changed: 105 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -8,21 +8,20 @@
88
* is using in the C source code, usually in main.c. This file contains:
99
* - Configuration section that allows to select:
1010
* - The STM32WLxx device used in the target application
11-
* - To use or not the peripheral’s drivers in application code(i.e.
12-
* code will be based on direct access to peripheral’s registers
11+
* - To use or not the peripheral’s drivers in application code(i.e.
12+
* code will be based on direct access to peripheral’s registers
1313
* rather than drivers API), this option is controlled by
1414
* "#define USE_HAL_DRIVER"
1515
*
1616
******************************************************************************
1717
* @attention
1818
*
19-
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
20-
* All rights reserved.</center></h2>
19+
* Copyright (c) 2020(-2021) STMicroelectronics.
20+
* All rights reserved.
2121
*
22-
* This software component is licensed by ST under Apache License, Version 2.0,
23-
* the "License"; You may not use this file except in compliance with the
24-
* License. You may obtain a copy of the License at:
25-
* opensource.org/licenses/Apache-2.0
22+
* This software is licensed under terms that can be found in the LICENSE file
23+
* in the root directory of this software component.
24+
* If no LICENSE file comes with this software, it is provided AS-IS.
2625
*
2726
******************************************************************************
2827
*/
@@ -80,7 +79,7 @@
8079
* @brief CMSIS Device version number
8180
*/
8281
#define __STM32WLxx_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */
83-
#define __STM32WLxx_CMSIS_VERSION_SUB1 (0x00U) /*!< [23:16] sub1 version */
82+
#define __STM32WLxx_CMSIS_VERSION_SUB1 (0x01U) /*!< [23:16] sub1 version */
8483
#define __STM32WLxx_CMSIS_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
8584
#define __STM32WLxx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
8685
#define __STM32WLxx_CMSIS_DEVICE_VERSION ((__STM32WLxx_CMSIS_VERSION_MAIN << 24)\
@@ -157,9 +156,105 @@ typedef enum
157156
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
158157

159158
#if defined(CORE_CM0PLUS)
159+
/* Use of interrupt control for register exclusive access (privileged mode only) */
160+
/* Atomic 32-bit register access macro to set one or several bits */
161+
#define ATOMIC_SET_BIT(REG, BIT) \
162+
do { \
163+
uint32_t primask; \
164+
primask = __get_PRIMASK(); \
165+
__set_PRIMASK(1); \
166+
SET_BIT((REG), (BIT)); \
167+
__set_PRIMASK(primask); \
168+
} while(0)
169+
170+
/* Atomic 32-bit register access macro to clear one or several bits */
171+
#define ATOMIC_CLEAR_BIT(REG, BIT) \
172+
do { \
173+
uint32_t primask; \
174+
primask = __get_PRIMASK(); \
175+
__set_PRIMASK(1); \
176+
CLEAR_BIT((REG), (BIT)); \
177+
__set_PRIMASK(primask); \
178+
} while(0)
179+
180+
/* Atomic 32-bit register access macro to clear and set one or several bits */
181+
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
182+
do { \
183+
uint32_t primask; \
184+
primask = __get_PRIMASK(); \
185+
__set_PRIMASK(1); \
186+
MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \
187+
__set_PRIMASK(primask); \
188+
} while(0)
189+
190+
/* Atomic 16-bit register access macro to set one or several bits */
191+
#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT)
192+
193+
/* Atomic 16-bit register access macro to clear one or several bits */
194+
#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT)
195+
196+
/* Atomic 16-bit register access macro to clear and set one or several bits */
197+
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)
198+
160199
#else
200+
/* Use of CMSIS compiler intrinsics for register exclusive access */
201+
/* Atomic 32-bit register access macro to set one or several bits */
202+
#define ATOMIC_SET_BIT(REG, BIT) \
203+
do { \
204+
uint32_t val; \
205+
do { \
206+
val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
207+
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
208+
} while(0)
209+
210+
/* Atomic 32-bit register access macro to clear one or several bits */
211+
#define ATOMIC_CLEAR_BIT(REG, BIT) \
212+
do { \
213+
uint32_t val; \
214+
do { \
215+
val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
216+
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
217+
} while(0)
218+
219+
/* Atomic 32-bit register access macro to clear and set one or several bits */
220+
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
221+
do { \
222+
uint32_t val; \
223+
do { \
224+
val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
225+
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
226+
} while(0)
227+
228+
/* Atomic 16-bit register access macro to set one or several bits */
229+
#define ATOMIC_SETH_BIT(REG, BIT) \
230+
do { \
231+
uint16_t val; \
232+
do { \
233+
val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
234+
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
235+
} while(0)
236+
237+
/* Atomic 16-bit register access macro to clear one or several bits */
238+
#define ATOMIC_CLEARH_BIT(REG, BIT) \
239+
do { \
240+
uint16_t val; \
241+
do { \
242+
val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
243+
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
244+
} while(0)
245+
246+
/* Atomic 16-bit register access macro to clear and set one or several bits */
247+
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
248+
do { \
249+
uint16_t val; \
250+
do { \
251+
val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
252+
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
253+
} while(0)
254+
161255
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
162-
#endif
256+
#endif /* CORE_CM0PLUS */
257+
163258
/**
164259
* @}
165260
*/

‎system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/system_stm32wlxx.h

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -6,13 +6,12 @@
66
******************************************************************************
77
* @attention
88
*
9-
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
10-
* All rights reserved.</center></h2>
9+
* Copyright (c) 2020(-2021) STMicroelectronics.
10+
* All rights reserved.
1111
*
12-
* This software component is licensed by ST under Apache License, Version 2.0,
13-
* the "License"; You may not use this file except in compliance with the
14-
* License. You may obtain a copy of the License at:
15-
* opensource.org/licenses/Apache-2.0
12+
* This software is licensed under terms that can be found in the LICENSE file
13+
* in the root directory of this software component.
14+
* If no LICENSE file comes with this software, it is provided AS-IS.
1615
*
1716
******************************************************************************
1817
*/

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