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Updated STM32L4xx CMSIS to v1.4.2
Included in STM32CubeL4 FW V1.11.0 Signed-off-by: Frederic.Pillon <frederic.pillon@st.com>
1 parent 2d70fc9 commit e99cb17

24 files changed

+70
-496
lines changed

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l431xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -772,12 +772,10 @@ typedef struct
772772
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
773773
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
774774
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
775-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
775+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
776776
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
777777
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
778778
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
779-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
780-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
781779
} SPI_TypeDef;
782780

783781

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l432xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -739,12 +739,10 @@ typedef struct
739739
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
740740
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
741741
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
742-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
742+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
743743
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
744744
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
745745
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
746-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
747-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
748746
} SPI_TypeDef;
749747

750748

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l433xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -788,12 +788,10 @@ typedef struct
788788
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
789789
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
790790
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
791-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
791+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
792792
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
793793
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
794794
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
795-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
796-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
797795
} SPI_TypeDef;
798796

799797

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l442xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -740,12 +740,10 @@ typedef struct
740740
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
741741
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
742742
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
743-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
743+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
744744
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
745745
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
746746
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
747-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
748-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
749747
} SPI_TypeDef;
750748

751749

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l443xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -789,12 +789,10 @@ typedef struct
789789
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
790790
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
791791
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
792-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
792+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
793793
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
794794
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
795795
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
796-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
797-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
798796
} SPI_TypeDef;
799797

800798

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l451xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -811,12 +811,10 @@ typedef struct
811811
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
812812
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
813813
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
814-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
814+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
815815
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
816816
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
817817
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
818-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
819-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
820818
} SPI_TypeDef;
821819

822820

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l452xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -812,12 +812,10 @@ typedef struct
812812
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
813813
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
814814
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
815-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
815+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
816816
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
817817
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
818818
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
819-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
820-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
821819
} SPI_TypeDef;
822820

823821

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l462xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -813,12 +813,10 @@ typedef struct
813813
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
814814
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
815815
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
816-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
816+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
817817
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
818818
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
819819
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
820-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
821-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
822820
} SPI_TypeDef;
823821

824822

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l471xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -846,12 +846,10 @@ typedef struct
846846
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
847847
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
848848
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
849-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
849+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
850850
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
851851
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
852852
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
853-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
854-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
855853
} SPI_TypeDef;
856854

857855

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -847,12 +847,10 @@ typedef struct
847847
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
848848
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
849849
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
850-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
850+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
851851
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
852852
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
853853
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
854-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
855-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
856854
} SPI_TypeDef;
857855

858856

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -862,12 +862,10 @@ typedef struct
862862
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
863863
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
864864
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
865-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
865+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
866866
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
867867
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
868868
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
869-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
870-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
871869
} SPI_TypeDef;
872870

873871

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l485xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -848,12 +848,10 @@ typedef struct
848848
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
849849
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
850850
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
851-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
851+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
852852
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
853853
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
854854
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
855-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
856-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
857855
} SPI_TypeDef;
858856

859857

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l486xx.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -863,12 +863,10 @@ typedef struct
863863
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
864864
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
865865
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
866-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
866+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
867867
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
868868
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
869869
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
870-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
871-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
872870
} SPI_TypeDef;
873871

874872

‎system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l496xx.h

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -505,9 +505,9 @@ typedef struct
505505
__IO uint32_t NLR; /*!< DMA2D Number of Line Register, Address offset: 0x44 */
506506
__IO uint32_t LWR; /*!< DMA2D Line Watermark Register, Address offset: 0x48 */
507507
__IO uint32_t AMTCR; /*!< DMA2D AHB Master Timer Configuration Register, Address offset: 0x4C */
508-
uint32_t RESERVED[236]; /*!< Reserved, 0x50-0x3FF */
509-
__IO uint32_t FGCLUT[256]; /*!< DMA2D Foreground CLUT, Address offset:400-7FF */
510-
__IO uint32_t BGCLUT[256]; /*!< DMA2D Background CLUT, Address offset:800-BFF */
508+
uint32_t RESERVED[236]; /*!< Reserved, Address offset: 0x50-0x3FF */
509+
__IO uint32_t FGCLUT[256]; /*!< DMA2D Foreground CLUT, Address offset:0x400-0x7FF */
510+
__IO uint32_t BGCLUT[256]; /*!< DMA2D Background CLUT, Address offset:0x800-0xBFF */
511511
} DMA2D_TypeDef;
512512

513513
/**
@@ -934,12 +934,10 @@ typedef struct
934934
__IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */
935935
__IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */
936936
__IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */
937-
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
937+
__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
938938
__IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */
939939
__IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */
940940
__IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */
941-
uint32_t RESERVED1; /*!< Reserved, Address offset: 0x1C */
942-
uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
943941
} SPI_TypeDef;
944942

945943

@@ -7777,7 +7775,6 @@ typedef struct
77777775
#define DMA2D_AMTCR_DT_Msk (0xFFU << DMA2D_AMTCR_DT_Pos) /*!< 0x0000FF00 */
77787776
#define DMA2D_AMTCR_DT DMA2D_AMTCR_DT_Msk /*!< Dead Time */
77797777

7780-
77817778
/******************** Bit definition for DMA2D_FGCLUT register **************/
77827779

77837780
/******************** Bit definition for DMA2D_BGCLUT register **************/

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