Skip to content

Commit beb5f5c

Browse files
fpistmfpistm
authored
Merge pull request #1744 from ABOSTM/G491_CMSIS_MISSING_TIM7_ALIAS
fix: CMSIS STM32G491and STM32G4A1 : add missing aliases for TIM7 and COMP4/5/6
2 parents 429d64d + 05dbfe9 commit beb5f5c

File tree

7 files changed

+346
-2
lines changed

7 files changed

+346
-2
lines changed

‎CI/update/patch/CMSIS/G4/0001-Fix-CMSIS-stm32g491-and-stm32g4a1-add-missing-aliase.patch

Lines changed: 51 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,51 @@
1+
From 43d68baed68625b2e99d15d841c31cb1bfb2475a Mon Sep 17 00:00:00 2001
2+
From: Alexandre Bourdiol <alexandre.bourdiol@st.com>
3+
Date: Mon, 20 Jun 2022 13:58:28 +0200
4+
Subject: [PATCH] Fix: CMSIS stm32g491 and stm32g4a1 add missing aliases for
5+
TIM7 and COMP4/5/6
6+
7+
Internal ticket 130525
8+
9+
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
10+
---
11+
.../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h | 4 ++++
12+
.../Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h | 4 ++++
13+
2 files changed, 8 insertions(+)
14+
15+
diff --git a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h
16+
index ca9874b3..84f12c6e 100644
17+
--- a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h
18+
+++ b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h
19+
@@ -13694,8 +13694,12 @@ typedef struct
20+
/******************************************************************************/
21+
22+
/* Aliases for __IRQn */
23+
+#define TIM7_DAC_IRQn TIM7_IRQn
24+
+#define COMP4_5_6_IRQn COMP4_IRQn
25+
26+
/* Aliases for __IRQHandler */
27+
+#define TIM7_DAC_IRQHandler TIM7_IRQHandler
28+
+#define COMP4_5_6_IRQHandler COMP4_IRQHandler
29+
30+
#ifdef __cplusplus
31+
}
32+
diff --git a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h
33+
index 2fb6e6f5..2431b284 100644
34+
--- a/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h
35+
+++ b/system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h
36+
@@ -13926,8 +13926,12 @@ typedef struct
37+
/******************************************************************************/
38+
39+
/* Aliases for __IRQn */
40+
+#define TIM7_DAC_IRQn TIM7_IRQn
41+
+#define COMP4_5_6_IRQn COMP4_IRQn
42+
43+
/* Aliases for __IRQHandler */
44+
+#define TIM7_DAC_IRQHandler TIM7_IRQHandler
45+
+#define COMP4_5_6_IRQHandler COMP4_IRQHandler
46+
47+
#ifdef __cplusplus
48+
}
49+
--
50+
2.31.1.windows.1
51+

‎README.md

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -339,6 +339,8 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
339339
| :green_heart: | STM32G474RB<br>STM32G474RC<br>STM32G474RE | Generic Board | *2.0.0* | |
340340
| :green_heart: | STM32G483RE | Generic Board | *2.0.0* | |
341341
| :green_heart: | STM32G484RE | Generic Board | *2.0.0* | |
342+
| :yellow_heart: | STM32G491RC<br>STM32G491RE | Generic Board | **2.3.0** | |
343+
| :yellow_heart: | STM32G4A1RE | Generic Board | **2.3.0** | |
342344

343345
### Generic STM32H7 boards
344346

‎boards.txt

Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3963,6 +3963,73 @@ GenG4.menu.pnum.GENERIC_G484RETX.build.board=GENERIC_G484RETX
39633963
GenG4.menu.pnum.GENERIC_G484RETX.build.product_line=STM32G484xx
39643964
GenG4.menu.pnum.GENERIC_G484RETX.build.variant=STM32G4xx/G473R(B-C-E)T_G474R(B-C-E)T_G483RET_G484RET
39653965

3966+
3967+
# Generic G491RCIx
3968+
GenG4.menu.pnum.GENERIC_G491RCIX=Generic G491RCIx
3969+
GenG4.menu.pnum.GENERIC_G491RCIX.upload.maximum_size=262144
3970+
GenG4.menu.pnum.GENERIC_G491RCIX.upload.maximum_data_size=131072
3971+
GenG4.menu.pnum.GENERIC_G491RCIX.build.board=GENERIC_G491RCIX
3972+
GenG4.menu.pnum.GENERIC_G491RCIX.build.product_line=STM32G491xx
3973+
GenG4.menu.pnum.GENERIC_G491RCIX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)
3974+
3975+
# Generic G491REIx
3976+
GenG4.menu.pnum.GENERIC_G491REIX=Generic G491REIx
3977+
GenG4.menu.pnum.GENERIC_G491REIX.upload.maximum_size=524288
3978+
GenG4.menu.pnum.GENERIC_G491REIX.upload.maximum_data_size=131072
3979+
GenG4.menu.pnum.GENERIC_G491REIX.build.board=GENERIC_G491REIX
3980+
GenG4.menu.pnum.GENERIC_G491REIX.build.product_line=STM32G491xx
3981+
GenG4.menu.pnum.GENERIC_G491REIX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)
3982+
3983+
# Generic G491RCTx
3984+
GenG4.menu.pnum.GENERIC_G491RCTX=Generic G491RCTx
3985+
GenG4.menu.pnum.GENERIC_G491RCTX.upload.maximum_size=262144
3986+
GenG4.menu.pnum.GENERIC_G491RCTX.upload.maximum_data_size=131072
3987+
GenG4.menu.pnum.GENERIC_G491RCTX.build.board=GENERIC_G491RCTX
3988+
GenG4.menu.pnum.GENERIC_G491RCTX.build.product_line=STM32G491xx
3989+
GenG4.menu.pnum.GENERIC_G491RCTX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)
3990+
3991+
# Generic G491RETx
3992+
GenG4.menu.pnum.GENERIC_G491RETX=Generic G491RETx
3993+
GenG4.menu.pnum.GENERIC_G491RETX.upload.maximum_size=524288
3994+
GenG4.menu.pnum.GENERIC_G491RETX.upload.maximum_data_size=131072
3995+
GenG4.menu.pnum.GENERIC_G491RETX.build.board=GENERIC_G491RETX
3996+
GenG4.menu.pnum.GENERIC_G491RETX.build.product_line=STM32G491xx
3997+
GenG4.menu.pnum.GENERIC_G491RETX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)
3998+
3999+
# Generic G491REYx
4000+
GenG4.menu.pnum.GENERIC_G491REYX=Generic G491REYx
4001+
GenG4.menu.pnum.GENERIC_G491REYX.upload.maximum_size=524288
4002+
GenG4.menu.pnum.GENERIC_G491REYX.upload.maximum_data_size=131072
4003+
GenG4.menu.pnum.GENERIC_G491REYX.build.board=GENERIC_G491REYX
4004+
GenG4.menu.pnum.GENERIC_G491REYX.build.product_line=STM32G491xx
4005+
GenG4.menu.pnum.GENERIC_G491REYX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)
4006+
4007+
# Generic G4A1REIx
4008+
GenG4.menu.pnum.GENERIC_G4A1REIX=Generic G4A1REIx
4009+
GenG4.menu.pnum.GENERIC_G4A1REIX.upload.maximum_size=524288
4010+
GenG4.menu.pnum.GENERIC_G4A1REIX.upload.maximum_data_size=131072
4011+
GenG4.menu.pnum.GENERIC_G4A1REIX.build.board=GENERIC_G4A1REIX
4012+
GenG4.menu.pnum.GENERIC_G4A1REIX.build.product_line=STM32G4A1xx
4013+
GenG4.menu.pnum.GENERIC_G4A1REIX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)
4014+
4015+
# Generic G4A1RETx
4016+
GenG4.menu.pnum.GENERIC_G4A1RETX=Generic G4A1RETx
4017+
GenG4.menu.pnum.GENERIC_G4A1RETX.upload.maximum_size=524288
4018+
GenG4.menu.pnum.GENERIC_G4A1RETX.upload.maximum_data_size=131072
4019+
GenG4.menu.pnum.GENERIC_G4A1RETX.build.board=GENERIC_G4A1RETX
4020+
GenG4.menu.pnum.GENERIC_G4A1RETX.build.product_line=STM32G4A1xx
4021+
GenG4.menu.pnum.GENERIC_G4A1RETX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)
4022+
4023+
# Generic G4A1REYx
4024+
GenG4.menu.pnum.GENERIC_G4A1REYX=Generic G4A1REYx
4025+
GenG4.menu.pnum.GENERIC_G4A1REYX.upload.maximum_size=524288
4026+
GenG4.menu.pnum.GENERIC_G4A1REYX.upload.maximum_data_size=131072
4027+
GenG4.menu.pnum.GENERIC_G4A1REYX.build.board=GENERIC_G4A1REYX
4028+
GenG4.menu.pnum.GENERIC_G4A1REYX.build.product_line=STM32G4A1xx
4029+
GenG4.menu.pnum.GENERIC_G4A1REYX.build.variant=STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)
4030+
4031+
4032+
39664033
# Upload menu
39674034
GenG4.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
39684035
GenG4.menu.upload_method.swdMethod.upload.protocol=0

‎system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13694,8 +13694,12 @@ typedef struct
1369413694
/******************************************************************************/
1369513695

1369613696
/* Aliases for __IRQn */
13697+
#define TIM7_DAC_IRQn TIM7_IRQn
13698+
#define COMP4_5_6_IRQn COMP4_IRQn
1369713699

1369813700
/* Aliases for __IRQHandler */
13701+
#define TIM7_DAC_IRQHandler TIM7_IRQHandler
13702+
#define COMP4_5_6_IRQHandler COMP4_IRQHandler
1369913703

1370013704
#ifdef __cplusplus
1370113705
}

‎system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13926,8 +13926,12 @@ typedef struct
1392613926
/******************************************************************************/
1392713927

1392813928
/* Aliases for __IRQn */
13929+
#define TIM7_DAC_IRQn TIM7_IRQn
13930+
#define COMP4_5_6_IRQn COMP4_IRQn
1392913931

1393013932
/* Aliases for __IRQHandler */
13933+
#define TIM7_DAC_IRQHandler TIM7_IRQHandler
13934+
#define COMP4_5_6_IRQHandler COMP4_IRQHandler
1393113935

1393213936
#ifdef __cplusplus
1393313937
}

‎variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/generic_clock.c

Lines changed: 43 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,8 +23,49 @@
2323
*/
2424
WEAK void SystemClock_Config(void)
2525
{
26-
/* SystemClock_Config can be generated by STM32CubeMX */
27-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
26+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
27+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
28+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
29+
30+
/** Configure the main internal regulator output voltage
31+
*/
32+
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
33+
/** Initializes the RCC Oscillators according to the specified parameters
34+
* in the RCC_OscInitTypeDef structure.
35+
*/
36+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
37+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
38+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
39+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
40+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
41+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
42+
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
43+
RCC_OscInitStruct.PLL.PLLN = 85;
44+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
45+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
46+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
47+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
48+
Error_Handler();
49+
}
50+
/** Initializes the CPU, AHB and APB buses clocks
51+
*/
52+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
53+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
54+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
55+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
56+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
57+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
58+
59+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
60+
Error_Handler();
61+
}
62+
/** Initializes the peripherals clocks
63+
*/
64+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
65+
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
66+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
67+
Error_Handler();
68+
}
2869
}
2970

3071
#endif /* ARDUINO_GENERIC_* */

‎variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)_G4A1RE(I-T-Y)/ldscript.ld

Lines changed: 175 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,175 @@
1+
/**
2+
******************************************************************************
3+
* @file LinkerScript.ld
4+
* @author Auto-generated by STM32CubeIDE
5+
* @brief Linker script for STM32G481RETx Device from STM32G4 series
6+
*
7+
* Set heap size, stack size and stack location according
8+
* to application requirements.
9+
*
10+
* Set memory bank area and size if external memory is used
11+
******************************************************************************
12+
* @attention
13+
*
14+
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
15+
* All rights reserved.</center></h2>
16+
*
17+
* This software component is licensed by ST under BSD 3-Clause license,
18+
* the "License"; You may not use this file except in compliance with the
19+
* License. You may obtain a copy of the License at:
20+
* opensource.org/licenses/BSD-3-Clause
21+
*
22+
******************************************************************************
23+
*/
24+
25+
/* Entry Point */
26+
ENTRY(Reset_Handler)
27+
28+
/* Highest address of the user mode stack */
29+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
30+
31+
_Min_Heap_Size = 0x200; /* required amount of heap */
32+
_Min_Stack_Size = 0x400; /* required amount of stack */
33+
34+
/* Memories definition */
35+
MEMORY
36+
{
37+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
38+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
39+
}
40+
41+
/* Sections */
42+
SECTIONS
43+
{
44+
/* The startup code into "FLASH" Rom type memory */
45+
.isr_vector :
46+
{
47+
. = ALIGN(4);
48+
KEEP(*(.isr_vector)) /* Startup code */
49+
. = ALIGN(4);
50+
} >FLASH
51+
52+
/* The program code and other data into "FLASH" Rom type memory */
53+
.text :
54+
{
55+
. = ALIGN(4);
56+
*(.text) /* .text sections (code) */
57+
*(.text*) /* .text* sections (code) */
58+
*(.glue_7) /* glue arm to thumb code */
59+
*(.glue_7t) /* glue thumb to arm code */
60+
*(.eh_frame)
61+
62+
KEEP (*(.init))
63+
KEEP (*(.fini))
64+
65+
. = ALIGN(4);
66+
_etext = .; /* define a global symbols at end of code */
67+
} >FLASH
68+
69+
/* Constant data into "FLASH" Rom type memory */
70+
.rodata :
71+
{
72+
. = ALIGN(4);
73+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
74+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
75+
. = ALIGN(4);
76+
} >FLASH
77+
78+
.ARM.extab : {
79+
. = ALIGN(4);
80+
*(.ARM.extab* .gnu.linkonce.armextab.*)
81+
. = ALIGN(4);
82+
} >FLASH
83+
84+
.ARM : {
85+
. = ALIGN(4);
86+
__exidx_start = .;
87+
*(.ARM.exidx*)
88+
__exidx_end = .;
89+
. = ALIGN(4);
90+
} >FLASH
91+
92+
.preinit_array :
93+
{
94+
. = ALIGN(4);
95+
PROVIDE_HIDDEN (__preinit_array_start = .);
96+
KEEP (*(.preinit_array*))
97+
PROVIDE_HIDDEN (__preinit_array_end = .);
98+
. = ALIGN(4);
99+
} >FLASH
100+
101+
.init_array :
102+
{
103+
. = ALIGN(4);
104+
PROVIDE_HIDDEN (__init_array_start = .);
105+
KEEP (*(SORT(.init_array.*)))
106+
KEEP (*(.init_array*))
107+
PROVIDE_HIDDEN (__init_array_end = .);
108+
. = ALIGN(4);
109+
} >FLASH
110+
111+
.fini_array :
112+
{
113+
. = ALIGN(4);
114+
PROVIDE_HIDDEN (__fini_array_start = .);
115+
KEEP (*(SORT(.fini_array.*)))
116+
KEEP (*(.fini_array*))
117+
PROVIDE_HIDDEN (__fini_array_end = .);
118+
. = ALIGN(4);
119+
} >FLASH
120+
121+
/* Used by the startup to initialize data */
122+
_sidata = LOADADDR(.data);
123+
124+
/* Initialized data sections into "RAM" Ram type memory */
125+
.data :
126+
{
127+
. = ALIGN(4);
128+
_sdata = .; /* create a global symbol at data start */
129+
*(.data) /* .data sections */
130+
*(.data*) /* .data* sections */
131+
*(.RamFunc) /* .RamFunc sections */
132+
*(.RamFunc*) /* .RamFunc* sections */
133+
134+
. = ALIGN(4);
135+
_edata = .; /* define a global symbol at data end */
136+
137+
} >RAM AT> FLASH
138+
139+
/* Uninitialized data section into "RAM" Ram type memory */
140+
. = ALIGN(4);
141+
.bss :
142+
{
143+
/* This is used by the startup in order to initialize the .bss section */
144+
_sbss = .; /* define a global symbol at bss start */
145+
__bss_start__ = _sbss;
146+
*(.bss)
147+
*(.bss*)
148+
*(COMMON)
149+
150+
. = ALIGN(4);
151+
_ebss = .; /* define a global symbol at bss end */
152+
__bss_end__ = _ebss;
153+
} >RAM
154+
155+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
156+
._user_heap_stack :
157+
{
158+
. = ALIGN(8);
159+
PROVIDE ( end = . );
160+
PROVIDE ( _end = . );
161+
. = . + _Min_Heap_Size;
162+
. = . + _Min_Stack_Size;
163+
. = ALIGN(8);
164+
} >RAM
165+
166+
/* Remove information from the compiler libraries */
167+
/DISCARD/ :
168+
{
169+
libc.a ( * )
170+
libm.a ( * )
171+
libgcc.a ( * )
172+
}
173+
174+
.ARM.attributes 0 : { *(.ARM.attributes) }
175+
}

0 commit comments

Comments
 (0)