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variant: U5: add U575A(G-I)I and U585AII generic support
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
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‎README.md

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Original file line numberDiff line numberDiff line change
@@ -418,6 +418,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| Status | Device(s) | Name | Release | Notes |
420420
| :----: | :-------: | ---- | :-----: | :---- |
421+
| :yellow_heart: | STM32U575AGIxQ<br>STM32U575AIIxQ<br>STM32U585AIIxQ | Generic Board | *2.1.0* | |
421422
| :yellow_heart: | STM32U575ZGTxQ<br>STM32U575ZITxQ<br>STM32U585ZETxQ | Generic Board | **2.1.0** | |
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### Generic STM32WB boards

‎boards.txt

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Original file line numberDiff line numberDiff line change
@@ -5117,6 +5117,22 @@ GenU5.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
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GenU5.build.series=STM32U5xx
51185118
GenU5.build.cmsis_lib_gcc=arm_ARMv8MMLlfsp_math
51195119

5120+
# Generic U575AGIxQ
5121+
GenU5.menu.pnum.GENERIC_U575AGIXQ=Generic U575AGIxQ
5122+
GenU5.menu.pnum.GENERIC_U575AGIXQ.upload.maximum_size=1048576
5123+
GenU5.menu.pnum.GENERIC_U575AGIXQ.upload.maximum_data_size=262144
5124+
GenU5.menu.pnum.GENERIC_U575AGIXQ.build.board=GENERIC_U575AGIXQ
5125+
GenU5.menu.pnum.GENERIC_U575AGIXQ.build.product_line=STM32U575xx
5126+
GenU5.menu.pnum.GENERIC_U575AGIXQ.build.variant=STM32U5xx/U575A(G-I)IxQ_U585AIIxQ
5127+
5128+
# Generic U575AIIxQ
5129+
GenU5.menu.pnum.GENERIC_U575AIIXQ=Generic U575AIIxQ
5130+
GenU5.menu.pnum.GENERIC_U575AIIXQ.upload.maximum_size=2097152
5131+
GenU5.menu.pnum.GENERIC_U575AIIXQ.upload.maximum_data_size=262144
5132+
GenU5.menu.pnum.GENERIC_U575AIIXQ.build.board=GENERIC_U575AIIXQ
5133+
GenU5.menu.pnum.GENERIC_U575AIIXQ.build.product_line=STM32U575xx
5134+
GenU5.menu.pnum.GENERIC_U575AIIXQ.build.variant=STM32U5xx/U575A(G-I)IxQ_U585AIIxQ
5135+
51205136
# Generic U575ZGTxQ
51215137
GenU5.menu.pnum.GENERIC_U575ZGTXQ=Generic U575ZGTxQ
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GenU5.menu.pnum.GENERIC_U575ZGTXQ.upload.maximum_size=1048576
@@ -5133,6 +5149,14 @@ GenU5.menu.pnum.GENERIC_U575ZITXQ.build.board=GENERIC_U575ZITXQ
51335149
GenU5.menu.pnum.GENERIC_U575ZITXQ.build.product_line=STM32U575xx
51345150
GenU5.menu.pnum.GENERIC_U575ZITXQ.build.variant=STM32U5xx/U575Z(G-I)TxQ_U585ZETxQ
51355151

5152+
# Generic U585AIIxQ
5153+
GenU5.menu.pnum.GENERIC_U585AIIXQ=Generic U585AIIxQ
5154+
GenU5.menu.pnum.GENERIC_U585AIIXQ.upload.maximum_size=2097152
5155+
GenU5.menu.pnum.GENERIC_U585AIIXQ.upload.maximum_data_size=262144
5156+
GenU5.menu.pnum.GENERIC_U585AIIXQ.build.board=GENERIC_U585AIIXQ
5157+
GenU5.menu.pnum.GENERIC_U585AIIXQ.build.product_line=STM32U585xx
5158+
GenU5.menu.pnum.GENERIC_U585AIIXQ.build.variant=STM32U5xx/U575A(G-I)IxQ_U585AIIxQ
5159+
51365160
# Generic U585ZETxQ
51375161
GenU5.menu.pnum.GENERIC_U585ZETXQ=Generic U585ZETxQ
51385162
GenU5.menu.pnum.GENERIC_U585ZETXQ.upload.maximum_size=524288
@@ -6095,6 +6119,12 @@ GenL5.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
60956119
GenL5.menu.xserial.disabled=Disabled (no Serial support)
60966120
GenL5.menu.xserial.disabled.build.xSerial=
60976121

6122+
GenU5.menu.xserial.generic=Enabled (generic 'Serial')
6123+
GenU5.menu.xserial.none=Enabled (no generic 'Serial')
6124+
GenU5.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
6125+
GenU5.menu.xserial.disabled=Disabled (no Serial support)
6126+
GenU5.menu.xserial.disabled.build.xSerial=
6127+
60986128
GenWB.menu.xserial.generic=Enabled (generic 'Serial')
60996129
GenWB.menu.xserial.none=Enabled (no generic 'Serial')
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GenWB.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
@@ -6362,6 +6392,19 @@ GenL5.menu.xusb.HS.build.usb_speed=-DUSE_USB_HS
63626392
GenL5.menu.xusb.HSFS=High Speed in Full Speed mode
63636393
GenL5.menu.xusb.HSFS.build.usb_speed=-DUSE_USB_HS -DUSE_USB_HS_IN_FS
63646394

6395+
GenU5.menu.usb.none=None
6396+
GenU5.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART)
6397+
GenU5.menu.usb.CDCgen.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC
6398+
GenU5.menu.usb.CDC=CDC (no generic 'Serial')
6399+
GenU5.menu.usb.CDC.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB
6400+
GenU5.menu.usb.HID=HID (keyboard and mouse)
6401+
GenU5.menu.usb.HID.build.enable_usb={build.usb_flags} -DUSBD_USE_HID_COMPOSITE
6402+
GenU5.menu.xusb.FS=Low/Full Speed
6403+
GenU5.menu.xusb.HS=High Speed
6404+
GenU5.menu.xusb.HS.build.usb_speed=-DUSE_USB_HS
6405+
GenU5.menu.xusb.HSFS=High Speed in Full Speed mode
6406+
GenU5.menu.xusb.HSFS.build.usb_speed=-DUSE_USB_HS -DUSE_USB_HS_IN_FS
6407+
63656408
GenWB.menu.usb.none=None
63666409
GenWB.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART)
63676410
GenWB.menu.usb.CDCgen.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC
@@ -6787,6 +6830,25 @@ GenL5.menu.opt.o3lto.build.flags.optimize=-O3 -flto
67876830
GenL5.menu.opt.ogstd=Debug (-Og)
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GenL5.menu.opt.ogstd.build.flags.optimize=-Og
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6833+
GenU5.menu.opt.osstd=Smallest (-Os default)
6834+
GenU5.menu.opt.osstd.build.flags.optimize=-Os
6835+
GenU5.menu.opt.oslto=Smallest (-Os) with LTO
6836+
GenU5.menu.opt.oslto.build.flags.optimize=-Os -flto
6837+
GenU5.menu.opt.o1std=Fast (-O1)
6838+
GenU5.menu.opt.o1std.build.flags.optimize=-O1
6839+
GenU5.menu.opt.o1lto=Fast (-O1) with LTO
6840+
GenU5.menu.opt.o1lto.build.flags.optimize=-O1 -flto
6841+
GenU5.menu.opt.o2std=Faster (-O2)
6842+
GenU5.menu.opt.o2std.build.flags.optimize=-O2
6843+
GenU5.menu.opt.o2lto=Faster (-O2) with LTO
6844+
GenU5.menu.opt.o2lto.build.flags.optimize=-O2 -flto
6845+
GenU5.menu.opt.o3std=Fastest (-O3)
6846+
GenU5.menu.opt.o3std.build.flags.optimize=-O3
6847+
GenU5.menu.opt.o3lto=Fastest (-O3) with LTO
6848+
GenU5.menu.opt.o3lto.build.flags.optimize=-O3 -flto
6849+
GenU5.menu.opt.ogstd=Debug (-g)
6850+
GenU5.menu.opt.ogstd.build.flags.optimize=-g -Og
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67906852
GenWB.menu.opt.osstd=Smallest (-Os default)
67916853
GenWB.menu.opt.oslto=Smallest (-Os) with LTO
67926854
GenWB.menu.opt.oslto.build.flags.optimize=-Os -flto
@@ -7253,6 +7315,16 @@ GenL5.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float
72537315
GenL5.menu.rtlib.full=Newlib Standard
72547316
GenL5.menu.rtlib.full.build.flags.ldspecs=
72557317

7318+
GenU5.menu.rtlib.nano=Newlib Nano (default)
7319+
GenU5.menu.rtlib.nanofp=Newlib Nano + Float Printf
7320+
GenU5.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float
7321+
GenU5.menu.rtlib.nanofs=Newlib Nano + Float Scanf
7322+
GenU5.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float
7323+
GenU5.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
7324+
GenU5.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
7325+
GenU5.menu.rtlib.full=Newlib Standard
7326+
GenU5.menu.rtlib.full.build.flags.ldspecs=
7327+
72567328
GenWB.menu.rtlib.nano=Newlib Nano (default)
72577329
GenWB.menu.rtlib.nanofp=Newlib Nano + Float Printf
72587330
GenWB.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float

‎variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ/generic_clock.c

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@@ -21,8 +21,64 @@
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*/
2222
WEAK void SystemClock_Config(void)
2323
{
24-
/* SystemClock_Config can be generated by STM32CubeMX */
25-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
24+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
25+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
26+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
27+
28+
/** Configure the main internal regulator output voltage
29+
*/
30+
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
31+
Error_Handler();
32+
}
33+
/** Initializes the CPU, AHB and APB busses clocks
34+
*/
35+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
36+
| RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSI;
37+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
38+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
39+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
40+
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
41+
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
42+
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
43+
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_0;
44+
RCC_OscInitStruct.LSIDiv = RCC_LSI_DIV1;
45+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
46+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
47+
RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV4;
48+
RCC_OscInitStruct.PLL.PLLM = 3;
49+
RCC_OscInitStruct.PLL.PLLN = 10;
50+
RCC_OscInitStruct.PLL.PLLP = 2;
51+
RCC_OscInitStruct.PLL.PLLQ = 2;
52+
RCC_OscInitStruct.PLL.PLLR = 1;
53+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1;
54+
RCC_OscInitStruct.PLL.PLLFRACN = 0;
55+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
56+
Error_Handler();
57+
}
58+
/** Initializes the CPU, AHB and APB busses clocks
59+
*/
60+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
61+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
62+
| RCC_CLOCKTYPE_PCLK3;
63+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
64+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
65+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
66+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
67+
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
68+
69+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
70+
Error_Handler();
71+
}
72+
73+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_DAC1
74+
| RCC_PERIPHCLK_CLK48;
75+
PeriphClkInit.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_HSI;
76+
PeriphClkInit.Dac1ClockSelection = RCC_DAC1CLKSOURCE_LSI;
77+
PeriphClkInit.Clk48ClockSelection = RCC_CLK48CLKSOURCE_HSI48;
78+
79+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
80+
Error_Handler();
81+
}
2682
}
2783

2884
#endif /* ARDUINO_GENERIC_* */

‎variants/STM32U5xx/U575A(G-I)IxQ_U585AIIxQ/ldscript.ld

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/*
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******************************************************************************
3+
**
4+
** File : LinkerScript.ld
5+
**
6+
** Author : Auto-generated by STM32CubeIDE
7+
**
8+
** Abstract : Linker script for STM32U585xI Device from STM32U5 series
9+
** 2048Kbytes FLASH
10+
** 768Kbytes RAM
11+
**
12+
** Set heap size, stack size and stack location according
13+
** to application requirements.
14+
**
15+
** Set memory bank area and size if external memory is used.
16+
**
17+
** Target : STMicroelectronics STM32
18+
**
19+
** Distribution: The file is distributed as is without any warranty
20+
** of any kind.
21+
**
22+
*****************************************************************************
23+
** @attention
24+
**
25+
** <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
26+
** All rights reserved.</center></h2>
27+
**
28+
** This software component is licensed by ST under BSD 3-Clause license,
29+
** the "License"; You may not use this file except in compliance with the
30+
** License. You may obtain a copy of the License at:
31+
** opensource.org/licenses/BSD-3-Clause
32+
**
33+
*****************************************************************************
34+
*/
35+
36+
/* Entry Point */
37+
ENTRY(Reset_Handler)
38+
39+
/* Highest address of the user mode stack */
40+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
41+
42+
_Min_Heap_Size = 0x200; /* required amount of heap */
43+
_Min_Stack_Size = 0x400; /* required amount of stack */
44+
45+
/* Memories definition */
46+
MEMORY
47+
{
48+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
49+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
50+
}
51+
52+
/* Sections */
53+
SECTIONS
54+
{
55+
/* The startup code into "FLASH" Rom type memory */
56+
.isr_vector :
57+
{
58+
KEEP(*(.isr_vector)) /* Startup code */
59+
} >FLASH
60+
61+
/* The program code and other data into "FLASH" Rom type memory */
62+
.text :
63+
{
64+
*(.text) /* .text sections (code) */
65+
*(.text*) /* .text* sections (code) */
66+
*(.glue_7) /* glue arm to thumb code */
67+
*(.glue_7t) /* glue thumb to arm code */
68+
*(.eh_frame)
69+
70+
KEEP (*(.init))
71+
KEEP (*(.fini))
72+
73+
_etext = .; /* define a global symbols at end of code */
74+
} >FLASH
75+
76+
/* Constant data into "FLASH" Rom type memory */
77+
.rodata :
78+
{
79+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
80+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
81+
} >FLASH
82+
83+
.ARM.extab :
84+
{
85+
*(.ARM.extab* .gnu.linkonce.armextab.*)
86+
} >FLASH
87+
88+
.ARM :
89+
{
90+
__exidx_start = .;
91+
*(.ARM.exidx*)
92+
__exidx_end = .;
93+
} >FLASH
94+
95+
.preinit_array :
96+
{
97+
PROVIDE_HIDDEN (__preinit_array_start = .);
98+
KEEP (*(.preinit_array*))
99+
PROVIDE_HIDDEN (__preinit_array_end = .);
100+
} >FLASH
101+
102+
.init_array :
103+
{
104+
PROVIDE_HIDDEN (__init_array_start = .);
105+
KEEP (*(SORT(.init_array.*)))
106+
KEEP (*(.init_array*))
107+
PROVIDE_HIDDEN (__init_array_end = .);
108+
} >FLASH
109+
110+
.fini_array :
111+
{
112+
PROVIDE_HIDDEN (__fini_array_start = .);
113+
KEEP (*(SORT(.fini_array.*)))
114+
KEEP (*(.fini_array*))
115+
PROVIDE_HIDDEN (__fini_array_end = .);
116+
} >FLASH
117+
118+
/* Used by the startup to initialize data */
119+
_sidata = LOADADDR(.data);
120+
121+
/* Initialized data sections into "RAM" Ram type memory */
122+
.data :
123+
{
124+
_sdata = .; /* create a global symbol at data start */
125+
*(.data) /* .data sections */
126+
*(.data*) /* .data* sections */
127+
*(.RamFunc) /* .RamFunc sections */
128+
*(.RamFunc*) /* .RamFunc* sections */
129+
130+
_edata = .; /* define a global symbol at data end */
131+
} >RAM AT> FLASH
132+
133+
/* Uninitialized data section into "RAM" Ram type memory */
134+
.bss :
135+
{
136+
/* This is used by the startup in order to initialize the .bss section */
137+
_sbss = .; /* define a global symbol at bss start */
138+
__bss_start__ = _sbss;
139+
*(.bss)
140+
*(.bss*)
141+
*(COMMON)
142+
143+
_ebss = .; /* define a global symbol at bss end */
144+
__bss_end__ = _ebss;
145+
} >RAM
146+
147+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
148+
._user_heap_stack :
149+
{
150+
. = ALIGN(8);
151+
PROVIDE ( end = . );
152+
PROVIDE ( _end = . );
153+
. = . + _Min_Heap_Size;
154+
. = . + _Min_Stack_Size;
155+
. = ALIGN(8);
156+
} >RAM
157+
158+
/* Remove information from the compiler libraries */
159+
/DISCARD/ :
160+
{
161+
libc.a ( * )
162+
libm.a ( * )
163+
libgcc.a ( * )
164+
}
165+
166+
.ARM.attributes 0 : { *(.ARM.attributes) }
167+
}

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