@@ -691,6 +691,62 @@ Disco.build.board=Disco
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Disco.build.variant_h=variant_{build.board}.h
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Disco.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
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+ # B_G431B_ESC1 board
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+ Disco.menu.pnum.B_G431B_ESC1=B-G431B-ESC1
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+ Disco.menu.pnum.B_G431B_ESC1.node="NODE_G431CB,NOD_G431CB,DIS_G431CB"
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+ Disco.menu.pnum.B_G431B_ESC1.upload.maximum_size=131072
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+ Disco.menu.pnum.B_G431B_ESC1.upload.maximum_data_size=32768
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+ Disco.menu.pnum.B_G431B_ESC1.build.mcu=cortex-m4
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+ Disco.menu.pnum.B_G431B_ESC1.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
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+ Disco.menu.pnum.B_G431B_ESC1.build.board=B_G431B_ESC1
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+ Disco.menu.pnum.B_G431B_ESC1.build.series=STM32G4xx
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+ Disco.menu.pnum.B_G431B_ESC1.build.product_line=STM32G431xx
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+ Disco.menu.pnum.B_G431B_ESC1.build.variant=STM32G4xx/G431C(6-8-B)U_G441CBU
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+ Disco.menu.pnum.B_G431B_ESC1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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+ Disco.menu.pnum.B_G431B_ESC1.build.cmsis_lib_gcc=arm_cortexM4lf_math
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+
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+ # B-L072Z-LRWAN1 board
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+ Disco.menu.pnum.B_L072Z_LRWAN1=B-L072Z-LRWAN1
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+ Disco.menu.pnum.B_L072Z_LRWAN1.node="DIS_L072Z,NODE_L072CZ"
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+ Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_size=196608
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+ Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_data_size=20480
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+ Disco.menu.pnum.B_L072Z_LRWAN1.build.mcu=cortex-m0plus
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+ Disco.menu.pnum.B_L072Z_LRWAN1.build.board=B_L072Z_LRWAN1
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+ Disco.menu.pnum.B_L072Z_LRWAN1.build.series=STM32L0xx
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+ Disco.menu.pnum.B_L072Z_LRWAN1.build.product_line=STM32L072xx
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+ Disco.menu.pnum.B_L072Z_LRWAN1.build.variant=STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY
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+ Disco.menu.pnum.B_L072Z_LRWAN1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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+ Disco.menu.pnum.B_L072Z_LRWAN1.build.cmsis_lib_gcc=arm_cortexM0l_math
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+ Disco.menu.pnum.B_L072Z_LRWAN1.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
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+
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+ # B-L475E-IOT01A board
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+ Disco.menu.pnum.B_L475E_IOT01A=B-L475E-IOT01A
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+ Disco.menu.pnum.B_L475E_IOT01A.node=DIS_L4IOT
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+ Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_size=1048576
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+ Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_data_size=98304
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+ Disco.menu.pnum.B_L475E_IOT01A.build.mcu=cortex-m4
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+ Disco.menu.pnum.B_L475E_IOT01A.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
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+ Disco.menu.pnum.B_L475E_IOT01A.build.board=B_L475E_IOT01A
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+ Disco.menu.pnum.B_L475E_IOT01A.build.series=STM32L4xx
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+ Disco.menu.pnum.B_L475E_IOT01A.build.product_line=STM32L475xx
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+ Disco.menu.pnum.B_L475E_IOT01A.build.variant=STM32L4xx//L475V(C-E-G)T_L476V(C-E-G)T_L486VGT
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+ Disco.menu.pnum.B_L475E_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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+ Disco.menu.pnum.B_L475E_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
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+
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+ # B_L4S5I_IOT01A board
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+ Disco.menu.pnum.B_L4S5I_IOT01A=B-L4S5I-IOT01A
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+ Disco.menu.pnum.B_L4S5I_IOT01A.node="DIS_L4IOT,DIS_L4S5VI"
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+ Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_size=2097152
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+ Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_data_size=655360
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+ Disco.menu.pnum.B_L4S5I_IOT01A.build.mcu=cortex-m4
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+ Disco.menu.pnum.B_L4S5I_IOT01A.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
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+ Disco.menu.pnum.B_L4S5I_IOT01A.build.board=B_L4S5I_IOT01A
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+ Disco.menu.pnum.B_L4S5I_IOT01A.build.series=STM32L4xx
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+ Disco.menu.pnum.B_L4S5I_IOT01A.build.product_line=STM32L4S5xx
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+ Disco.menu.pnum.B_L4S5I_IOT01A.build.variant=STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT
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+ Disco.menu.pnum.B_L4S5I_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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+ Disco.menu.pnum.B_L4S5I_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
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+
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# DISCO_F030R8 board
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Disco.menu.pnum.DISCO_F030R8=STM32F030R8-DISCVL
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Disco.menu.pnum.DISCO_F030R8.node="No_mass_storage_for_this_board_Use_STLink_upload_method"
@@ -794,62 +850,6 @@ Disco.menu.pnum.DISCO_G0316.build.variant=STM32G0xx/G031J(4-6)M_G041J6M
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Disco.menu.pnum.DISCO_G0316.build.cmsis_lib_gcc=arm_cortexM0l_math
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Disco.menu.pnum.DISCO_G0316.build.extra_flags=-D{build.product_line} {build.xSerial} -D__CORTEX_SC=0
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- # DISCO_B_G431B_ESC1 board
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- Disco.menu.pnum.DISCO_B_G431B_ESC1=B-G431B-ESC1
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.node="NODE_G431CB,NOD_G431CB,DIS_G431CB"
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.upload.maximum_size=131072
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.upload.maximum_data_size=32768
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.build.mcu=cortex-m4
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.build.board=DISCO_B_G431B_ESC1
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.build.series=STM32G4xx
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.build.product_line=STM32G431xx
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.build.variant=STM32G4xx/G431C(6-8-B)U_G441CBU
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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- Disco.menu.pnum.DISCO_B_G431B_ESC1.build.cmsis_lib_gcc=arm_cortexM4lf_math
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-
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- # B-L475E-IOT01A board
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- Disco.menu.pnum.B_L475E_IOT01A=B-L475E-IOT01A
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- Disco.menu.pnum.B_L475E_IOT01A.node=DIS_L4IOT
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- Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_size=1048576
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- Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_data_size=98304
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- Disco.menu.pnum.B_L475E_IOT01A.build.mcu=cortex-m4
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- Disco.menu.pnum.B_L475E_IOT01A.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
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- Disco.menu.pnum.B_L475E_IOT01A.build.board=B_L475E_IOT01A
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- Disco.menu.pnum.B_L475E_IOT01A.build.series=STM32L4xx
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- Disco.menu.pnum.B_L475E_IOT01A.build.product_line=STM32L475xx
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- Disco.menu.pnum.B_L475E_IOT01A.build.variant=STM32L4xx//L475V(C-E-G)T_L476V(C-E-G)T_L486VGT
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- Disco.menu.pnum.B_L475E_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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- Disco.menu.pnum.B_L475E_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
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-
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- # B_L4S5I_IOT01A board
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- Disco.menu.pnum.B_L4S5I_IOT01A=B-L4S5I-IOT01A
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- Disco.menu.pnum.B_L4S5I_IOT01A.node="DIS_L4IOT,DIS_L4S5VI"
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- Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_size=2097152
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- Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_data_size=655360
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- Disco.menu.pnum.B_L4S5I_IOT01A.build.mcu=cortex-m4
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- Disco.menu.pnum.B_L4S5I_IOT01A.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
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- Disco.menu.pnum.B_L4S5I_IOT01A.build.board=B_L4S5I_IOT01A
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- Disco.menu.pnum.B_L4S5I_IOT01A.build.series=STM32L4xx
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- Disco.menu.pnum.B_L4S5I_IOT01A.build.product_line=STM32L4S5xx
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- Disco.menu.pnum.B_L4S5I_IOT01A.build.variant=STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT
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- Disco.menu.pnum.B_L4S5I_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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- Disco.menu.pnum.B_L4S5I_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
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-
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- # B-L072Z-LRWAN1 board
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- Disco.menu.pnum.B_L072Z_LRWAN1=B-L072Z-LRWAN1
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- Disco.menu.pnum.B_L072Z_LRWAN1.node="DIS_L072Z,NODE_L072CZ"
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- Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_size=196608
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- Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_data_size=20480
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- Disco.menu.pnum.B_L072Z_LRWAN1.build.mcu=cortex-m0plus
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- Disco.menu.pnum.B_L072Z_LRWAN1.build.board=B_L072Z_LRWAN1
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- Disco.menu.pnum.B_L072Z_LRWAN1.build.series=STM32L0xx
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- Disco.menu.pnum.B_L072Z_LRWAN1.build.product_line=STM32L072xx
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- Disco.menu.pnum.B_L072Z_LRWAN1.build.variant=STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY
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- Disco.menu.pnum.B_L072Z_LRWAN1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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- Disco.menu.pnum.B_L072Z_LRWAN1.build.cmsis_lib_gcc=arm_cortexM0l_math
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- Disco.menu.pnum.B_L072Z_LRWAN1.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
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-
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# STM32WB5MM-DK board
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Disco.menu.pnum.STM32WB5MM_DK=STM32WB5MM-DK
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Disco.menu.pnum.STM32WB5MM_DK.node="DIS_WB5MMG"
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