Skip to content

Commit 16d3180

Browse files
committed
chore: change Disco menu order
Sorted by alphabetical order and rename the Disco G4 with correct name. Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent 62f62a9 commit 16d3180

File tree

4 files changed

+60
-60
lines changed

4 files changed

+60
-60
lines changed

boards.txt

Lines changed: 56 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -691,6 +691,62 @@ Disco.build.board=Disco
691691
Disco.build.variant_h=variant_{build.board}.h
692692
Disco.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
693693

694+
# B_G431B_ESC1 board
695+
Disco.menu.pnum.B_G431B_ESC1=B-G431B-ESC1
696+
Disco.menu.pnum.B_G431B_ESC1.node="NODE_G431CB,NOD_G431CB,DIS_G431CB"
697+
Disco.menu.pnum.B_G431B_ESC1.upload.maximum_size=131072
698+
Disco.menu.pnum.B_G431B_ESC1.upload.maximum_data_size=32768
699+
Disco.menu.pnum.B_G431B_ESC1.build.mcu=cortex-m4
700+
Disco.menu.pnum.B_G431B_ESC1.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
701+
Disco.menu.pnum.B_G431B_ESC1.build.board=B_G431B_ESC1
702+
Disco.menu.pnum.B_G431B_ESC1.build.series=STM32G4xx
703+
Disco.menu.pnum.B_G431B_ESC1.build.product_line=STM32G431xx
704+
Disco.menu.pnum.B_G431B_ESC1.build.variant=STM32G4xx/G431C(6-8-B)U_G441CBU
705+
Disco.menu.pnum.B_G431B_ESC1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
706+
Disco.menu.pnum.B_G431B_ESC1.build.cmsis_lib_gcc=arm_cortexM4lf_math
707+
708+
# B-L072Z-LRWAN1 board
709+
Disco.menu.pnum.B_L072Z_LRWAN1=B-L072Z-LRWAN1
710+
Disco.menu.pnum.B_L072Z_LRWAN1.node="DIS_L072Z,NODE_L072CZ"
711+
Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_size=196608
712+
Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_data_size=20480
713+
Disco.menu.pnum.B_L072Z_LRWAN1.build.mcu=cortex-m0plus
714+
Disco.menu.pnum.B_L072Z_LRWAN1.build.board=B_L072Z_LRWAN1
715+
Disco.menu.pnum.B_L072Z_LRWAN1.build.series=STM32L0xx
716+
Disco.menu.pnum.B_L072Z_LRWAN1.build.product_line=STM32L072xx
717+
Disco.menu.pnum.B_L072Z_LRWAN1.build.variant=STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY
718+
Disco.menu.pnum.B_L072Z_LRWAN1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
719+
Disco.menu.pnum.B_L072Z_LRWAN1.build.cmsis_lib_gcc=arm_cortexM0l_math
720+
Disco.menu.pnum.B_L072Z_LRWAN1.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
721+
722+
# B-L475E-IOT01A board
723+
Disco.menu.pnum.B_L475E_IOT01A=B-L475E-IOT01A
724+
Disco.menu.pnum.B_L475E_IOT01A.node=DIS_L4IOT
725+
Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_size=1048576
726+
Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_data_size=98304
727+
Disco.menu.pnum.B_L475E_IOT01A.build.mcu=cortex-m4
728+
Disco.menu.pnum.B_L475E_IOT01A.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
729+
Disco.menu.pnum.B_L475E_IOT01A.build.board=B_L475E_IOT01A
730+
Disco.menu.pnum.B_L475E_IOT01A.build.series=STM32L4xx
731+
Disco.menu.pnum.B_L475E_IOT01A.build.product_line=STM32L475xx
732+
Disco.menu.pnum.B_L475E_IOT01A.build.variant=STM32L4xx//L475V(C-E-G)T_L476V(C-E-G)T_L486VGT
733+
Disco.menu.pnum.B_L475E_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
734+
Disco.menu.pnum.B_L475E_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
735+
736+
# B_L4S5I_IOT01A board
737+
Disco.menu.pnum.B_L4S5I_IOT01A=B-L4S5I-IOT01A
738+
Disco.menu.pnum.B_L4S5I_IOT01A.node="DIS_L4IOT,DIS_L4S5VI"
739+
Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_size=2097152
740+
Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_data_size=655360
741+
Disco.menu.pnum.B_L4S5I_IOT01A.build.mcu=cortex-m4
742+
Disco.menu.pnum.B_L4S5I_IOT01A.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
743+
Disco.menu.pnum.B_L4S5I_IOT01A.build.board=B_L4S5I_IOT01A
744+
Disco.menu.pnum.B_L4S5I_IOT01A.build.series=STM32L4xx
745+
Disco.menu.pnum.B_L4S5I_IOT01A.build.product_line=STM32L4S5xx
746+
Disco.menu.pnum.B_L4S5I_IOT01A.build.variant=STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT
747+
Disco.menu.pnum.B_L4S5I_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
748+
Disco.menu.pnum.B_L4S5I_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
749+
694750
# DISCO_F030R8 board
695751
Disco.menu.pnum.DISCO_F030R8=STM32F030R8-DISCVL
696752
Disco.menu.pnum.DISCO_F030R8.node="No_mass_storage_for_this_board_Use_STLink_upload_method"
@@ -794,62 +850,6 @@ Disco.menu.pnum.DISCO_G0316.build.variant=STM32G0xx/G031J(4-6)M_G041J6M
794850
Disco.menu.pnum.DISCO_G0316.build.cmsis_lib_gcc=arm_cortexM0l_math
795851
Disco.menu.pnum.DISCO_G0316.build.extra_flags=-D{build.product_line} {build.xSerial} -D__CORTEX_SC=0
796852

797-
# DISCO_B_G431B_ESC1 board
798-
Disco.menu.pnum.DISCO_B_G431B_ESC1=B-G431B-ESC1
799-
Disco.menu.pnum.DISCO_B_G431B_ESC1.node="NODE_G431CB,NOD_G431CB,DIS_G431CB"
800-
Disco.menu.pnum.DISCO_B_G431B_ESC1.upload.maximum_size=131072
801-
Disco.menu.pnum.DISCO_B_G431B_ESC1.upload.maximum_data_size=32768
802-
Disco.menu.pnum.DISCO_B_G431B_ESC1.build.mcu=cortex-m4
803-
Disco.menu.pnum.DISCO_B_G431B_ESC1.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
804-
Disco.menu.pnum.DISCO_B_G431B_ESC1.build.board=DISCO_B_G431B_ESC1
805-
Disco.menu.pnum.DISCO_B_G431B_ESC1.build.series=STM32G4xx
806-
Disco.menu.pnum.DISCO_B_G431B_ESC1.build.product_line=STM32G431xx
807-
Disco.menu.pnum.DISCO_B_G431B_ESC1.build.variant=STM32G4xx/G431C(6-8-B)U_G441CBU
808-
Disco.menu.pnum.DISCO_B_G431B_ESC1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
809-
Disco.menu.pnum.DISCO_B_G431B_ESC1.build.cmsis_lib_gcc=arm_cortexM4lf_math
810-
811-
# B-L475E-IOT01A board
812-
Disco.menu.pnum.B_L475E_IOT01A=B-L475E-IOT01A
813-
Disco.menu.pnum.B_L475E_IOT01A.node=DIS_L4IOT
814-
Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_size=1048576
815-
Disco.menu.pnum.B_L475E_IOT01A.upload.maximum_data_size=98304
816-
Disco.menu.pnum.B_L475E_IOT01A.build.mcu=cortex-m4
817-
Disco.menu.pnum.B_L475E_IOT01A.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
818-
Disco.menu.pnum.B_L475E_IOT01A.build.board=B_L475E_IOT01A
819-
Disco.menu.pnum.B_L475E_IOT01A.build.series=STM32L4xx
820-
Disco.menu.pnum.B_L475E_IOT01A.build.product_line=STM32L475xx
821-
Disco.menu.pnum.B_L475E_IOT01A.build.variant=STM32L4xx//L475V(C-E-G)T_L476V(C-E-G)T_L486VGT
822-
Disco.menu.pnum.B_L475E_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
823-
Disco.menu.pnum.B_L475E_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
824-
825-
# B_L4S5I_IOT01A board
826-
Disco.menu.pnum.B_L4S5I_IOT01A=B-L4S5I-IOT01A
827-
Disco.menu.pnum.B_L4S5I_IOT01A.node="DIS_L4IOT,DIS_L4S5VI"
828-
Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_size=2097152
829-
Disco.menu.pnum.B_L4S5I_IOT01A.upload.maximum_data_size=655360
830-
Disco.menu.pnum.B_L4S5I_IOT01A.build.mcu=cortex-m4
831-
Disco.menu.pnum.B_L4S5I_IOT01A.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
832-
Disco.menu.pnum.B_L4S5I_IOT01A.build.board=B_L4S5I_IOT01A
833-
Disco.menu.pnum.B_L4S5I_IOT01A.build.series=STM32L4xx
834-
Disco.menu.pnum.B_L4S5I_IOT01A.build.product_line=STM32L4S5xx
835-
Disco.menu.pnum.B_L4S5I_IOT01A.build.variant=STM32L4xx/L4R5V(G-I)T_L4R7VIT_L4S5VIT_L4S7VIT
836-
Disco.menu.pnum.B_L4S5I_IOT01A.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
837-
Disco.menu.pnum.B_L4S5I_IOT01A.build.cmsis_lib_gcc=arm_cortexM4lf_math
838-
839-
# B-L072Z-LRWAN1 board
840-
Disco.menu.pnum.B_L072Z_LRWAN1=B-L072Z-LRWAN1
841-
Disco.menu.pnum.B_L072Z_LRWAN1.node="DIS_L072Z,NODE_L072CZ"
842-
Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_size=196608
843-
Disco.menu.pnum.B_L072Z_LRWAN1.upload.maximum_data_size=20480
844-
Disco.menu.pnum.B_L072Z_LRWAN1.build.mcu=cortex-m0plus
845-
Disco.menu.pnum.B_L072Z_LRWAN1.build.board=B_L072Z_LRWAN1
846-
Disco.menu.pnum.B_L072Z_LRWAN1.build.series=STM32L0xx
847-
Disco.menu.pnum.B_L072Z_LRWAN1.build.product_line=STM32L072xx
848-
Disco.menu.pnum.B_L072Z_LRWAN1.build.variant=STM32L0xx/L072CBY_L072CZ(E-Y)_L073CZY_L082CZY
849-
Disco.menu.pnum.B_L072Z_LRWAN1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
850-
Disco.menu.pnum.B_L072Z_LRWAN1.build.cmsis_lib_gcc=arm_cortexM0l_math
851-
Disco.menu.pnum.B_L072Z_LRWAN1.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
852-
853853
# STM32WB5MM-DK board
854854
Disco.menu.pnum.STM32WB5MM_DK=STM32WB5MM-DK
855855
Disco.menu.pnum.STM32WB5MM_DK.node="DIS_WB5MMG"

variants/STM32G4xx/G431C(6-8-B)U_G441CBU/PeripheralPins_DISCO_B_G431B_ESC1.c renamed to variants/STM32G4xx/G431C(6-8-B)U_G441CBU/PeripheralPins_B_G431B_ESC1.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@
1414
* Automatically generated from STM32G431C(6-8-B)Ux.xml, STM32G441CBUx.xml
1515
* CubeMX DB release 6.0.20
1616
*/
17-
#if defined(ARDUINO_DISCO_B_G431B_ESC1)
17+
#if defined(ARDUINO_B_G431B_ESC1)
1818
#include "Arduino.h"
1919
#include "PeripheralPins.h"
2020

@@ -317,4 +317,4 @@ WEAK const PinMap PinMap_USB[] = {
317317

318318
//*** No SD ***
319319

320-
#endif /* ARDUINO_DISCO_B_G431B_ESC1 */
320+
#endif /* ARDUINO_B_G431B_ESC1 */

variants/STM32G4xx/G431C(6-8-B)U_G441CBU/variant_DISCO_B_G431B_ESC1.cpp renamed to variants/STM32G4xx/G431C(6-8-B)U_G441CBU/variant_B_G431B_ESC1.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010
*
1111
*******************************************************************************
1212
*/
13-
#if defined(ARDUINO_DISCO_B_G431B_ESC1)
13+
#if defined(ARDUINO_B_G431B_ESC1)
1414

1515
#include "pins_arduino.h"
1616

@@ -145,4 +145,4 @@ WEAK void SystemClock_Config(void)
145145
}
146146
#endif
147147

148-
#endif /* ARDUINO_DISCO_B_G431B_ESC1 */
148+
#endif /* ARDUINO_B_G431B_ESC1 */

0 commit comments

Comments
 (0)