@@ -189,192 +189,237 @@ static I2C_HandleTypeDef *i2c_handles[I2C_NUM];
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static uint32_t i2c_getClkFreq (I2C_TypeDef * i2c )
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{
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uint32_t clkSrcFreq = 0 ;
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- #if !defined(STM32MP1xx )
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#ifdef STM32H7xx
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PLL3_ClocksTypeDef PLL3_Clocks ;
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#endif
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- #if defined I2C1_BASE
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+ #if defined( I2C1_BASE )
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if (i2c == I2C1 ) {
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- switch (__HAL_RCC_GET_I2C1_SOURCE ()) {
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- case RCC_I2C1CLKSOURCE_HSI :
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- clkSrcFreq = HSI_VALUE ;
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- break ;
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+ #if defined(RCC_PERIPHCLK_I2C1 ) || defined(RCC_PERIPHCLK_I2C12 )
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+ #ifdef RCC_PERIPHCLK_I2C1
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C1 );
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+ #else
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C12 );
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+ #endif
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+ if (clkSrcFreq == 0 )
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+ #endif
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+ {
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+ switch (__HAL_RCC_GET_I2C1_SOURCE ()) {
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+ #ifdef RCC_I2C1CLKSOURCE_HSI
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+ case RCC_I2C1CLKSOURCE_HSI :
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+ clkSrcFreq = HSI_VALUE ;
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+ break ;
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+ #endif
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#ifdef RCC_I2C1CLKSOURCE_SYSCLK
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- case RCC_I2C1CLKSOURCE_SYSCLK :
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- clkSrcFreq = SystemCoreClock ;
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- break ;
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+ case RCC_I2C1CLKSOURCE_SYSCLK :
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+ clkSrcFreq = SystemCoreClock ;
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+ break ;
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#endif
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#if defined(RCC_I2C1CLKSOURCE_PCLK1 ) || defined(RCC_I2C1CLKSOURCE_D2PCLK1 )
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#ifdef RCC_I2C1CLKSOURCE_PCLK1
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- case RCC_I2C1CLKSOURCE_PCLK1 :
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+ case RCC_I2C1CLKSOURCE_PCLK1 :
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#endif
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#ifdef RCC_I2C1CLKSOURCE_D2PCLK1
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- case RCC_I2C1CLKSOURCE_D2PCLK1 :
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+ case RCC_I2C1CLKSOURCE_D2PCLK1 :
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#endif
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- clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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- break ;
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+ clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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+ break ;
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#endif
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#ifdef RCC_I2C1CLKSOURCE_CSI
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- case RCC_I2C1CLKSOURCE_CSI :
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- clkSrcFreq = CSI_VALUE ;
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- break ;
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+ case RCC_I2C1CLKSOURCE_CSI :
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+ clkSrcFreq = CSI_VALUE ;
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+ break ;
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#endif
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#ifdef RCC_I2C1CLKSOURCE_PLL3
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- case RCC_I2C1CLKSOURCE_PLL3 :
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- HAL_RCCEx_GetPLL3ClockFreq (& PLL3_Clocks );
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- clkSrcFreq = PLL3_Clocks .PLL3_R_Frequency ;
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- break ;
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+ case RCC_I2C1CLKSOURCE_PLL3 :
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+ HAL_RCCEx_GetPLL3ClockFreq (& PLL3_Clocks );
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+ clkSrcFreq = PLL3_Clocks .PLL3_R_Frequency ;
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+ break ;
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#endif
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- default :
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- Error_Handler ();
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+ default :
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+ Error_Handler ();
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+ }
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}
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}
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#endif // I2C1_BASE
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- #if defined I2C2_BASE
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+ #if defined( I2C2_BASE )
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if (i2c == I2C2 ) {
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+ #if defined(RCC_PERIPHCLK_I2C2 ) || defined(RCC_PERIPHCLK_I2C12 )
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+ #ifdef RCC_PERIPHCLK_I2C2
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C2 );
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+ #else
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C12 );
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+ #endif
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+ if (clkSrcFreq == 0 )
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+ #endif
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+ {
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#ifdef __HAL_RCC_GET_I2C2_SOURCE
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- switch (__HAL_RCC_GET_I2C2_SOURCE ()) {
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- case RCC_I2C2CLKSOURCE_HSI :
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- clkSrcFreq = HSI_VALUE ;
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- break ;
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+ switch (__HAL_RCC_GET_I2C2_SOURCE ()) {
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+ case RCC_I2C2CLKSOURCE_HSI :
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+ clkSrcFreq = HSI_VALUE ;
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+ break ;
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#ifdef RCC_I2C2CLKSOURCE_SYSCLK
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- case RCC_I2C2CLKSOURCE_SYSCLK :
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- clkSrcFreq = SystemCoreClock ;
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- break ;
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+ case RCC_I2C2CLKSOURCE_SYSCLK :
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+ clkSrcFreq = SystemCoreClock ;
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+ break ;
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#endif
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#if defined(RCC_I2C2CLKSOURCE_PCLK1 ) || defined(RCC_I2C2CLKSOURCE_D2PCLK1 )
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#ifdef RCC_I2C2CLKSOURCE_PCLK1
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- case RCC_I2C2CLKSOURCE_PCLK1 :
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+ case RCC_I2C2CLKSOURCE_PCLK1 :
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#endif
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#ifdef RCC_I2C2CLKSOURCE_D2PCLK1
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- case RCC_I2C2CLKSOURCE_D2PCLK1 :
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+ case RCC_I2C2CLKSOURCE_D2PCLK1 :
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#endif
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- clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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- break ;
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+ clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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+ break ;
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#endif
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#ifdef RCC_I2C2CLKSOURCE_CSI
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- case RCC_I2C2CLKSOURCE_CSI :
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- clkSrcFreq = CSI_VALUE ;
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- break ;
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+ case RCC_I2C2CLKSOURCE_CSI :
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+ clkSrcFreq = CSI_VALUE ;
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+ break ;
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#endif
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#ifdef RCC_I2C2CLKSOURCE_PLL3
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- case RCC_I2C2CLKSOURCE_PLL3 :
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- HAL_RCCEx_GetPLL3ClockFreq (& PLL3_Clocks );
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- clkSrcFreq = PLL3_Clocks .PLL3_R_Frequency ;
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- break ;
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+ case RCC_I2C2CLKSOURCE_PLL3 :
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+ HAL_RCCEx_GetPLL3ClockFreq (& PLL3_Clocks );
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+ clkSrcFreq = PLL3_Clocks .PLL3_R_Frequency ;
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+ break ;
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#endif
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- default :
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- Error_Handler ();
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- }
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+ default :
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+ Error_Handler ();
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+ }
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#else
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- /* STM32 L0/G0 I2C2 has no independent clock */
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- clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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+ /* STM32 L0/G0 I2C2 has no independent clock */
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+ clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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#endif
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+ }
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}
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#endif // I2C2_BASE
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- #if defined I2C3_BASE
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+ #if defined( I2C3_BASE )
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if (i2c == I2C3 ) {
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+ #if defined(RCC_PERIPHCLK_I2C3 ) || defined(RCC_PERIPHCLK_I2C35 )
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+ #ifdef RCC_PERIPHCLK_I2C3
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C3 );
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+ #else
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C35 );
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+ #endif
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+ if (clkSrcFreq == 0 )
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+ #endif
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+ {
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#if defined(__HAL_RCC_GET_I2C3_SOURCE )
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- switch (__HAL_RCC_GET_I2C3_SOURCE ()) {
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- case RCC_I2C3CLKSOURCE_HSI :
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- clkSrcFreq = HSI_VALUE ;
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- break ;
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+ switch (__HAL_RCC_GET_I2C3_SOURCE ()) {
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+ case RCC_I2C3CLKSOURCE_HSI :
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+ clkSrcFreq = HSI_VALUE ;
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+ break ;
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#ifdef RCC_I2C3CLKSOURCE_SYSCLK
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- case RCC_I2C3CLKSOURCE_SYSCLK :
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- clkSrcFreq = SystemCoreClock ;
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- break ;
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+ case RCC_I2C3CLKSOURCE_SYSCLK :
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+ clkSrcFreq = SystemCoreClock ;
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+ break ;
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#endif
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#if defined(RCC_I2C3CLKSOURCE_PCLK1 ) || defined(RCC_I2C3CLKSOURCE_D2PCLK1 )
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#ifdef RCC_I2C3CLKSOURCE_PCLK1
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- case RCC_I2C3CLKSOURCE_PCLK1 :
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+ case RCC_I2C3CLKSOURCE_PCLK1 :
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#endif
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#ifdef RCC_I2C3CLKSOURCE_D2PCLK1
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- case RCC_I2C3CLKSOURCE_D2PCLK1 :
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+ case RCC_I2C3CLKSOURCE_D2PCLK1 :
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#endif
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- clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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- break ;
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+ clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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+ break ;
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#endif
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#ifdef RCC_I2C3CLKSOURCE_CSI
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- case RCC_I2C3CLKSOURCE_CSI :
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- clkSrcFreq = CSI_VALUE ;
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- break ;
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+ case RCC_I2C3CLKSOURCE_CSI :
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+ clkSrcFreq = CSI_VALUE ;
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+ break ;
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#endif
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#ifdef RCC_I2C3CLKSOURCE_PLL3
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- case RCC_I2C3CLKSOURCE_PLL3 :
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- HAL_RCCEx_GetPLL3ClockFreq (& PLL3_Clocks );
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- clkSrcFreq = PLL3_Clocks .PLL3_R_Frequency ;
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- break ;
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+ case RCC_I2C3CLKSOURCE_PLL3 :
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+ HAL_RCCEx_GetPLL3ClockFreq (& PLL3_Clocks );
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+ clkSrcFreq = PLL3_Clocks .PLL3_R_Frequency ;
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+ break ;
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#endif
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- default :
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- Error_Handler ();
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- }
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+ default :
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+ Error_Handler ();
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+ }
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#else
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- /* STM32 G0 I2C3 has no independent clock */
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- clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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+ /* STM32 G0 I2C3 has no independent clock */
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+ clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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#endif
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+ }
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}
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#endif // I2C3_BASE
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- #if defined I2C4_BASE
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+ #if defined( I2C4_BASE )
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if (i2c == I2C4 ) {
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- switch (__HAL_RCC_GET_I2C4_SOURCE ()) {
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- case RCC_I2C4CLKSOURCE_HSI :
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- clkSrcFreq = HSI_VALUE ;
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- break ;
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+ #if defined(RCC_PERIPHCLK_I2C4 ) || defined(RCC_PERIPHCLK_I2C46 )
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+ #ifdef RCC_PERIPHCLK_I2C4
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C4 );
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+ #else
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C46 );
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+ #endif
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+ if (clkSrcFreq == 0 )
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+ #endif
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+ {
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+ #if defined(__HAL_RCC_GET_I2C4_SOURCE )
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+ switch (__HAL_RCC_GET_I2C4_SOURCE ()) {
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+ #ifdef RCC_I2C4CLKSOURCE_HSI
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+ case RCC_I2C4CLKSOURCE_HSI :
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+ clkSrcFreq = HSI_VALUE ;
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+ break ;
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+ #endif
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#ifdef RCC_I2C4CLKSOURCE_SYSCLK
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- case RCC_I2C4CLKSOURCE_SYSCLK :
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- clkSrcFreq = SystemCoreClock ;
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- break ;
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+ case RCC_I2C4CLKSOURCE_SYSCLK :
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+ clkSrcFreq = SystemCoreClock ;
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+ break ;
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#endif
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#ifdef RCC_I2C4CLKSOURCE_PCLK1
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- case RCC_I2C4CLKSOURCE_PCLK1 :
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- clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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- break ;
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+ case RCC_I2C4CLKSOURCE_PCLK1 :
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+ clkSrcFreq = HAL_RCC_GetPCLK1Freq ();
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+ break ;
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#endif
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#ifdef RCC_I2C4CLKSOURCE_D3PCLK1
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- case RCC_I2C4CLKSOURCE_D3PCLK1 :
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- clkSrcFreq = HAL_RCCEx_GetD3PCLK1Freq ();
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- break ;
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+ case RCC_I2C4CLKSOURCE_D3PCLK1 :
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+ clkSrcFreq = HAL_RCCEx_GetD3PCLK1Freq ();
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+ break ;
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#endif
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#ifdef RCC_I2C4CLKSOURCE_CSI
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- case RCC_I2C4CLKSOURCE_CSI :
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- clkSrcFreq = CSI_VALUE ;
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- break ;
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+ case RCC_I2C4CLKSOURCE_CSI :
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+ clkSrcFreq = CSI_VALUE ;
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+ break ;
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#endif
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#ifdef RCC_I2C4CLKSOURCE_PLL3
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- case RCC_I2C4CLKSOURCE_PLL3 :
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- HAL_RCCEx_GetPLL3ClockFreq (& PLL3_Clocks );
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- clkSrcFreq = PLL3_Clocks .PLL3_R_Frequency ;
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- break ;
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+ case RCC_I2C4CLKSOURCE_PLL3 :
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+ HAL_RCCEx_GetPLL3ClockFreq (& PLL3_Clocks );
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+ clkSrcFreq = PLL3_Clocks .PLL3_R_Frequency ;
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+ break ;
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+ #endif
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+ default :
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+ Error_Handler ();
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+ }
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#endif
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- default :
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- Error_Handler ();
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}
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}
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#endif // I2C4_BASE
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-
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- #elif defined(STM32MP1xx )
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- if (i2c == I2C1 ) {
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- clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C12 );
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- }
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- if (i2c == I2C2 ) {
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- clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C12 );
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- }
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- if (i2c == I2C3 ) {
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- clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C35 );
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- }
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- if (i2c == I2C4 ) {
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- clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C46 );
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- }
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- #endif // STM32MP1xx
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-
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- #if defined I2C5_BASE
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+ #if defined(I2C5_BASE )
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if (i2c == I2C5 ) {
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+ #if defined(RCC_PERIPHCLK_I2C5 ) || defined(RCC_PERIPHCLK_I2C35 )
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+ #ifdef RCC_PERIPHCLK_I2C5
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C5 );
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+ #else
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clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C35 );
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+ #endif
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+ if (clkSrcFreq == 0 )
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+ #endif
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+ {
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C35 );
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+ }
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}
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#endif // I2C5_BASE
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- #if defined I2C6_BASE
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+ #if defined( I2C6_BASE )
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if (i2c == I2C6 ) {
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+ #if defined(RCC_PERIPHCLK_I2C6 ) || defined(RCC_PERIPHCLK_I2C46 )
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+ #ifdef RCC_PERIPHCLK_I2C6
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+ clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C6 );
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+ #else
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clkSrcFreq = HAL_RCCEx_GetPeriphCLKFreq (RCC_PERIPHCLK_I2C46 );
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+ #endif
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+ #endif
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}
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#endif // I2C6_BASE
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return clkSrcFreq ;
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