6
6
//! @brief Functions to aid with configuring the GPIOs.
7
7
//!
8
8
//! @addtogroup BSP Board Support Package (BSP)
9
- //! @addtogroup apollo3_fpga_bsp BSP for the Apollo3 Hotshot FPGA
10
9
//! @ingroup BSP
11
10
//! @{
12
11
//
13
12
//*****************************************************************************
14
13
15
- //*****************************************************************************
16
- //
17
- // Copyright (c) 2019, Ambiq Micro
18
- // All rights reserved.
19
- //
20
- // Redistribution and use in source and binary forms, with or without
21
- // modification, are permitted provided that the following conditions are met:
22
- //
23
- // 1. Redistributions of source code must retain the above copyright notice,
24
- // this list of conditions and the following disclaimer.
25
- //
26
- // 2. Redistributions in binary form must reproduce the above copyright
27
- // notice, this list of conditions and the following disclaimer in the
28
- // documentation and/or other materials provided with the distribution.
29
- //
30
- // 3. Neither the name of the copyright holder nor the names of its
31
- // contributors may be used to endorse or promote products derived from this
32
- // software without specific prior written permission.
33
- //
34
- // Third party software included in this distribution is subject to the
35
- // additional license terms as defined in the /docs/licenses directory.
36
- //
37
- // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
38
- // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
39
- // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
40
- // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
41
- // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
42
- // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
43
- // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
44
- // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
45
- // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
46
- // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
47
- // POSSIBILITY OF SUCH DAMAGE.
48
- //
49
- // This is part of revision v2.0.0 of the AmbiqSuite Development Package.
50
- //
51
- //*****************************************************************************
52
-
53
14
#ifndef AM_BSP_H
54
15
#define AM_BSP_H
55
16
@@ -78,25 +39,37 @@ extern "C"
78
39
79
40
//*****************************************************************************
80
41
//
81
- // PDM Microphone
42
+ // Primary I2C.
82
43
//
83
44
//*****************************************************************************
84
- #define AM_BSP_PDM_CHANNEL AM_HAL_PDM_CHANNEL_RIGHT
85
- #define AM_BSP_PDM_DATA AM_BSP_GPIO_MIC_DATA
86
- #define AM_BSP_PDM_CLOCK AM_BSP_GPIO_MIC_CLK
87
- #define g_AM_BSP_PDM_DATA g_AM_BSP_GPIO_MIC_DATA
88
- #define g_AM_BSP_PDM_CLOCK g_AM_BSP_GPIO_MIC_CLK
89
-
45
+ #define AM_BSP_PRIM_I2C_IOM 4
46
+ #define AM_BSP_PRIM_I2C_SDA_PIN AM_BSP_GPIO_SDA
47
+ #define AM_BSP_PRIM_I2C_SCL_PIN AM_BSP_GPIO_SCL
48
+ #define g_AM_BSP_PRIM_I2C_SDA g_AM_BSP_GPIO_SDA
49
+ #define g_AM_BSP_PRIM_I2C_SCL g_AM_BSP_GPIO_SCL
90
50
91
51
//*****************************************************************************
92
52
//
93
- // Qwiic Connector.
53
+ // Primary SPI Pins
94
54
//
95
55
//*****************************************************************************
96
- #define AM_BSP_QWIIC_I2C_IOM 4
97
- #define AM_BSP_QWIIC_I2C_SDA_PIN AM_BSP_GPIO_IOM4_SDA
98
- #define AM_BSP_QWIIC_I2C_SCL_PIN AM_BSP_GPIO_IOM4_SCL
56
+ #define AM_BSP_PRIM_SPI_IOM 3
57
+ #define AM_BSP_PRIM_SPI_CLK_PIN AM_BSP_GPIO_SPI_SCK
58
+ #define AM_BSP_PRIM_SPI_SDO_PIN AM_BSP_GPIO_SPI_SDO
59
+ #define AM_BSP_PRIM_SPI_SDI_PIN AM_BSP_GPIO_SPI_SDI
60
+ #define g_AM_BSP_PRIM_SPI_CLK g_AM_BSP_GPIO_SPI_SCK
61
+ #define g_AM_BSP_PRIM_SPI_SDO g_AM_BSP_GPIO_SPI_SDO
62
+ #define g_AM_BSP_PRIM_SPI_SDI g_AM_BSP_GPIO_SPI_SDI
99
63
64
+ //*****************************************************************************
65
+ //
66
+ // Primary UART Pins
67
+ //
68
+ //*****************************************************************************
69
+ #define AM_BSP_PRIM_UART_TX_PIN AM_BSP_GPIO_COM_UART_TX
70
+ #define AM_BSP_PRIM_UART_RX_PIN AM_BSP_GPIO_COM_UART_RX
71
+ #define g_AM_BSP_PRIM_UART_TX g_AM_BSP_GPIO_COM_UART_TX
72
+ #define g_AM_BSP_PRIM_UART_RX g_AM_BSP_GPIO_COM_UART_RX
100
73
101
74
//*****************************************************************************
102
75
//
@@ -111,23 +84,22 @@ extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS];
111
84
#define AM_BSP_LED_BLUE AM_BSP_LED0
112
85
113
86
// Corresponding GPIO Numbers
114
- #define AM_BSP_GPIO_LED AM_BSP_GPIO_LED_BLUE
115
- #define AM_BSP_GPIO_LED0 AM_BSP_GPIO_LED_BLUE
116
- #define AM_BSP_GPIO_LED37 AM_BSP_GPIO_LED_BLUE
117
-
87
+ #define AM_BSP_GPIO_LED0 AM_BSP_GPIO_LED_BLUE
88
+ #define AM_BSP_GPIO_LED19 AM_BSP_GPIO_LED_BLUE
89
+ #define AM_BSP_GPIO_LED_STAT AM_BSP_GPIO_LED_BLUE
118
90
119
91
//*****************************************************************************
120
92
//
121
93
// PWM_LED peripheral assignments.
122
94
//
123
95
//*****************************************************************************
124
96
//
125
- // The ATP PWM LED is pad 5
97
+ // The Artemis MM PB LED0 is pad 19
126
98
//
127
99
#define AM_BSP_PIN_PWM_LED AM_BSP_GPIO_LED0
128
- #define AM_BSP_PWM_LED_TIMER 2
129
- #define AM_BSP_PWM_LED_TIMER_SEG AM_HAL_CTIMER_TIMERA
130
- #define AM_BSP_PWM_LED_TIMER_INT AM_HAL_CTIMER_INT_TIMERA2C0
100
+ #define AM_BSP_PWM_LED_TIMER 1
101
+ #define AM_BSP_PWM_LED_TIMER_SEG AM_HAL_CTIMER_TIMERB
102
+ #define AM_BSP_PWM_LED_TIMER_INT AM_HAL_CTIMER_INT_TIMERB1C0
131
103
132
104
//*****************************************************************************
133
105
//
@@ -142,6 +114,34 @@ extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS];
142
114
#define AM_BSP_UART_PRINT_INST 0
143
115
#define AM_BSP_UART_BOOTLOADER_INST 0
144
116
117
+ //*****************************************************************************
118
+ //
119
+ // Aliases for MicroMod connector pins.
120
+ //
121
+ //*****************************************************************************
122
+ #define AM_BSP_GPIO_CAM_MCLK AM_BSP_GPIO_AUD_OUT
123
+ #define AM_BSP_GPIO_CAM_PCLK AM_BSP_GPIO_AUD_IN
124
+
125
+ #define AM_BSP_GPIO_SPI_SCK1 AM_BSP_GPIO_SDIO_CLK
126
+ #define AM_BSP_GPIO_SPI_SDO1 AM_BSP_GPIO_SDIO_CMD
127
+ #define AM_BSP_GPIO_SPI_SDI1 AM_BSP_GPIO_SDIO_DATA0
128
+ #define AM_BSP_GPIO_SPI_CS1 AM_BSP_GPIO_SDIO_DATA3
129
+
130
+ #define AM_BSP_GPIO_BUS0 AM_BSP_GPIO_G0
131
+ #define AM_BSP_GPIO_BUS1 AM_BSP_GPIO_G1
132
+ #define AM_BSP_GPIO_BUS2 AM_BSP_GPIO_G2
133
+ #define AM_BSP_GPIO_BUS3 AM_BSP_GPIO_G3
134
+ #define AM_BSP_GPIO_BUS4 AM_BSP_GPIO_G4
135
+ #define AM_BSP_GPIO_BUS5 AM_BSP_GPIO_G5
136
+ #define AM_BSP_GPIO_BUS6 AM_BSP_GPIO_G6
137
+ #define AM_BSP_GPIO_BUS7 AM_BSP_GPIO_G7
138
+
139
+ #define AM_BSP_GPIO_ADC_DM AM_BSP_GPIO_G9
140
+ #define AM_BSP_GPIO_ADC_DP AM_BSP_GPIO_G10
141
+
142
+ #define AM_BSP_GPIO_CAM_HSYNC AM_BSP_GPIO_G9
143
+ #define AM_BSP_GPIO_CAM_VSYNC AM_BSP_GPIO_G10
144
+
145
145
//*****************************************************************************
146
146
//
147
147
// End User Modifiable Area
@@ -206,6 +206,7 @@ extern void am_bsp_itm_printf_disable(void);
206
206
207
207
extern void am_bsp_uart_string_print (char * pcString );
208
208
extern void am_bsp_uart_printf_enable (void );
209
+ extern void am_bsp_uart_printf_enable_custom (const am_hal_uart_config_t * p_config );
209
210
extern void am_bsp_uart_printf_disable (void );
210
211
211
212
extern void am_bsp_buffered_uart_printf_enable (void );
@@ -218,9 +219,3 @@ extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfe
218
219
#endif
219
220
220
221
#endif // AM_BSP_H
221
- //*****************************************************************************
222
- //
223
- // End Doxygen group.
224
- //! @}
225
- //
226
- //*****************************************************************************
0 commit comments