Skip to content

Commit d53b0a0

Browse files
Amanieu d'AntrasAmanieu
Amanieu d'Antras
authored andcommitted
Fix ARM and AArch64 calling convention for passing small composite types
On big-endian the values need to be right-aligned within a 64-bit register, as if the value had been read with a 64-bit load instruction.
1 parent 8afe598 commit d53b0a0

File tree

2 files changed

+3
-30
lines changed

2 files changed

+3
-30
lines changed

compiler/rustc_target/src/abi/call/aarch64.rs

Lines changed: 2 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -40,17 +40,7 @@ where
4040
let size = ret.layout.size;
4141
let bits = size.bits();
4242
if bits <= 128 {
43-
let unit = if bits <= 8 {
44-
Reg::i8()
45-
} else if bits <= 16 {
46-
Reg::i16()
47-
} else if bits <= 32 {
48-
Reg::i32()
49-
} else {
50-
Reg::i64()
51-
};
52-
53-
ret.cast_to(Uniform { unit, total: size });
43+
ret.cast_to(Uniform { unit: Reg::i64(), total: size });
5444
return;
5545
}
5646
ret.make_indirect();
@@ -72,17 +62,7 @@ where
7262
let size = arg.layout.size;
7363
let bits = size.bits();
7464
if bits <= 128 {
75-
let unit = if bits <= 8 {
76-
Reg::i8()
77-
} else if bits <= 16 {
78-
Reg::i16()
79-
} else if bits <= 32 {
80-
Reg::i32()
81-
} else {
82-
Reg::i64()
83-
};
84-
85-
arg.cast_to(Uniform { unit, total: size });
65+
arg.cast_to(Uniform { unit: Reg::i64(), total: size });
8666
return;
8767
}
8868
arg.make_indirect();

compiler/rustc_target/src/abi/call/arm.rs

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -45,14 +45,7 @@ where
4545
let size = ret.layout.size;
4646
let bits = size.bits();
4747
if bits <= 32 {
48-
let unit = if bits <= 8 {
49-
Reg::i8()
50-
} else if bits <= 16 {
51-
Reg::i16()
52-
} else {
53-
Reg::i32()
54-
};
55-
ret.cast_to(Uniform { unit, total: size });
48+
ret.cast_to(Uniform { unit: Reg::i32(), total: size });
5649
return;
5750
}
5851
ret.make_indirect();

0 commit comments

Comments
 (0)