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Auto merge of #3604 - RalfJung:intrinsics, r=RalfJung
intrinsics: just panic when they get used incorrectly This is already what we do most of the time, so do it consistently.
2 parents d4937cb + c6a0e2c commit d0b2c66

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+36
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‎src/tools/miri/src/intrinsics/atomic.rs

Lines changed: 33 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -25,93 +25,93 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
2525

2626
let intrinsic_structure: Vec<_> = intrinsic_name.split('_').collect();
2727

28-
fn read_ord<'tcx>(ord: &str) -> InterpResult<'tcx, AtomicReadOrd> {
29-
Ok(match ord {
28+
fn read_ord(ord: &str) -> AtomicReadOrd {
29+
match ord {
3030
"seqcst" => AtomicReadOrd::SeqCst,
3131
"acquire" => AtomicReadOrd::Acquire,
3232
"relaxed" => AtomicReadOrd::Relaxed,
33-
_ => throw_unsup_format!("unsupported read ordering `{ord}`"),
34-
})
33+
_ => panic!("invalid read ordering `{ord}`"),
34+
}
3535
}
3636

37-
fn write_ord<'tcx>(ord: &str) -> InterpResult<'tcx, AtomicWriteOrd> {
38-
Ok(match ord {
37+
fn write_ord(ord: &str) -> AtomicWriteOrd {
38+
match ord {
3939
"seqcst" => AtomicWriteOrd::SeqCst,
4040
"release" => AtomicWriteOrd::Release,
4141
"relaxed" => AtomicWriteOrd::Relaxed,
42-
_ => throw_unsup_format!("unsupported write ordering `{ord}`"),
43-
})
42+
_ => panic!("invalid write ordering `{ord}`"),
43+
}
4444
}
4545

46-
fn rw_ord<'tcx>(ord: &str) -> InterpResult<'tcx, AtomicRwOrd> {
47-
Ok(match ord {
46+
fn rw_ord(ord: &str) -> AtomicRwOrd {
47+
match ord {
4848
"seqcst" => AtomicRwOrd::SeqCst,
4949
"acqrel" => AtomicRwOrd::AcqRel,
5050
"acquire" => AtomicRwOrd::Acquire,
5151
"release" => AtomicRwOrd::Release,
5252
"relaxed" => AtomicRwOrd::Relaxed,
53-
_ => throw_unsup_format!("unsupported read-write ordering `{ord}`"),
54-
})
53+
_ => panic!("invalid read-write ordering `{ord}`"),
54+
}
5555
}
5656

57-
fn fence_ord<'tcx>(ord: &str) -> InterpResult<'tcx, AtomicFenceOrd> {
58-
Ok(match ord {
57+
fn fence_ord(ord: &str) -> AtomicFenceOrd {
58+
match ord {
5959
"seqcst" => AtomicFenceOrd::SeqCst,
6060
"acqrel" => AtomicFenceOrd::AcqRel,
6161
"acquire" => AtomicFenceOrd::Acquire,
6262
"release" => AtomicFenceOrd::Release,
63-
_ => throw_unsup_format!("unsupported fence ordering `{ord}`"),
64-
})
63+
_ => panic!("invalid fence ordering `{ord}`"),
64+
}
6565
}
6666

6767
match &*intrinsic_structure {
68-
["load", ord] => this.atomic_load(args, dest, read_ord(ord)?)?,
69-
["store", ord] => this.atomic_store(args, write_ord(ord)?)?,
68+
["load", ord] => this.atomic_load(args, dest, read_ord(ord))?,
69+
["store", ord] => this.atomic_store(args, write_ord(ord))?,
7070

71-
["fence", ord] => this.atomic_fence_intrinsic(args, fence_ord(ord)?)?,
72-
["singlethreadfence", ord] => this.compiler_fence_intrinsic(args, fence_ord(ord)?)?,
71+
["fence", ord] => this.atomic_fence_intrinsic(args, fence_ord(ord))?,
72+
["singlethreadfence", ord] => this.compiler_fence_intrinsic(args, fence_ord(ord))?,
7373

74-
["xchg", ord] => this.atomic_exchange(args, dest, rw_ord(ord)?)?,
74+
["xchg", ord] => this.atomic_exchange(args, dest, rw_ord(ord))?,
7575
["cxchg", ord1, ord2] =>
76-
this.atomic_compare_exchange(args, dest, rw_ord(ord1)?, read_ord(ord2)?)?,
76+
this.atomic_compare_exchange(args, dest, rw_ord(ord1), read_ord(ord2))?,
7777
["cxchgweak", ord1, ord2] =>
78-
this.atomic_compare_exchange_weak(args, dest, rw_ord(ord1)?, read_ord(ord2)?)?,
78+
this.atomic_compare_exchange_weak(args, dest, rw_ord(ord1), read_ord(ord2))?,
7979

8080
["or", ord] =>
81-
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitOr, false), rw_ord(ord)?)?,
81+
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitOr, false), rw_ord(ord))?,
8282
["xor", ord] =>
83-
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitXor, false), rw_ord(ord)?)?,
83+
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitXor, false), rw_ord(ord))?,
8484
["and", ord] =>
85-
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitAnd, false), rw_ord(ord)?)?,
85+
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitAnd, false), rw_ord(ord))?,
8686
["nand", ord] =>
87-
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitAnd, true), rw_ord(ord)?)?,
87+
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::BitAnd, true), rw_ord(ord))?,
8888
["xadd", ord] =>
89-
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::Add, false), rw_ord(ord)?)?,
89+
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::Add, false), rw_ord(ord))?,
9090
["xsub", ord] =>
91-
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::Sub, false), rw_ord(ord)?)?,
91+
this.atomic_rmw_op(args, dest, AtomicOp::MirOp(BinOp::Sub, false), rw_ord(ord))?,
9292
["min", ord] => {
9393
// Later we will use the type to indicate signed vs unsigned,
9494
// so make sure it matches the intrinsic name.
9595
assert!(matches!(args[1].layout.ty.kind(), ty::Int(_)));
96-
this.atomic_rmw_op(args, dest, AtomicOp::Min, rw_ord(ord)?)?;
96+
this.atomic_rmw_op(args, dest, AtomicOp::Min, rw_ord(ord))?;
9797
}
9898
["umin", ord] => {
9999
// Later we will use the type to indicate signed vs unsigned,
100100
// so make sure it matches the intrinsic name.
101101
assert!(matches!(args[1].layout.ty.kind(), ty::Uint(_)));
102-
this.atomic_rmw_op(args, dest, AtomicOp::Min, rw_ord(ord)?)?;
102+
this.atomic_rmw_op(args, dest, AtomicOp::Min, rw_ord(ord))?;
103103
}
104104
["max", ord] => {
105105
// Later we will use the type to indicate signed vs unsigned,
106106
// so make sure it matches the intrinsic name.
107107
assert!(matches!(args[1].layout.ty.kind(), ty::Int(_)));
108-
this.atomic_rmw_op(args, dest, AtomicOp::Max, rw_ord(ord)?)?;
108+
this.atomic_rmw_op(args, dest, AtomicOp::Max, rw_ord(ord))?;
109109
}
110110
["umax", ord] => {
111111
// Later we will use the type to indicate signed vs unsigned,
112112
// so make sure it matches the intrinsic name.
113113
assert!(matches!(args[1].layout.ty.kind(), ty::Uint(_)));
114-
this.atomic_rmw_op(args, dest, AtomicOp::Max, rw_ord(ord)?)?;
114+
this.atomic_rmw_op(args, dest, AtomicOp::Max, rw_ord(ord))?;
115115
}
116116

117117
_ => return Ok(EmulateItemResult::NotSupported),

‎src/tools/miri/src/shims/x86/avx2.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -81,7 +81,7 @@ pub(super) trait EvalContextExt<'mir, 'tcx: 'mir>:
8181

8282
let scale = this.read_scalar(scale)?.to_i8()?;
8383
if !matches!(scale, 1 | 2 | 4 | 8) {
84-
throw_unsup_format!("invalid gather scale {scale}");
84+
panic!("invalid gather scale {scale}");
8585
}
8686
let scale = i64::from(scale);
8787

‎src/tools/miri/src/shims/x86/mod.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -200,7 +200,7 @@ impl FloatBinOp {
200200
) -> InterpResult<'tcx, Self> {
201201
// Only bits 0..=4 are used, remaining should be zero.
202202
if imm & !0b1_1111 != 0 {
203-
throw_unsup_format!("invalid `imm` parameter of {intrinsic}: 0x{imm:x}");
203+
panic!("invalid `imm` parameter of {intrinsic}: 0x{imm:x}");
204204
}
205205
// Bit 4 specifies whether the operation is quiet or signaling, which
206206
// we do not care in Miri.
@@ -683,7 +683,7 @@ fn rounding_from_imm<'tcx>(rounding: i32) -> InterpResult<'tcx, rustc_apfloat::R
683683
// SSE status register. Since we do not support modifying it from
684684
// Miri (or Rust), we assume it to be at its default mode (round-to-nearest).
685685
0b100..=0b111 => Ok(rustc_apfloat::Round::NearestTiesToEven),
686-
rounding => throw_unsup_format!("unsupported rounding mode 0x{rounding:02x}"),
686+
rounding => panic!("invalid rounding mode 0x{rounding:02x}"),
687687
}
688688
}
689689

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