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Add support for BPF inline assembly
1 parent 12ac719 commit b2a6967

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10 files changed

+176
-3
lines changed

10 files changed

+176
-3
lines changed

‎compiler/rustc_codegen_llvm/src/asm.rs

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -288,6 +288,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
288288
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {}
289289
InlineAsmArch::SpirV => {}
290290
InlineAsmArch::Wasm32 => {}
291+
InlineAsmArch::Bpf => {}
291292
}
292293
}
293294
if !options.contains(InlineAsmOptions::NOMEM) {
@@ -593,6 +594,8 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
593594
InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
594595
InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "^Yk",
595596
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
597+
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
598+
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
596599
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
597600
bug!("LLVM backend does not support SPIR-V")
598601
}
@@ -661,6 +664,7 @@ fn modifier_to_llvm(
661664
},
662665
InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => None,
663666
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => None,
667+
InlineAsmRegClass::Bpf(_) => None,
664668
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
665669
bug!("LLVM backend does not support SPIR-V")
666670
}
@@ -708,6 +712,8 @@ fn dummy_output_type(cx: &CodegenCx<'ll, 'tcx>, reg: InlineAsmRegClass) -> &'ll
708712
| InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => cx.type_f32(),
709713
InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => cx.type_i16(),
710714
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
715+
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => cx.type_i64(),
716+
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => cx.type_i32(),
711717
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
712718
bug!("LLVM backend does not support SPIR-V")
713719
}

‎compiler/rustc_codegen_ssa/src/target_features.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -210,6 +210,8 @@ const WASM_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[
210210
("nontrapping-fptoint", Some(sym::wasm_target_feature)),
211211
];
212212

213+
const BPF_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[("alu32", Some(sym::bpf_target_feature))];
214+
213215
/// When rustdoc is running, provide a list of all known features so that all their respective
214216
/// primitives may be documented.
215217
///
@@ -224,6 +226,7 @@ pub fn all_known_features() -> impl Iterator<Item = (&'static str, Option<Symbol
224226
.chain(MIPS_ALLOWED_FEATURES.iter())
225227
.chain(RISCV_ALLOWED_FEATURES.iter())
226228
.chain(WASM_ALLOWED_FEATURES.iter())
229+
.chain(BPF_ALLOWED_FEATURES.iter())
227230
.cloned()
228231
}
229232

@@ -237,6 +240,7 @@ pub fn supported_target_features(sess: &Session) -> &'static [(&'static str, Opt
237240
"powerpc" | "powerpc64" => POWERPC_ALLOWED_FEATURES,
238241
"riscv32" | "riscv64" => RISCV_ALLOWED_FEATURES,
239242
"wasm32" | "wasm64" => WASM_ALLOWED_FEATURES,
243+
"bpf" => BPF_ALLOWED_FEATURES,
240244
_ => &[],
241245
}
242246
}

‎compiler/rustc_span/src/symbol.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -328,6 +328,7 @@ symbols! {
328328
box_free,
329329
box_patterns,
330330
box_syntax,
331+
bpf_target_feature,
331332
braced_empty_structs,
332333
branch,
333334
breakpoint,
@@ -1332,6 +1333,7 @@ symbols! {
13321333
wrapping_add,
13331334
wrapping_mul,
13341335
wrapping_sub,
1336+
wreg,
13351337
write_bytes,
13361338
xmm_reg,
13371339
ymm_reg,

‎compiler/rustc_target/src/abi/call/mod.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -655,7 +655,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
655655
}
656656
}
657657
"asmjs" => wasm::compute_c_abi_info(cx, self),
658-
"bpfel" | "bpfeb" => bpf::compute_abi_info(self),
658+
"bpf" => bpf::compute_abi_info(self),
659659
a => return Err(format!("unrecognized arch \"{}\" in target specification", a)),
660660
}
661661

‎compiler/rustc_target/src/asm/bpf.rs

Lines changed: 129 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,129 @@
1+
use super::{InlineAsmArch, InlineAsmType, Target};
2+
use rustc_macros::HashStable_Generic;
3+
use std::fmt;
4+
5+
def_reg_class! {
6+
Bpf BpfInlineAsmRegClass {
7+
reg,
8+
wreg,
9+
}
10+
}
11+
12+
impl BpfInlineAsmRegClass {
13+
pub fn valid_modifiers(self, _arch: InlineAsmArch) -> &'static [char] {
14+
&[]
15+
}
16+
17+
pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
18+
None
19+
}
20+
21+
pub fn suggest_modifier(
22+
self,
23+
_arch: InlineAsmArch,
24+
_ty: InlineAsmType,
25+
) -> Option<(char, &'static str)> {
26+
None
27+
}
28+
29+
pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
30+
None
31+
}
32+
33+
pub fn supported_types(
34+
self,
35+
_arch: InlineAsmArch,
36+
) -> &'static [(InlineAsmType, Option<&'static str>)] {
37+
match self {
38+
Self::reg => types! { _: I8, I16, I32, I64; },
39+
Self::wreg => types! { "alu32": I8, I16, I32; },
40+
}
41+
}
42+
}
43+
44+
fn only_alu32(
45+
_arch: InlineAsmArch,
46+
mut has_feature: impl FnMut(&str) -> bool,
47+
_target: &Target,
48+
) -> Result<(), &'static str> {
49+
if !has_feature("alu32") {
50+
Err("register can't be used without the `alu32` target feature")
51+
} else {
52+
Ok(())
53+
}
54+
}
55+
56+
def_regs! {
57+
Bpf BpfInlineAsmReg BpfInlineAsmRegClass {
58+
r0: reg = ["r0"],
59+
r1: reg = ["r1"],
60+
r2: reg = ["r2"],
61+
r3: reg = ["r3"],
62+
r4: reg = ["r4"],
63+
r5: reg = ["r5"],
64+
r6: reg = ["r6"],
65+
r7: reg = ["r7"],
66+
r8: reg = ["r8"],
67+
r9: reg = ["r9"],
68+
w0: wreg = ["w0"] % only_alu32,
69+
w1: wreg = ["w1"] % only_alu32,
70+
w2: wreg = ["w2"] % only_alu32,
71+
w3: wreg = ["w3"] % only_alu32,
72+
w4: wreg = ["w4"] % only_alu32,
73+
w5: wreg = ["w5"] % only_alu32,
74+
w6: wreg = ["w6"] % only_alu32,
75+
w7: wreg = ["w7"] % only_alu32,
76+
w8: wreg = ["w8"] % only_alu32,
77+
w9: wreg = ["w9"] % only_alu32,
78+
79+
#error = ["r10", "w10"] =>
80+
"the stack pointer cannot be used as an operand for inline asm",
81+
}
82+
}
83+
84+
impl BpfInlineAsmReg {
85+
pub fn emit(
86+
self,
87+
out: &mut dyn fmt::Write,
88+
_arch: InlineAsmArch,
89+
_modifier: Option<char>,
90+
) -> fmt::Result {
91+
out.write_str(self.name())
92+
}
93+
94+
pub fn overlapping_regs(self, mut cb: impl FnMut(BpfInlineAsmReg)) {
95+
cb(self);
96+
97+
macro_rules! reg_conflicts {
98+
(
99+
$(
100+
$r:ident : $w:ident
101+
),*
102+
) => {
103+
match self {
104+
$(
105+
Self::$r => {
106+
cb(Self::$w);
107+
}
108+
Self::$w => {
109+
cb(Self::$r);
110+
}
111+
)*
112+
}
113+
};
114+
}
115+
116+
reg_conflicts! {
117+
r0 : w0,
118+
r1 : w1,
119+
r2 : w2,
120+
r3 : w3,
121+
r4 : w4,
122+
r5 : w5,
123+
r6 : w6,
124+
r7 : w7,
125+
r8 : w8,
126+
r9 : w9
127+
}
128+
}
129+
}

‎compiler/rustc_target/src/asm/mod.rs

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -148,6 +148,7 @@ macro_rules! types {
148148

149149
mod aarch64;
150150
mod arm;
151+
mod bpf;
151152
mod hexagon;
152153
mod mips;
153154
mod nvptx;
@@ -159,6 +160,7 @@ mod x86;
159160

160161
pub use aarch64::{AArch64InlineAsmReg, AArch64InlineAsmRegClass};
161162
pub use arm::{ArmInlineAsmReg, ArmInlineAsmRegClass};
163+
pub use bpf::{BpfInlineAsmReg, BpfInlineAsmRegClass};
162164
pub use hexagon::{HexagonInlineAsmReg, HexagonInlineAsmRegClass};
163165
pub use mips::{MipsInlineAsmReg, MipsInlineAsmRegClass};
164166
pub use nvptx::{NvptxInlineAsmReg, NvptxInlineAsmRegClass};
@@ -184,6 +186,7 @@ pub enum InlineAsmArch {
184186
PowerPC64,
185187
SpirV,
186188
Wasm32,
189+
Bpf,
187190
}
188191

189192
impl FromStr for InlineAsmArch {
@@ -205,6 +208,7 @@ impl FromStr for InlineAsmArch {
205208
"mips64" => Ok(Self::Mips64),
206209
"spirv" => Ok(Self::SpirV),
207210
"wasm32" => Ok(Self::Wasm32),
211+
"bpf" => Ok(Self::Bpf),
208212
_ => Err(()),
209213
}
210214
}
@@ -233,6 +237,7 @@ pub enum InlineAsmReg {
233237
Mips(MipsInlineAsmReg),
234238
SpirV(SpirVInlineAsmReg),
235239
Wasm(WasmInlineAsmReg),
240+
Bpf(BpfInlineAsmReg),
236241
// Placeholder for invalid register constraints for the current target
237242
Err,
238243
}
@@ -247,6 +252,7 @@ impl InlineAsmReg {
247252
Self::PowerPC(r) => r.name(),
248253
Self::Hexagon(r) => r.name(),
249254
Self::Mips(r) => r.name(),
255+
Self::Bpf(r) => r.name(),
250256
Self::Err => "<reg>",
251257
}
252258
}
@@ -260,6 +266,7 @@ impl InlineAsmReg {
260266
Self::PowerPC(r) => InlineAsmRegClass::PowerPC(r.reg_class()),
261267
Self::Hexagon(r) => InlineAsmRegClass::Hexagon(r.reg_class()),
262268
Self::Mips(r) => InlineAsmRegClass::Mips(r.reg_class()),
269+
Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()),
263270
Self::Err => InlineAsmRegClass::Err,
264271
}
265272
}
@@ -304,6 +311,9 @@ impl InlineAsmReg {
304311
InlineAsmArch::Wasm32 => {
305312
Self::Wasm(WasmInlineAsmReg::parse(arch, has_feature, target, &name)?)
306313
}
314+
InlineAsmArch::Bpf => {
315+
Self::Bpf(BpfInlineAsmReg::parse(arch, has_feature, target, &name)?)
316+
}
307317
})
308318
}
309319

@@ -323,6 +333,7 @@ impl InlineAsmReg {
323333
Self::PowerPC(r) => r.emit(out, arch, modifier),
324334
Self::Hexagon(r) => r.emit(out, arch, modifier),
325335
Self::Mips(r) => r.emit(out, arch, modifier),
336+
Self::Bpf(r) => r.emit(out, arch, modifier),
326337
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
327338
}
328339
}
@@ -336,6 +347,7 @@ impl InlineAsmReg {
336347
Self::PowerPC(_) => cb(self),
337348
Self::Hexagon(r) => r.overlapping_regs(|r| cb(Self::Hexagon(r))),
338349
Self::Mips(_) => cb(self),
350+
Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))),
339351
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
340352
}
341353
}
@@ -364,6 +376,7 @@ pub enum InlineAsmRegClass {
364376
Mips(MipsInlineAsmRegClass),
365377
SpirV(SpirVInlineAsmRegClass),
366378
Wasm(WasmInlineAsmRegClass),
379+
Bpf(BpfInlineAsmRegClass),
367380
// Placeholder for invalid register constraints for the current target
368381
Err,
369382
}
@@ -381,6 +394,7 @@ impl InlineAsmRegClass {
381394
Self::Mips(r) => r.name(),
382395
Self::SpirV(r) => r.name(),
383396
Self::Wasm(r) => r.name(),
397+
Self::Bpf(r) => r.name(),
384398
Self::Err => rustc_span::symbol::sym::reg,
385399
}
386400
}
@@ -400,6 +414,7 @@ impl InlineAsmRegClass {
400414
Self::Mips(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Mips),
401415
Self::SpirV(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::SpirV),
402416
Self::Wasm(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Wasm),
417+
Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf),
403418
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
404419
}
405420
}
@@ -426,6 +441,7 @@ impl InlineAsmRegClass {
426441
Self::Mips(r) => r.suggest_modifier(arch, ty),
427442
Self::SpirV(r) => r.suggest_modifier(arch, ty),
428443
Self::Wasm(r) => r.suggest_modifier(arch, ty),
444+
Self::Bpf(r) => r.suggest_modifier(arch, ty),
429445
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
430446
}
431447
}
@@ -448,6 +464,7 @@ impl InlineAsmRegClass {
448464
Self::Mips(r) => r.default_modifier(arch),
449465
Self::SpirV(r) => r.default_modifier(arch),
450466
Self::Wasm(r) => r.default_modifier(arch),
467+
Self::Bpf(r) => r.default_modifier(arch),
451468
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
452469
}
453470
}
@@ -469,6 +486,7 @@ impl InlineAsmRegClass {
469486
Self::Mips(r) => r.supported_types(arch),
470487
Self::SpirV(r) => r.supported_types(arch),
471488
Self::Wasm(r) => r.supported_types(arch),
489+
Self::Bpf(r) => r.supported_types(arch),
472490
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
473491
}
474492
}
@@ -493,6 +511,7 @@ impl InlineAsmRegClass {
493511
}
494512
InlineAsmArch::SpirV => Self::SpirV(SpirVInlineAsmRegClass::parse(arch, name)?),
495513
InlineAsmArch::Wasm32 => Self::Wasm(WasmInlineAsmRegClass::parse(arch, name)?),
514+
InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(arch, name)?),
496515
})
497516
}
498517

@@ -510,6 +529,7 @@ impl InlineAsmRegClass {
510529
Self::Mips(r) => r.valid_modifiers(arch),
511530
Self::SpirV(r) => r.valid_modifiers(arch),
512531
Self::Wasm(r) => r.valid_modifiers(arch),
532+
Self::Bpf(r) => r.valid_modifiers(arch),
513533
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
514534
}
515535
}
@@ -679,5 +699,10 @@ pub fn allocatable_registers(
679699
wasm::fill_reg_map(arch, has_feature, target, &mut map);
680700
map
681701
}
702+
InlineAsmArch::Bpf => {
703+
let mut map = bpf::regclass_map();
704+
bpf::fill_reg_map(arch, has_feature, target, &mut map);
705+
map
706+
}
682707
}
683708
}

‎compiler/rustc_target/src/spec/bpf_base.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@ use crate::{abi::Endian, spec::abi::Abi};
33

44
pub fn opts(endian: Endian) -> TargetOptions {
55
TargetOptions {
6+
allow_asm: true,
67
endian,
78
linker_flavor: LinkerFlavor::BpfLinker,
89
atomic_cas: false,

‎compiler/rustc_target/src/spec/bpfeb_unknown_none.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ pub fn target() -> Target {
66
llvm_target: "bpfeb".to_string(),
77
data_layout: "E-m:e-p:64:64-i64:64-i128:128-n32:64-S128".to_string(),
88
pointer_width: 64,
9-
arch: "bpfeb".to_string(),
9+
arch: "bpf".to_string(),
1010
options: bpf_base::opts(Endian::Big),
1111
}
1212
}

‎compiler/rustc_target/src/spec/bpfel_unknown_none.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ pub fn target() -> Target {
66
llvm_target: "bpfel".to_string(),
77
data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".to_string(),
88
pointer_width: 64,
9-
arch: "bpfel".to_string(),
9+
arch: "bpf".to_string(),
1010
options: bpf_base::opts(Endian::Little),
1111
}
1212
}

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