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[WebAssembly] Make shift values unsigned in wasm_simd128.h
On some platforms, negative shift values mean to shift in the opposite direction, but this is not true with WebAssembly. To avoid confusion, make the shift values in the shift intrinsics unsigned. Differential Revision: https://reviews.llvm.org/D108415
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‎clang/lib/Headers/wasm_simd128.h

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -960,17 +960,17 @@ static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_popcnt(v128_t __a) {
960960
}
961961

962962
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_shl(v128_t __a,
963-
int32_t __b) {
963+
uint32_t __b) {
964964
return (v128_t)((__i8x16)__a << __b);
965965
}
966966

967967
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i8x16_shr(v128_t __a,
968-
int32_t __b) {
968+
uint32_t __b) {
969969
return (v128_t)((__i8x16)__a >> __b);
970970
}
971971

972972
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u8x16_shr(v128_t __a,
973-
int32_t __b) {
973+
uint32_t __b) {
974974
return (v128_t)((__u8x16)__a >> __b);
975975
}
976976

@@ -1046,17 +1046,17 @@ static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i16x8_bitmask(v128_t __a) {
10461046
}
10471047

10481048
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_shl(v128_t __a,
1049-
int32_t __b) {
1049+
uint32_t __b) {
10501050
return (v128_t)((__i16x8)__a << __b);
10511051
}
10521052

10531053
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i16x8_shr(v128_t __a,
1054-
int32_t __b) {
1054+
uint32_t __b) {
10551055
return (v128_t)((__i16x8)__a >> __b);
10561056
}
10571057

10581058
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u16x8_shr(v128_t __a,
1059-
int32_t __b) {
1059+
uint32_t __b) {
10601060
return (v128_t)((__u16x8)__a >> __b);
10611061
}
10621062

@@ -1137,17 +1137,17 @@ static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i32x4_bitmask(v128_t __a) {
11371137
}
11381138

11391139
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_shl(v128_t __a,
1140-
int32_t __b) {
1140+
uint32_t __b) {
11411141
return (v128_t)((__i32x4)__a << __b);
11421142
}
11431143

11441144
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i32x4_shr(v128_t __a,
1145-
int32_t __b) {
1145+
uint32_t __b) {
11461146
return (v128_t)((__i32x4)__a >> __b);
11471147
}
11481148

11491149
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u32x4_shr(v128_t __a,
1150-
int32_t __b) {
1150+
uint32_t __b) {
11511151
return (v128_t)((__u32x4)__a >> __b);
11521152
}
11531153

@@ -1208,17 +1208,17 @@ static __inline__ uint32_t __DEFAULT_FN_ATTRS wasm_i64x2_bitmask(v128_t __a) {
12081208
}
12091209

12101210
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_shl(v128_t __a,
1211-
int32_t __b) {
1211+
uint32_t __b) {
12121212
return (v128_t)((__i64x2)__a << (int64_t)__b);
12131213
}
12141214

12151215
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_shr(v128_t __a,
1216-
int32_t __b) {
1216+
uint32_t __b) {
12171217
return (v128_t)((__i64x2)__a >> (int64_t)__b);
12181218
}
12191219

12201220
static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_u64x2_shr(v128_t __a,
1221-
int32_t __b) {
1221+
uint32_t __b) {
12221222
return (v128_t)((__u64x2)__a >> (int64_t)__b);
12231223
}
12241224

‎clang/test/Headers/wasm.c

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1603,7 +1603,7 @@ v128_t test_i8x16_popcnt(v128_t a) {
16031603
// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[SHL_I]] to <4 x i32>
16041604
// CHECK-NEXT: ret <4 x i32> [[TMP3]]
16051605
//
1606-
v128_t test_i8x16_shl(v128_t a, int32_t b) {
1606+
v128_t test_i8x16_shl(v128_t a, uint32_t b) {
16071607
return wasm_i8x16_shl(a, b);
16081608
}
16091609

@@ -1617,7 +1617,7 @@ v128_t test_i8x16_shl(v128_t a, int32_t b) {
16171617
// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[SHR_I]] to <4 x i32>
16181618
// CHECK-NEXT: ret <4 x i32> [[TMP3]]
16191619
//
1620-
v128_t test_i8x16_shr(v128_t a, int32_t b) {
1620+
v128_t test_i8x16_shr(v128_t a, uint32_t b) {
16211621
return wasm_i8x16_shr(a, b);
16221622
}
16231623

@@ -1631,7 +1631,7 @@ v128_t test_i8x16_shr(v128_t a, int32_t b) {
16311631
// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[SHR_I]] to <4 x i32>
16321632
// CHECK-NEXT: ret <4 x i32> [[TMP3]]
16331633
//
1634-
v128_t test_u8x16_shr(v128_t a, int32_t b) {
1634+
v128_t test_u8x16_shr(v128_t a, uint32_t b) {
16351635
return wasm_u8x16_shr(a, b);
16361636
}
16371637

@@ -1824,7 +1824,7 @@ uint32_t test_i16x8_bitmask(v128_t a) {
18241824
// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[SHL_I]] to <4 x i32>
18251825
// CHECK-NEXT: ret <4 x i32> [[TMP3]]
18261826
//
1827-
v128_t test_i16x8_shl(v128_t a, int32_t b) {
1827+
v128_t test_i16x8_shl(v128_t a, uint32_t b) {
18281828
return wasm_i16x8_shl(a, b);
18291829
}
18301830

@@ -1838,7 +1838,7 @@ v128_t test_i16x8_shl(v128_t a, int32_t b) {
18381838
// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[SHR_I]] to <4 x i32>
18391839
// CHECK-NEXT: ret <4 x i32> [[TMP3]]
18401840
//
1841-
v128_t test_i16x8_shr(v128_t a, int32_t b) {
1841+
v128_t test_i16x8_shr(v128_t a, uint32_t b) {
18421842
return wasm_i16x8_shr(a, b);
18431843
}
18441844

@@ -1852,7 +1852,7 @@ v128_t test_i16x8_shr(v128_t a, int32_t b) {
18521852
// CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i16> [[SHR_I]] to <4 x i32>
18531853
// CHECK-NEXT: ret <4 x i32> [[TMP3]]
18541854
//
1855-
v128_t test_u16x8_shr(v128_t a, int32_t b) {
1855+
v128_t test_u16x8_shr(v128_t a, uint32_t b) {
18561856
return wasm_u16x8_shr(a, b);
18571857
}
18581858

@@ -2048,7 +2048,7 @@ uint32_t test_i32x4_bitmask(v128_t a) {
20482048
// CHECK-NEXT: [[SHL_I:%.*]] = shl <4 x i32> [[A:%.*]], [[SPLAT_SPLAT_I]]
20492049
// CHECK-NEXT: ret <4 x i32> [[SHL_I]]
20502050
//
2051-
v128_t test_i32x4_shl(v128_t a, int32_t b) {
2051+
v128_t test_i32x4_shl(v128_t a, uint32_t b) {
20522052
return wasm_i32x4_shl(a, b);
20532053
}
20542054

@@ -2059,7 +2059,7 @@ v128_t test_i32x4_shl(v128_t a, int32_t b) {
20592059
// CHECK-NEXT: [[SHR_I:%.*]] = ashr <4 x i32> [[A:%.*]], [[SPLAT_SPLAT_I]]
20602060
// CHECK-NEXT: ret <4 x i32> [[SHR_I]]
20612061
//
2062-
v128_t test_i32x4_shr(v128_t a, int32_t b) {
2062+
v128_t test_i32x4_shr(v128_t a, uint32_t b) {
20632063
return wasm_i32x4_shr(a, b);
20642064
}
20652065

@@ -2070,7 +2070,7 @@ v128_t test_i32x4_shr(v128_t a, int32_t b) {
20702070
// CHECK-NEXT: [[SHR_I:%.*]] = lshr <4 x i32> [[A:%.*]], [[SPLAT_SPLAT_I]]
20712071
// CHECK-NEXT: ret <4 x i32> [[SHR_I]]
20722072
//
2073-
v128_t test_u32x4_shr(v128_t a, int32_t b) {
2073+
v128_t test_u32x4_shr(v128_t a, uint32_t b) {
20742074
return wasm_u32x4_shr(a, b);
20752075
}
20762076

@@ -2198,42 +2198,42 @@ uint32_t test_i64x2_bitmask(v128_t a) {
21982198
// CHECK-LABEL: @test_i64x2_shl(
21992199
// CHECK-NEXT: entry:
22002200
// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2201-
// CHECK-NEXT: [[CONV_I:%.*]] = sext i32 [[B:%.*]] to i64
2201+
// CHECK-NEXT: [[CONV_I:%.*]] = zext i32 [[B:%.*]] to i64
22022202
// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i32 0
22032203
// CHECK-NEXT: [[SPLAT_SPLAT_I:%.*]] = shufflevector <2 x i64> [[SPLAT_SPLATINSERT_I]], <2 x i64> poison, <2 x i32> zeroinitializer
22042204
// CHECK-NEXT: [[SHL_I:%.*]] = shl <2 x i64> [[TMP0]], [[SPLAT_SPLAT_I]]
22052205
// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SHL_I]] to <4 x i32>
22062206
// CHECK-NEXT: ret <4 x i32> [[TMP1]]
22072207
//
2208-
v128_t test_i64x2_shl(v128_t a, int32_t b) {
2208+
v128_t test_i64x2_shl(v128_t a, uint32_t b) {
22092209
return wasm_i64x2_shl(a, b);
22102210
}
22112211

22122212
// CHECK-LABEL: @test_i64x2_shr(
22132213
// CHECK-NEXT: entry:
22142214
// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2215-
// CHECK-NEXT: [[CONV_I:%.*]] = sext i32 [[B:%.*]] to i64
2215+
// CHECK-NEXT: [[CONV_I:%.*]] = zext i32 [[B:%.*]] to i64
22162216
// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i32 0
22172217
// CHECK-NEXT: [[SPLAT_SPLAT_I:%.*]] = shufflevector <2 x i64> [[SPLAT_SPLATINSERT_I]], <2 x i64> poison, <2 x i32> zeroinitializer
22182218
// CHECK-NEXT: [[SHR_I:%.*]] = ashr <2 x i64> [[TMP0]], [[SPLAT_SPLAT_I]]
22192219
// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SHR_I]] to <4 x i32>
22202220
// CHECK-NEXT: ret <4 x i32> [[TMP1]]
22212221
//
2222-
v128_t test_i64x2_shr(v128_t a, int32_t b) {
2222+
v128_t test_i64x2_shr(v128_t a, uint32_t b) {
22232223
return wasm_i64x2_shr(a, b);
22242224
}
22252225

22262226
// CHECK-LABEL: @test_u64x2_shr(
22272227
// CHECK-NEXT: entry:
22282228
// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <2 x i64>
2229-
// CHECK-NEXT: [[CONV_I:%.*]] = sext i32 [[B:%.*]] to i64
2229+
// CHECK-NEXT: [[CONV_I:%.*]] = zext i32 [[B:%.*]] to i64
22302230
// CHECK-NEXT: [[SPLAT_SPLATINSERT_I:%.*]] = insertelement <2 x i64> poison, i64 [[CONV_I]], i32 0
22312231
// CHECK-NEXT: [[SPLAT_SPLAT_I:%.*]] = shufflevector <2 x i64> [[SPLAT_SPLATINSERT_I]], <2 x i64> poison, <2 x i32> zeroinitializer
22322232
// CHECK-NEXT: [[SHR_I:%.*]] = lshr <2 x i64> [[TMP0]], [[SPLAT_SPLAT_I]]
22332233
// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SHR_I]] to <4 x i32>
22342234
// CHECK-NEXT: ret <4 x i32> [[TMP1]]
22352235
//
2236-
v128_t test_u64x2_shr(v128_t a, int32_t b) {
2236+
v128_t test_u64x2_shr(v128_t a, uint32_t b) {
22372237
return wasm_u64x2_shr(a, b);
22382238
}
22392239

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