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* wednesday blog post * test for todays date * executorch paragraph removal and addition of button + new blog post for Tuesday * change date to Friday
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‎_posts/2024-10-23-torchrec-fbgemm-1.md

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---
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layout: blog_detail
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title: "PyTorch 2.5 Release Blog"
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---
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We are excited to announce the release of PyTorch® 2.5 ([release note](https://github.com/pytorch/pytorch/releases/tag/v2.5.0))! This release features a new CuDNN backend for SDPA, enabling speedups by default for users of SDPA on H100s or newer GPUs. As well, regional compilation of torch.compile offers a way to reduce the cold start up time for torch.compile by allowing users to compile a repeated nn.Module (e.g. a transformer layer in LLM) without recompilations. Finally, TorchInductor CPP backend offers solid performance speedup with numerous enhancements like FP16 support, CPP wrapper, AOT-Inductor mode, and max-autotune mode.
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This release is composed of 4095 commits from 504 contributors since PyTorch 2.4. We want to sincerely thank our dedicated community for your contributions. As always, we encourage you to try these out and report any issues as we improve 2.5. More information about how to get started with the PyTorch 2-series can be found at our [Getting Started](https://pytorch.org/get-started/pytorch-2.0/) page.
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As well, please check out our new ecosystem projects releases with [TorchRec](https://github.com/pytorch/torchrec) and [TorchFix](https://github.com/pytorch-labs/torchfix/releases/tag/v0.6.0).
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<table class="table table-bordered">
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<tr>
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<td>Beta
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</td>
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<td>Prototype
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</td>
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</tr>
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<tr>
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<td>CuDNN backend for SDPA
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</td>
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<td>FlexAttention
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</td>
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</tr>
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<tr>
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<td>torch.compile regional compilation without recompilations
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</td>
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<td>Compiled Autograd
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</td>
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</tr>
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<tr>
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<td>TorchDynamo added support for exception handling & MutableMapping types
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</td>
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<td>Flight Recorder
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</td>
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</tr>
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<tr>
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<td>TorchInductor CPU backend optimization
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</td>
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<td>Max-autotune Support on CPU with GEMM Template
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</td>
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</tr>
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<tr>
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<td>
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</td>
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<td>TorchInductor on Windows
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</td>
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</tr>
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<tr>
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<td>
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</td>
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<td>FP16 support on CPU path for both eager mode and TorchInductor CPP backend
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</td>
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</tr>
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<tr>
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<td>
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</td>
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<td>Autoload Device Extension
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</td>
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</tr>
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<tr>
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<td>
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</td>
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<td>Enhanced Intel GPU support
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</td>
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</tr>
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</table>
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*To see a full list of public feature submissions click [here](https://docs.google.com/spreadsheets/d/1TzGkWuUMF1yTe88adz1dt2mzbIsZLd3PBasy588VWgk/edit?usp=sharing).
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## BETA FEATURES
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### [Beta] CuDNN backend for SDPA
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The cuDNN "Fused Flash Attention" backend was landed for *torch.nn.functional.scaled_dot_product_attention*. On NVIDIA H100 GPUs this can provide up to 75% speed-up over FlashAttentionV2. This speedup is enabled by default for all users of SDPA on H100 or newer GPUs.
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### [Beta] *torch.compile* regional compilation without recompilations
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Regional compilation without recompilations, via *torch._dynamo.config.inline_inbuilt_nn_modules* which default to True in 2.5+. This option allows users to compile a repeated *nn.Module* (e.g. a transformer layer in LLM) without recompilations. Compared to compiling the full model, this option can result in smaller compilation latencies with 1%-5% performance degradation compared to full model compilation.
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See the [tutorial](https://pytorch.org/tutorials/recipes/regional_compilation.html) for more information.
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### [Beta] TorchInductor CPU backend optimization
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This feature advances Inductor’s CPU backend optimization, including CPP backend code generation and FX fusions with customized CPU kernels. The Inductor CPU backend supports vectorization of common data types and all Inductor IR operations, along with the static and symbolic shapes. It is compatible with both Linux and Windows OS and supports the default Python wrapper, the CPP wrapper, and AOT-Inductor mode.
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Additionally, it extends the max-autotune mode of the GEMM template (prototyped in 2.5), offering further performance gains. The backend supports various FX fusions, lowering to customized kernels such as oneDNN for Linear/Conv operations and SDPA. The Inductor CPU backend consistently achieves performance speedups across three benchmark suites—TorchBench, Hugging Face, and timms—outperforming eager mode in 97.5% of the 193 models tested.
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## PROTOTYPE FEATURES
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### [Prototype] FlexAttention
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We've introduced a flexible API that enables implementing various attention mechanisms such as Sliding Window, Causal Mask, and PrefixLM with just a few lines of idiomatic PyTorch code. This API leverages torch.compile to generate a fused FlashAttention kernel, which eliminates extra memory allocation and achieves performance comparable to handwritten implementations. Additionally, we automatically generate the backwards pass using PyTorch's autograd machinery. Furthermore, our API can take advantage of sparsity in the attention mask, resulting in significant improvements over standard attention implementations.
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For more information and examples, please refer to the [official blog post](https://pytorch.org/blog/flexattention/) and [Attention Gym](https://github.com/pytorch-labs/attention-gym).
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### [Prototype] Compiled Autograd
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Compiled Autograd is an extension to the PT2 stack allowing the capture of the entire backward pass. Unlike the backward graph traced by AOT dispatcher, Compiled Autograd tracing is deferred until backward execution time, which makes it impervious to forward pass graph breaks, and allows it to record backward hooks into the graph.
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Please refer to the [tutorial](https://pytorch.org/tutorials/intermediate/compiled_autograd_tutorial.html) for more information.
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### [Prototype] Flight Recorder
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Flight recorder is a new debugging tool that helps debug stuck jobs. The tool works by continuously capturing information about collectives as they run. Upon detecting a stuck job, the information can be used to quickly identify misbehaving ranks/machines along with code stack traces.
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For more information please refer to the following [tutorial](https://pytorch.org/tutorials/prototype/flight_recorder_tutorial.html).
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### [Prototype] Max-autotune Support on CPU with GEMM Template
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Max-autotune mode for the Inductor CPU backend in torch.compile profiles multiple implementations of operations at compile time and selects the best-performing one. This is particularly beneficial for GEMM-related operations, using a C++ template-based GEMM implementation as an alternative to the ATen-based approach with oneDNN and MKL libraries. We support FP32, BF16, FP16, and INT8 with epilogue fusions for x86 CPUs. We’ve seen up to 7% geomean speedup on the dynamo benchmark suites and up to 20% boost in next-token latency for LLM inference.
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For more information please refer to the [tutorial](https://pytorch.org/tutorials/prototype/max_autotune_on_CPU_tutorial.html).
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### [Prototype] TorchInductor CPU on Windows
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Inductor CPU backend in torch.compile now works on Windows. We support MSVC (cl), clang (clang-cl) and Intel compiler (icx-cl) for Windows inductor currently.
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See the [tutorial](https://pytorch.org/tutorials/prototype/inductor_windows_cpu.html) for more details.
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### [Prototype] FP16 support on CPU path for both eager mode and TorchInductor CPP backend
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Float16 is a commonly used reduced floating point type for performance improvement in neural network inference/training. Since this release, float16 for both eager and TorchInductor is supported on the CPU path.
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### [Prototype] Autoload Device Extension
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PyTorch now supports autoloading for out-of-tree device extensions, streamlining integration by eliminating the need for manual imports. This feature, enabled through the torch.backends entrypoint, simplifies usage by ensuring seamless extension loading, while allowing users to disable it via an environment variable if needed.
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See the [tutorial](https://pytorch.org/tutorials/prototype/python_extension_autoload.html) for more information.
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### [Prototype] Enhanced Intel GPU support
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Intel GPUs support enhancement is now available for both Intel® Data Center GPU Max Series and Intel® Client GPUs (Intel® Core™ Ultra processors with built-in Intel® Arc™ graphics and Intel® Arc™ Graphics for dGPU parts), which is to make it easier to accelerate your Machine Learning workflows on Intel GPUs in PyTorch 2.5 release. We also enabled the initial support of PyTorch on Windows for Intel® Client GPUs in this release.
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* Expanded PyTorch hardware backend support matrix to include both Intel Data Center and Client GPUs.  
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* The implementation of SYCL* kernels to enhance coverage and execution of Aten operators on Intel GPUs to boost performance in PyTorch eager mode.
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* Enhanced Intel GPU backend of torch.compile to improve inference and training performance for a wide range of deep learning workloads.
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These features are available through PyTorch preview and nightly binary PIP wheels. For more information regarding Intel GPU support, please refer to [documentation](https://pytorch.org/docs/main/notes/get_start_xpu.html).

‎_posts/2024-10-25-intel-gpu-support-pytorch-2-5.md

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title: "Intel GPU Support Now Available in PyTorch 2.5"
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author: By PyTorch Team at Intel
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---
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Support for Intel GPUs is now available in PyTorch® 2.5, providing improved functionality and performance for Intel GPUs which including [Intel® Arc™ discrete graphics](https://www.intel.com/content/www/us/en/products/details/discrete-gpus/arc.html), [Intel® Core™ Ultra processors](https://www.intel.com/content/www/us/en/products/details/processors/core-ultra.html) with built-in Intel® Arc™ graphics and [Intel® Data Center GPU Max Series](https://www.intel.com/content/www/us/en/products/details/discrete-gpus/data-center-gpu/max-series.html). This integration brings Intel GPUs and the SYCL\* software stack into the official PyTorch stack, ensuring a consistent user experience and enabling more extensive AI application scenarios, particularly in the AI PC domain.
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Developers and customers building for and using Intel GPUs will have a better user experience by directly obtaining continuous software support from native PyTorch, unified software distribution, and consistent product release time.
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Furthermore, Intel GPU support provides more choices to users. Now PyTorch provides a consistent GPU programming paradigm on both front ends and back ends. Developers can now run and deploy workloads on Intel GPUs with minimal coding efforts.
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## **Overview of Intel GPU support**
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Intel GPU support in PyTorch provides eager mode and graph mode support in the PyTorch built-in front end. Eager mode now has an implementation of commonly used Aten operators with the SYCL programming language. Graph mode (torch.compile) now has an enabled Intel GPU back end to implement the optimization for Intel GPUs and to integrate Triton. 
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Essential components of Intel GPU support were added to PyTorch, including runtime, Aten operators, oneDNN, TorchInductor, Triton and Intel GPU tool chains integration. Meanwhile, quantization and distributed are being actively developed in preparation for the PyTorch 2.6 release.
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## **Features**
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In addition to providing key features for Intel® Client GPUs and Intel® Data Center GPU Max Series for inference and training, PyTorch keeps the same user experience as other hardware the PyTorch supports. If you migrate code from CUDA\*, you can run the existing application code on an Intel GPU with minimal code changes for the device name (from cuda to xpu). For example:
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*\# CUDA Code*
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**tensor** **\=** **torch.tensor(\[**1.0**,** 2.0**\]).to(**"cuda"**)**
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*\# Code for Intel GPU*
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**tensor** **\=** **torch.tensor(\[**1.0**,** 2.0**\]).to(**"xpu"**)**
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PyTorch 2.5 features with an Intel GPU include: 
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* Inference and training workflows.
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* Enhance both torch.compile and eager mode functionalities (more Ops), together with performance improvement, and fully run three Dynamo Hugging Face\*, TIMM\* and TorchBench\* benchmarks for eager and compile modes. 
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* Data types such as FP32, BF16, FP16, and automatic mixed precision (AMP).
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* Runs on Intel® Client GPUs and Intel® Data Center GPU Max Series.
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* Supports Linux (Ubuntu, SUSE Linux and Red Hat Linux) and Windows 10/11.
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## **Get Started**
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Get a tour of the environment setup, PIP wheels installation, and examples on Intel® Client GPUs and Intel® Data Center GPU Max Series from [Getting Started Guide](https://pytorch.org/docs/main/notes/get_start_xpu.html). Support for Intel GPUs can be experienced through PyTorch PIP wheels installation by nightly and preview binary releases.
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* Try Intel® Client GPUs through Intel® Arc™ Graphics family (Codename DG2), Intel® Core™ Ultra processor family with Intel® Graphics (Codename Meteor Lake), and Intel® Core™ Ultra mobile processor family with Intel® Graphics (Codename Lunar Lake).
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* Try Intel Data Center GPU Max Series through [Intel® Tiber™ AI Cloud](https://cloud.intel.com/).
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1. To learn how to create a free Standard account, see [Get Started](https://console.cloud.intel.com/docs/guides/get_started.html). Then do the following:
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* Sign in to the [cloud console](https://console.cloud.intel.com/docs/guides/get_started.html).
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* From the [Training](https://console.cloud.intel.com/training)** **section, open the  [PyTorch on Intel® GPUs](https://console.cloud.intel.com/training/detail/7db2a900-e47d-4b70-8968-cefa08432c1d)  notebook and click “Launch Jupyter Notebook.”
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* Ensure that the **PyTorch 2.5** kernel is selected for the notebook.
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## **Performance**
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The performance of Intel GPU on PyTorch was continuously optimized to achieve decent result on three Dynamo Hugging Face, TIMM and TorchBench benchmarks for eager and compile modes.
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The latest performance data measured on top of PyTorch Dynamo Benchmarking Suite using Intel® Data Center GPU Max Series 1100 single card showcase the FP16/BF16 significant speedup ratio over FP32 on eager mode in Figure 1, and Torch.compile mode speedup ratio over eager mode in Figure 2\. Both inference and training reached the similar significant improvements.
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![Figure 2: FP16/BF16 Performance Gains Over FP32 Eager](/assets/images/performance-gains-over-fp32-eager.png){:style="width:100%"}
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Figure 2: FP16/BF16 Performance Gains Over FP32 Eager
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![Figure 3: Torch.compile Performance Gains Over Eager Mode](/assets/images/performance-gains-over-fp32-eager-2.png){:style="width:100%"}
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Figure 3: Torch.compile Performance Gains Over Eager Mode
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## **Summary**
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Intel GPU on PyTorch 2.5 brings Intel® Client GPUs (Intel® Core™ Ultra processors with built-in Intel® Arc™ graphics and Intel® Arc™ Graphics for dGPU parts) and Intel® Data Center GPU Max Series into the PyTorch ecosystem for AI workload acceleration. Especially, Client GPUs is added to the GPU-supported list for AI PC use scenarios on Windows and Linux environment.
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We warmly welcome the community to evaluate and provide feedback on these enhancements to  [Intel GPU support on PyTorch](https://github.com/pytorch/pytorch?tab=readme-ov-file#intel-gpu-support). 
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## **Resources**
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* [PyTorch Docs: Getting Started on Intel GPU](https://pytorch.org/docs/main/notes/get_start_xpu.html)
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* [Intel® Tiber™ AI Cloud](https://cloud.intel.com/)
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## **Acknowledgments**
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We want thank PyTorch open source community for their technical discussions and insights: [Andrey Talman](https://github.com/atalman), [Alban Desmaison](https://github.com/alband), [Nikita Shulga](https://github.com/malfet), [Eli Uriegas](https://github.com/seemethere), [Jason Ansel](https://github.com/jansel), and [Bin Bao](https://github.com/desertfire).
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We also thank collaborators from PyTorch for their professional support and guidance.
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## **Performance Configuration**
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The configurations in the table are collected with [svr-info](https://github.com/intel/svr-info). Test by Intel on September 12, 2024\.
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## Table 1
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| Component | Details |
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| :---- | :---- |
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| **Name** | Intel® Max Series GPU 1100 in Intel® Tiber™ Developer Cloud |
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| **Time** | Thu Sep 12 08:21:27 UTC 2024 |
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| **System** | Supermicro SYS-521GE-TNRT |
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| **Baseboard** | Supermicro X13DEG-OA |
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| **Chassis** | Supermicro Other |
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| **CPU Model** | Intel(R) Xeon(R) Platinum 8468V |
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| **Microarchitecture** | SPR\_XCC |
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| **Sockets** | 2 |
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| **Cores per Socket** | 48 |
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| **Hyperthreading** | Enabled |
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| **CPUs** | 192 |
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| **Intel Turbo Boost** | Enabled |
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| **Base Frequency** | 2.4GHz |
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| **All-core Maximum Frequency** | 2.4GHz |
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| **Maximum Frequency** | 2.9GHz |
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| **NUMA Nodes** | 2 |
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| **Prefetchers** | L2 HW: Enabled, L2 Adj.: Enabled, DCU HW: Enabled, DCU IP: Enabled, AMP: Disabled, Homeless: Disabled, LLC: Disabled |
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| **PPINs** | 5e3f862ef7ba9d50, 6c85812edfcc84b1 |
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| **Accelerators** | DLB 2, DSA 2, IAA 2, QAT (on CPU) 2, QAT (on chipset) 0 |
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| **Installed Memory** | 1024GB (16x64GB DDR5 4800 MT/s \[4800 MT/s\]) |
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| **Hugepagesize** | 2048 kB |
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| **Transparent Huge Pages** | madvise |
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| **Automatic NUMA Balancing** | Enabled |
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| **NIC** | 2 x Ethernet Controller X710 for 10GBASE-T, 4 x MT2892 Family \[ConnectX-6 Dx\] |
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| **Disk** | 1 x 894.3G Micron\_7450\_MTFDKBG960TFR |
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| **BIOS** | 1.4a |
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| **Microcode** | 0x2b0004b1 |
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| **OS** | Ubuntu 22.04.2 LTS |
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| **Kernel** | 5.15.0-73-generic |
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| **TDP** | 330W |
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| **Power & Perf Policy** | Normal (6) |
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| **Frequency Governor** | performance |
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| **Frequency Driver** | acpi-cpufreq |
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| **Max C-State** | 9 |
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## Table 2
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| Component | Details |
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| :---- | :---- |
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| **Single Card** | Intel® Max Series GPU 1100 series on 4th Gen Intel® Xeon® processors of Intel Tiber Developer Cloud |
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| **Workload & version** | Timm ac34701, TorchBench 03cde49, Torchvision d23a6e1, Torchaudio b3f6f51, Transformers 243e186 |
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| **Software Stack** | intel-for-pytorch-gpu-dev 0.5.3, intel-pti-dev 0.9.0, Intel xpu backend for Triton cc981fe |
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| **Framework** | Pytorch 4a3dabd67f8ce63f2fc45f278421cca3cc532cfe |
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| **GPU driver** | agama-ci-devel-803.61 |
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| **GFX FW Version** | PVC2\_1.23374 |
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**Notices & Disclaimers**
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Performance varies by use, configuration and other factors. Learn more on the Performance Index site. Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available updates.  See backup for configuration details.  No product or component can be absolutely secure. Your costs and results may vary. Intel technologies may require enabled hardware, software or service activation.
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Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.
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**AI disclaimer:**
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AI features may require software purchase, subscription or enablement by a software or platform provider, or may have specific configuration or compatibility requirements. Details at  [www.intel.com/AIPC](http://www.intel.com/AIPC). Results may vary.

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