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JIT/AArch64: Use 'shifted register' if available (#7108)
One shift instruction can be saved if 'shifted register' is used. It's worth noting that the destination register of previous shift instruction doesn't hold the shift result any longer now. And we have to guarantee that 'shifted register' mode is applied to all the use sites of this destination register. Besides, several code-style issues are fixed. Change-Id: I8bcdd092253d342d383732a926512e761e453808
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ext/opcache/jit/zend_jit_arm64.dasc

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1894,7 +1894,7 @@ static int zend_jit_icall_throw_stub(dasm_State **Dst)
18941894
| ldr IP, EX->opline
18951895
| // if (EX(opline)->opcode != ZEND_HANDLE_EXCEPTION) {
18961896
| ldrb TMP1w, OP:IP->opcode
1897-
| cmp TMP1w,# ZEND_HANDLE_EXCEPTION
1897+
| cmp TMP1w, #ZEND_HANDLE_EXCEPTION
18981898
| beq >1
18991899
| // EG(opline_before_exception) = opline;
19001900
| MEM_STORE_64_ZTS str, IP, executor_globals, opline_before_exception, TMP2
@@ -2227,8 +2227,7 @@ static int zend_jit_hybrid_hot_counter_stub(dasm_State **Dst, uint32_t cost)
22272227
| sub REG2, REG2, TMP1
22282228
| // divide by sizeof(zend_op)
22292229
|| ZEND_ASSERT(sizeof(zend_op) == 32);
2230-
| asr REG2, REG2, #2
2231-
| add TMP1, REG1, REG2
2230+
| add TMP1, REG1, REG2, asr #2
22322231
| ldr TMP1, [TMP1, #offsetof(zend_jit_op_array_hot_extension, orig_handlers)]
22332232
| br TMP1
22342233
return 1;
@@ -2696,7 +2695,7 @@ static int zend_jit_unwind_cb(_Unwind_Context *ctx, void *a)
26962695
if (arg->cnt == 3) {
26972696
return 5; // _URC_END_OF_STACK
26982697
}
2699-
return 0; // _URC_NO_REASON;
2698+
return 0; // _URC_NO_REASON;
27002699
}
27012700

27022701
static void ZEND_FASTCALL zend_jit_touch_vm_stack_data(void *vm_stack_data)
@@ -3975,8 +3974,6 @@ static int zend_jit_math_long_long(dasm_State **Dst,
39753974
/* Use 'smulh' to get the upper 64 bits fo the 128-bit result.
39763975
* For signed multiplication, the top 65 bits of the result will contain
39773976
* either all zeros or all ones if no overflow occurred.
3978-
* Note that 'cmp, TMP1, Rx(result_reg), asr, #63' is not supported by DynASM/arm64
3979-
* currently, and we put 'asr' and 'cmp' separately.
39803977
* Flag: bne -> overflow. beq -> no overflow.
39813978
*/
39823979
use_ovf_flag = 0;
@@ -10024,9 +10021,8 @@ static int zend_jit_defined(dasm_State **Dst, const zend_op *opline, zend_uchar
1002410021
|.cold_code
1002510022
|4:
1002610023
| MEM_LOAD_64_ZTS ldr, FCARG1x, executor_globals, zend_constants, FCARG1x
10027-
| lsr REG0, REG0, #1
1002810024
| ldr TMP1w, [FCARG1x, #offsetof(HashTable, nNumOfElements)]
10029-
| cmp TMP1, REG0
10025+
| cmp TMP1, REG0, lsr #1
1003010026

1003110027
if (smart_branch_opcode) {
1003210028
if (exit_addr) {

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