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Fix bug #79358: JIT miscompile in composer
1 parent c6d941d commit 191451d

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3 files changed

+25
-3
lines changed

3 files changed

+25
-3
lines changed

ext/opcache/jit/zend_jit.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2474,7 +2474,8 @@ static int zend_jit(const zend_op_array *op_array, zend_ssa *ssa, const zend_op
24742474
case ZEND_IS_NOT_EQUAL:
24752475
case ZEND_IS_SMALLER:
24762476
case ZEND_IS_SMALLER_OR_EQUAL:
2477-
case ZEND_CASE:
2477+
case ZEND_CASE: {
2478+
res_addr = RES_REG_ADDR();
24782479
if ((opline->result_type & IS_TMP_VAR)
24792480
&& (i + 1) <= end
24802481
&& ((opline+1)->opcode == ZEND_JMPZ
@@ -2488,19 +2489,25 @@ static int zend_jit(const zend_op_array *op_array, zend_ssa *ssa, const zend_op
24882489
smart_branch_opcode = (opline+1)->opcode;
24892490
target_label = ssa->cfg.blocks[b].successors[0];
24902491
target_label2 = ssa->cfg.blocks[b].successors[1];
2492+
/* For EX variant write into the result of EX opcode. */
2493+
if ((opline+1)->opcode == ZEND_JMPZ_EX
2494+
|| (opline+1)->opcode == ZEND_JMPNZ_EX) {
2495+
res_addr = OP_REG_ADDR(opline + 1, result_type, result, result_def);
2496+
}
24912497
} else {
24922498
smart_branch_opcode = 0;
24932499
target_label = target_label2 = (uint32_t)-1;
24942500
}
24952501
if (!zend_jit_cmp(&dasm_state, opline, op_array,
24962502
OP1_INFO(), OP1_REG_ADDR(),
24972503
OP2_INFO(), OP2_REG_ADDR(),
2498-
RES_REG_ADDR(),
2504+
res_addr,
24992505
zend_may_throw(opline, op_array, ssa),
25002506
smart_branch_opcode, target_label, target_label2)) {
25012507
goto jit_failure;
25022508
}
25032509
goto done;
2510+
}
25042511
case ZEND_IS_IDENTICAL:
25052512
case ZEND_IS_NOT_IDENTICAL:
25062513
if ((opline->result_type & IS_TMP_VAR)

ext/opcache/jit/zend_jit_x86.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -270,7 +270,7 @@ static zend_always_inline zend_jit_addr _zend_jit_decode_op(zend_uchar op_type,
270270
#define OP2_ADDR() \
271271
OP_ADDR(opline, op2_type, op2)
272272
#define RES_ADDR() \
273-
OP_ADDR(opline, op2_type, op2)
273+
OP_ADDR(opline, result_type, result)
274274
#define OP1_DATA_ADDR() \
275275
OP_ADDR(opline + 1, op1_type, op1)
276276

ext/opcache/tests/jit/bug79358.phpt

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
1+
--TEST--
2+
Bug #79358: JIT miscompile in composer
3+
--FILE--
4+
<?php
5+
6+
function test(int $x) {
7+
return ($x > 0xdead && unimportant()) ||
8+
($x < 0xbeef && unimportant());
9+
}
10+
11+
var_dump(test(0xcccc));
12+
13+
?>
14+
--EXPECT--
15+
bool(false)

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