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Issues list

AMDGPU: Directly check if shrink-instructions run is post-RA backend:AMDGPU
#142009 opened May 29, 2025 by arsenm Loading…
3
[InstCombine] Fold shuffles through all trivially vectorizable intrinsics backend:AMDGPU llvm:instcombine llvm:transforms
#141979 opened May 29, 2025 by lukel97 Loading…
1
Add Offoading to llvm-readobj and llvm-objcopy backend:AMDGPU llvm:binary-utilities
#141978 opened May 29, 2025 by david-salinas Loading…
12
[GlobalISel] support lowering of G_SHUFFLEVECTOR with pointer args backend:AMDGPU llvm:globalisel
#141959 opened May 29, 2025 by stanleygambarin Loading…
12
AMDGPU: Report special input intrinsics as free backend:AMDGPU llvm:analysis
#141948 opened May 29, 2025 by arsenm Loading…
6
AMDGPU: Add baseline cost model tests for special argument intrinsics backend:AMDGPU llvm:analysis
#141947 opened May 29, 2025 by arsenm Loading…
2
AMDGPU: Cost model for minimumnum/maximumnum backend:AMDGPU llvm:analysis llvm:transforms
#141946 opened May 29, 2025 by arsenm Loading…
2
AMDGPU: Move fpenvIEEEMode into TTI backend:AMDGPU llvm:analysis
#141945 opened May 29, 2025 by arsenm Loading…
3
AMDGPU: Reduce cost of f64 copysign backend:AMDGPU llvm:analysis
#141944 opened May 29, 2025 by arsenm Loading…
2
AMDGPU: Fix cost model for 16-bit operations on gfx8 backend:AMDGPU llvm:analysis llvm:transforms
#141943 opened May 29, 2025 by arsenm Loading…
3
[MISched] Add templates for creating custom schedulers backend:AArch64 backend:AMDGPU backend:ARM backend:PowerPC backend:RISC-V backend:SystemZ backend:X86 llvm:codegen
#141935 opened May 29, 2025 by wangpc-pp Loading…
8
AMDGPU should not scalarize v2f16 / v2bf16 copysign backend:AMDGPU missed-optimization
#141931 opened May 29, 2025 by arsenm
1
AMDGPU: Add cost model tests for minimumnum/maximumnum backend:AMDGPU llvm:analysis
#141904 opened May 29, 2025 by arsenm Loading…
2
AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 backend:AMDGPU
#141903 opened May 29, 2025 by arsenm Loading…
2
AMDGPU: Custom lower fptrunc vectors for f32 -> f16 backend:AMDGPU
#141883 opened May 29, 2025 by changpeng Loading…
21
[AMDGPU][True16][MC][CodeGen] true16 mode for v_cvt_pk_bf8/fp8_f32 backend:AMDGPU mc Machine (object) code
#141881 opened May 29, 2025 by broxigarchen Loading…
10
AMDGPU: Try constant fold after folding immediate backend:AMDGPU
#141862 opened May 28, 2025 by arsenm Loading…
2
AMDGPU: Add test showing bit operations that should be reducible backend:AMDGPU
#141837 opened May 28, 2025 by arsenm Loading…
2
[AMDGPU][GlobalISel] Fix G_UNMERGE_VALUES combine backend:AMDGPU llvm:globalisel
#141812 opened May 28, 2025 by mshelego Loading…
1
2
[llvm] annotate interfaces in AsmParser, BinaryFormat, Bitcode, and Bitstream libraries for DLL export backend:AMDGPU backend:DirectX backend:PowerPC backend:WebAssembly debuginfo llvm:binary-utilities
#141794 opened May 28, 2025 by andrurogerz Loading…
3
[NFC][AMDGPU] Add D16 test for multiple fptrunc image sample backend:AMDGPU llvm:instcombine llvm:transforms
#141771 opened May 28, 2025 by harrisonGPU Loading…
5
[AMDGPU] Support D16 folding for image.sample with multiple extractelement and fptrunc users backend:AMDGPU llvm:instcombine llvm:transforms
#141758 opened May 28, 2025 by harrisonGPU Loading…
20
[AMDGPU][SDAG] Initial support for ISD::PTRADD backend:AMDGPU llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well
#141725 opened May 28, 2025 by ritter-x2a Loading…
12
[CostModel] Add a DstTy to getShuffleCost backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:PowerPC backend:RISC-V backend:SystemZ backend:X86 llvm:analysis llvm:transforms vectorizers
#141634 opened May 27, 2025 by davemgreen Loading…
5
[AMDGPU] InstCombine moving freeze instructions breaks FMA formation backend:AMDGPU code-quality llvm:instcombine
#141622 opened May 27, 2025 by jayfoad
1
1
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