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AMDGPU: Add baseline tests for #139317 (#140607)
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‎llvm/test/CodeGen/AMDGPU/fold-imm-copy-agpr.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s
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---
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name: v_mov_b64_pseudo_imm_0_copy_to_areg_64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_copy_to_areg_64
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; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
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; GCN-NEXT: [[COPY:%[0-9]+]]:areg_64_align2 = COPY [[V_MOV_B]]
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; GCN-NEXT: $agpr0_agpr1 = COPY [[COPY]]
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; GCN-NEXT: S_ENDPGM 0
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%0:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
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%1:areg_64_align2 = COPY %0
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$agpr0_agpr1 = COPY %1
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S_ENDPGM 0
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...
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---
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name: v_mov_b64_pseudo_imm_neg1_copy_to_areg_64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: v_mov_b64_pseudo_imm_neg1_copy_to_areg_64
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; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO -1, implicit $exec
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; GCN-NEXT: [[COPY:%[0-9]+]]:areg_64_align2 = COPY [[V_MOV_B]]
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; GCN-NEXT: $agpr0_agpr1 = COPY [[COPY]]
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; GCN-NEXT: S_ENDPGM 0
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%0:vreg_64_align2 = V_MOV_B64_PSEUDO -1, implicit $exec
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%1:areg_64_align2 = COPY %0
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$agpr0_agpr1 = COPY %1
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S_ENDPGM 0
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...
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---
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name: v_mov_b64_pseudo_literal_copy_to_areg_64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: v_mov_b64_pseudo_literal_copy_to_areg_64
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; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 999, implicit $exec
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; GCN-NEXT: [[COPY:%[0-9]+]]:areg_64_align2 = COPY [[V_MOV_B]]
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; GCN-NEXT: $agpr0_agpr1 = COPY [[COPY]]
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; GCN-NEXT: S_ENDPGM 0
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%0:vreg_64_align2 = V_MOV_B64_PSEUDO 999, implicit $exec
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%1:areg_64_align2 = COPY %0
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$agpr0_agpr1 = COPY %1
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S_ENDPGM 0
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...
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---
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name: v_mov_b64_pseudo_imm_0_copy_sub0_to_agpr_32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_copy_sub0_to_agpr_32
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; GCN: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec
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; GCN-NEXT: $agpr0 = COPY [[V_ACCVGPR_WRITE_B32_e64_]]
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; GCN-NEXT: S_ENDPGM 0
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%0:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
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%1:agpr_32 = COPY %0.sub0
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$agpr0 = COPY %1
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S_ENDPGM 0
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...
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---
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name: v_mov_b64_pseudo_imm_0_copy_sub1_to_agpr_32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_copy_sub1_to_agpr_32
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; GCN: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec
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; GCN-NEXT: $agpr0 = COPY [[V_ACCVGPR_WRITE_B32_e64_]]
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; GCN-NEXT: S_ENDPGM 0
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%0:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
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%1:agpr_32 = COPY %0.sub1
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$agpr0 = COPY %1
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S_ENDPGM 0
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...
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---
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name: v_mov_b64_pseudo_lit_copy_sub0_to_agpr_32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: v_mov_b64_pseudo_lit_copy_sub0_to_agpr_32
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; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
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; GCN-NEXT: [[COPY:%[0-9]+]]:agpr_32 = COPY [[V_MOV_B]].sub0
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; GCN-NEXT: $agpr0 = COPY [[COPY]]
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; GCN-NEXT: S_ENDPGM 0
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%0:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
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%1:agpr_32 = COPY %0.sub0
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$agpr0 = COPY %1
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S_ENDPGM 0
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...
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---
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name: v_mov_b64_pseudo_lit_copy_sub1_to_agpr_32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: v_mov_b64_pseudo_lit_copy_sub1_to_agpr_32
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; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
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; GCN-NEXT: [[COPY:%[0-9]+]]:agpr_32 = COPY [[V_MOV_B]].sub1
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; GCN-NEXT: $agpr0 = COPY [[COPY]]
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; GCN-NEXT: S_ENDPGM 0
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%0:vreg_64_align2 = V_MOV_B64_PSEUDO 4290672329592, implicit $exec
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%1:agpr_32 = COPY %0.sub1
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$agpr0 = COPY %1
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S_ENDPGM 0
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...
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---
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name: v_mov_b64_pseudo_imm_0_copy_to_av_64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: v_mov_b64_pseudo_imm_0_copy_to_av_64
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; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
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; GCN-NEXT: [[COPY:%[0-9]+]]:av_64_align2 = COPY [[V_MOV_B]]
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; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
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%0:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
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%1:av_64_align2 = COPY %0
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S_ENDPGM 0, implicit %1
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...

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