@@ -327,7 +327,7 @@ class AMDGPUCodeGenPrepareImpl
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bool visitIntrinsicInst (IntrinsicInst &I);
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bool visitBitreverseIntrinsicInst (IntrinsicInst &I);
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- bool visitMinNum (IntrinsicInst &I);
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+ bool visitFMinLike (IntrinsicInst &I);
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bool visitSqrt (IntrinsicInst &I);
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bool run ();
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};
@@ -2200,7 +2200,9 @@ bool AMDGPUCodeGenPrepareImpl::visitIntrinsicInst(IntrinsicInst &I) {
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case Intrinsic::bitreverse:
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return visitBitreverseIntrinsicInst (I);
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case Intrinsic::minnum:
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- return visitMinNum (I);
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+ case Intrinsic::minimumnum:
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+ case Intrinsic::minimum:
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+ return visitFMinLike (I);
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case Intrinsic::sqrt :
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return visitSqrt (I);
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default :
@@ -2219,15 +2221,22 @@ bool AMDGPUCodeGenPrepareImpl::visitBitreverseIntrinsicInst(IntrinsicInst &I) {
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}
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// / Match non-nan fract pattern.
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- // / minnum(fsub(x, floor(x)), nextafter(1.0, -1.0)
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+ // / minnum(fsub(x, floor(x)), nextafter(1.0, -1.0))
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+ // / minimumnum(fsub(x, floor(x)), nextafter(1.0, -1.0))
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+ // / minimum(fsub(x, floor(x)), nextafter(1.0, -1.0))
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// /
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// / If fract is a useful instruction for the subtarget. Does not account for the
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// / nan handling; the instruction has a nan check on the input value.
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Value *AMDGPUCodeGenPrepareImpl::matchFractPat (IntrinsicInst &I) {
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if (ST.hasFractBug ())
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return nullptr ;
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- if (I.getIntrinsicID () != Intrinsic::minnum)
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+ Intrinsic::ID IID = I.getIntrinsicID ();
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+
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+ // The value is only used in contexts where we know the input isn't a nan, so
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+ // any of the fmin variants are fine.
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+ if (IID != Intrinsic::minnum &&
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+ IID != Intrinsic::minimumnum & IID != Intrinsic::minimum)
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return nullptr ;
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Type *Ty = I.getType ();
@@ -2273,7 +2282,7 @@ Value *AMDGPUCodeGenPrepareImpl::applyFractPat(IRBuilder<> &Builder,
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return insertValues (Builder, FractArg->getType (), ResultVals);
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}
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- bool AMDGPUCodeGenPrepareImpl::visitMinNum (IntrinsicInst &I) {
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+ bool AMDGPUCodeGenPrepareImpl::visitFMinLike (IntrinsicInst &I) {
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Value *FractArg = matchFractPat (I);
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if (!FractArg)
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return false ;
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