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[RISCV] Canonicalize beq/bne with x0 as first arg to beqz/bnez (#141781)
This covers similar ground as #139086. Although I think it makes sense to land both, the practical motivation for #139086 is significantly reduced here. This canonicalisation makes no difference to compressibility (we have compress patterns for the operands in either order), but it does mean that easier to read assembly is printed, as we don't have aliases defined for beq/bne with x0 in either position.
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llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

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@@ -4189,6 +4189,15 @@ bool RISCVInstrInfo::simplifyInstruction(MachineInstr &MI) const {
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return true;
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}
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break;
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case RISCV::BEQ:
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case RISCV::BNE:
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// b{eq,ne} zero, rs, imm => b{eq,ne} rs, zero, imm
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if (MI.getOperand(0).getReg() == RISCV::X0) {
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MachineOperand MO0 = MI.getOperand(0);
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MI.removeOperand(0);
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MI.insert(MI.operands_begin() + 1, {MO0});
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}
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break;
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case RISCV::BLTU:
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// bltu zero, rs, imm => bne rs, zero, imm
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if (MI.getOperand(0).getReg() == RISCV::X0) {

llvm/test/CodeGen/RISCV/machine-copyprop-simplifyinstruction.mir

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@@ -743,6 +743,42 @@ body: |
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PseudoRET implicit $x10
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...
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---
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name: beq
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body: |
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; CHECK-LABEL: name: beq
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $x11 = COPY $x12
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; CHECK-NEXT: BEQ $x12, $x0, %bb.1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: PseudoRET
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bb.0:
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renamable $x11 = COPY $x12
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BEQ $x0, renamable $x11, %bb.1
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bb.1:
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PseudoRET
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...
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---
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name: bne
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body: |
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; CHECK-LABEL: name: bne
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $x11 = COPY $x12
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; CHECK-NEXT: BNE $x12, $x0, %bb.1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: PseudoRET
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bb.0:
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renamable $x11 = COPY $x12
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BNE $x0, renamable $x11, %bb.1
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bb.1:
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PseudoRET
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...
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---
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name: bltu
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body: |
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; CHECK-LABEL: name: bltu

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