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VyacheslavLevytskyyVyacheslavLevytskyy
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[SPIR-V]: add SPIR-V extension: SPV_INTEL_variable_length_array (#83002)
This PR adds SPIR-V extension SPV_INTEL_variable_length_array that allows to allocate local arrays whose number of elements is unknown at compile time: * add a new SPIR-V internal intrinsic:int_spv_alloca_array * legalize G_STACKSAVE and G_STACKRESTORE * implement allocation of arrays (previously getArraySize() of AllocaInst was not used) * add tests
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‎llvm/include/llvm/IR/IntrinsicsSPIRV.td

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ let TargetPrefix = "spv" in {
3333
def int_spv_cmpxchg : Intrinsic<[llvm_i32_ty], [llvm_any_ty, llvm_vararg_ty]>;
3434
def int_spv_unreachable : Intrinsic<[], []>;
3535
def int_spv_alloca : Intrinsic<[llvm_any_ty], []>;
36+
def int_spv_alloca_array : Intrinsic<[llvm_any_ty], [llvm_anyint_ty]>;
3637
def int_spv_undef : Intrinsic<[llvm_i32_ty], []>;
3738

3839
// Expect, Assume Intrinsics

‎llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -500,9 +500,25 @@ Instruction *SPIRVEmitIntrinsics::visitStoreInst(StoreInst &I) {
500500
}
501501

502502
Instruction *SPIRVEmitIntrinsics::visitAllocaInst(AllocaInst &I) {
503+
Value *ArraySize = nullptr;
504+
if (I.isArrayAllocation()) {
505+
const SPIRVSubtarget *STI = TM->getSubtargetImpl(*I.getFunction());
506+
if (!STI->canUseExtension(
507+
SPIRV::Extension::SPV_INTEL_variable_length_array))
508+
report_fatal_error(
509+
"array allocation: this instruction requires the following "
510+
"SPIR-V extension: SPV_INTEL_variable_length_array",
511+
false);
512+
ArraySize = I.getArraySize();
513+
}
514+
503515
TrackConstants = false;
504516
Type *PtrTy = I.getType();
505-
auto *NewI = IRB->CreateIntrinsic(Intrinsic::spv_alloca, {PtrTy}, {});
517+
auto *NewI =
518+
ArraySize
519+
? IRB->CreateIntrinsic(Intrinsic::spv_alloca_array,
520+
{PtrTy, ArraySize->getType()}, {ArraySize})
521+
: IRB->CreateIntrinsic(Intrinsic::spv_alloca, {PtrTy}, {});
506522
std::string InstName = I.hasName() ? I.getName().str() : "";
507523
I.replaceAllUsesWith(NewI);
508524
I.eraseFromParent();

‎llvm/lib/Target/SPIRV/SPIRVInstrInfo.td

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -287,6 +287,15 @@ def OpPtrNotEqual: Op<402, (outs ID:$res), (ins TYPE:$resType, ID:$a, ID:$b),
287287
def OpPtrDiff: Op<403, (outs ID:$res), (ins TYPE:$resType, ID:$a, ID:$b),
288288
"$res = OpPtrDiff $resType $a $b">;
289289

290+
// - SPV_INTEL_variable_length_array
291+
292+
def OpVariableLengthArrayINTEL: Op<5818, (outs ID:$res), (ins TYPE:$type, ID:$length),
293+
"$res = OpVariableLengthArrayINTEL $type $length">;
294+
def OpSaveMemoryINTEL: Op<5819, (outs ID:$res), (ins TYPE:$type),
295+
"$res = OpSaveMemoryINTEL $type">;
296+
def OpRestoreMemoryINTEL: Op<5820, (outs), (ins ID:$ptr),
297+
"OpRestoreMemoryINTEL $ptr">;
298+
290299
// 3.42.9 Function Instructions
291300

292301
def OpFunction: Op<54, (outs ID:$func),

‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -99,6 +99,10 @@ class SPIRVInstructionSelector : public InstructionSelector {
9999
MachineInstr &I) const;
100100
bool selectStore(MachineInstr &I) const;
101101

102+
bool selectStackSave(Register ResVReg, const SPIRVType *ResType,
103+
MachineInstr &I) const;
104+
bool selectStackRestore(MachineInstr &I) const;
105+
102106
bool selectMemOperation(Register ResVReg, MachineInstr &I) const;
103107

104108
bool selectAtomicRMW(Register ResVReg, const SPIRVType *ResType,
@@ -167,6 +171,8 @@ class SPIRVInstructionSelector : public InstructionSelector {
167171

168172
bool selectFrameIndex(Register ResVReg, const SPIRVType *ResType,
169173
MachineInstr &I) const;
174+
bool selectAllocaArray(Register ResVReg, const SPIRVType *ResType,
175+
MachineInstr &I) const;
170176

171177
bool selectBranch(MachineInstr &I) const;
172178
bool selectBranchCond(MachineInstr &I) const;
@@ -508,6 +514,11 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg,
508514
case TargetOpcode::G_FENCE:
509515
return selectFence(I);
510516

517+
case TargetOpcode::G_STACKSAVE:
518+
return selectStackSave(ResVReg, ResType, I);
519+
case TargetOpcode::G_STACKRESTORE:
520+
return selectStackRestore(I);
521+
511522
default:
512523
return false;
513524
}
@@ -653,6 +664,35 @@ bool SPIRVInstructionSelector::selectStore(MachineInstr &I) const {
653664
return MIB.constrainAllUses(TII, TRI, RBI);
654665
}
655666

667+
bool SPIRVInstructionSelector::selectStackSave(Register ResVReg,
668+
const SPIRVType *ResType,
669+
MachineInstr &I) const {
670+
if (!STI.canUseExtension(SPIRV::Extension::SPV_INTEL_variable_length_array))
671+
report_fatal_error(
672+
"llvm.stacksave intrinsic: this instruction requires the following "
673+
"SPIR-V extension: SPV_INTEL_variable_length_array",
674+
false);
675+
MachineBasicBlock &BB = *I.getParent();
676+
return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpSaveMemoryINTEL))
677+
.addDef(ResVReg)
678+
.addUse(GR.getSPIRVTypeID(ResType))
679+
.constrainAllUses(TII, TRI, RBI);
680+
}
681+
682+
bool SPIRVInstructionSelector::selectStackRestore(MachineInstr &I) const {
683+
if (!STI.canUseExtension(SPIRV::Extension::SPV_INTEL_variable_length_array))
684+
report_fatal_error(
685+
"llvm.stackrestore intrinsic: this instruction requires the following "
686+
"SPIR-V extension: SPV_INTEL_variable_length_array",
687+
false);
688+
if (!I.getOperand(0).isReg())
689+
return false;
690+
MachineBasicBlock &BB = *I.getParent();
691+
return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpRestoreMemoryINTEL))
692+
.addUse(I.getOperand(0).getReg())
693+
.constrainAllUses(TII, TRI, RBI);
694+
}
695+
656696
bool SPIRVInstructionSelector::selectMemOperation(Register ResVReg,
657697
MachineInstr &I) const {
658698
MachineBasicBlock &BB = *I.getParent();
@@ -1505,6 +1545,8 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
15051545
break;
15061546
case Intrinsic::spv_alloca:
15071547
return selectFrameIndex(ResVReg, ResType, I);
1548+
case Intrinsic::spv_alloca_array:
1549+
return selectAllocaArray(ResVReg, ResType, I);
15081550
case Intrinsic::spv_assume:
15091551
if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_expect_assume))
15101552
BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpAssumeTrueKHR))
@@ -1524,6 +1566,20 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
15241566
return true;
15251567
}
15261568

1569+
bool SPIRVInstructionSelector::selectAllocaArray(Register ResVReg,
1570+
const SPIRVType *ResType,
1571+
MachineInstr &I) const {
1572+
// there was an allocation size parameter to the allocation instruction
1573+
// that is not 1
1574+
MachineBasicBlock &BB = *I.getParent();
1575+
return BuildMI(BB, I, I.getDebugLoc(),
1576+
TII.get(SPIRV::OpVariableLengthArrayINTEL))
1577+
.addDef(ResVReg)
1578+
.addUse(GR.getSPIRVTypeID(ResType))
1579+
.addUse(I.getOperand(2).getReg())
1580+
.constrainAllUses(TII, TRI, RBI);
1581+
}
1582+
15271583
bool SPIRVInstructionSelector::selectFrameIndex(Register ResVReg,
15281584
const SPIRVType *ResType,
15291585
MachineInstr &I) const {

‎llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -186,6 +186,8 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
186186

187187
getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_FREEZE}).alwaysLegal();
188188

189+
getActionDefinitionsBuilder({G_STACKSAVE, G_STACKRESTORE}).alwaysLegal();
190+
189191
getActionDefinitionsBuilder(G_INTTOPTR)
190192
.legalForCartesianProduct(allPtrs, allIntScalars);
191193
getActionDefinitionsBuilder(G_PTRTOINT)

‎llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1110,6 +1110,14 @@ void addInstrRequirements(const MachineInstr &MI,
11101110
case SPIRV::OpAtomicFMaxEXT:
11111111
AddAtomicFloatRequirements(MI, Reqs, ST);
11121112
break;
1113+
case SPIRV::OpVariableLengthArrayINTEL:
1114+
case SPIRV::OpSaveMemoryINTEL:
1115+
case SPIRV::OpRestoreMemoryINTEL:
1116+
if (ST.canUseExtension(SPIRV::Extension::SPV_INTEL_variable_length_array)) {
1117+
Reqs.addExtension(SPIRV::Extension::SPV_INTEL_variable_length_array);
1118+
Reqs.addCapability(SPIRV::Capability::VariableLengthArrayINTEL);
1119+
}
1120+
break;
11131121
default:
11141122
break;
11151123
}

‎llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -85,6 +85,10 @@ cl::list<SPIRV::Extension::Extension> Extensions(
8585
"SPV_KHR_subgroup_rotate",
8686
"Adds a new instruction that enables rotating values across "
8787
"invocations within a subgroup."),
88+
clEnumValN(SPIRV::Extension::SPV_INTEL_variable_length_array,
89+
"SPV_INTEL_variable_length_array",
90+
"Allows to allocate local arrays whose number of elements "
91+
"is unknown at compile time."),
8892
clEnumValN(SPIRV::Extension::SPV_INTEL_function_pointers,
8993
"SPV_INTEL_function_pointers",
9094
"Allows translation of function pointers.")));

‎llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -296,6 +296,7 @@ defm SPV_INTEL_fpga_latency_control : ExtensionOperand<101>;
296296
defm SPV_INTEL_fpga_argument_interfaces : ExtensionOperand<102>;
297297
defm SPV_INTEL_optnone : ExtensionOperand<103>;
298298
defm SPV_INTEL_function_pointers : ExtensionOperand<104>;
299+
defm SPV_INTEL_variable_length_array : ExtensionOperand<105>;
299300

300301
//===----------------------------------------------------------------------===//
301302
// Multiclass used to define Capabilities enum values and at the same time
@@ -462,6 +463,7 @@ defm AtomicFloat16AddEXT : CapabilityOperand<6095, 0, 0, [SPV_EXT_shader_atomic_
462463
defm AtomicFloat16MinMaxEXT : CapabilityOperand<5616, 0, 0, [SPV_EXT_shader_atomic_float_min_max], []>;
463464
defm AtomicFloat32MinMaxEXT : CapabilityOperand<5612, 0, 0, [SPV_EXT_shader_atomic_float_min_max], []>;
464465
defm AtomicFloat64MinMaxEXT : CapabilityOperand<5613, 0, 0, [SPV_EXT_shader_atomic_float_min_max], []>;
466+
defm VariableLengthArrayINTEL : CapabilityOperand<5817, 0, 0, [SPV_INTEL_variable_length_array], []>;
465467
defm GroupUniformArithmeticKHR : CapabilityOperand<6400, 0, 0, [SPV_KHR_uniform_group_instructions], []>;
466468
defm USMStorageClassesINTEL : CapabilityOperand<5935, 0, 0, [SPV_INTEL_usm_storage_classes], [Kernel]>;
467469

‎llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr.ll

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,54 @@
1+
; Modified from: https://github.com/KhronosGroup/SPIRV-LLVM-Translator/test/extensions/INTEL/SPV_INTEL_variable_length_array/basic.ll
2+
3+
; RUN: not llc -O0 -mtriple=spirv32-unknown-unknown %s -o %t.spvt 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
4+
; RUN: llc -O0 -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_INTEL_variable_length_array %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
5+
; TODO: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_INTEL_variable_length_array %s -o - -filetype=obj | spirv-val %}
6+
7+
; CHECK-ERROR: LLVM ERROR: array allocation: this instruction requires the following SPIR-V extension: SPV_INTEL_variable_length_array
8+
9+
; CHECK-SPIRV: Capability VariableLengthArrayINTEL
10+
; CHECK-SPIRV: Extension "SPV_INTEL_variable_length_array"
11+
12+
; CHECK-SPIRV-DAG: OpName %[[Len:.*]] "a"
13+
; CHECK-SPIRV-DAG: %[[Long:.*]] = OpTypeInt 64 0
14+
; CHECK-SPIRV-DAG: %[[Int:.*]] = OpTypeInt 32 0
15+
; CHECK-SPIRV-DAG: %[[Char:.*]] = OpTypeInt 8 0
16+
; CHECK-SPIRV-DAG: %[[CharPtr:.*]] = OpTypePointer {{[a-zA-Z]+}} %[[Char]]
17+
; CHECK-SPIRV-DAG: %[[IntPtr:.*]] = OpTypePointer {{[a-zA-Z]+}} %[[Int]]
18+
; CHECK-SPIRV: %[[Len]] = OpFunctionParameter %[[Long:.*]]
19+
; CHECK-SPIRV: %[[SavedMem1:.*]] = OpSaveMemoryINTEL %[[CharPtr]]
20+
; CHECK-SPIRV: OpVariableLengthArrayINTEL %[[IntPtr]] %[[Len]]
21+
; CHECK-SPIRV: OpRestoreMemoryINTEL %[[SavedMem1]]
22+
; CHECK-SPIRV: %[[SavedMem2:.*]] = OpSaveMemoryINTEL %[[CharPtr]]
23+
; CHECK-SPIRV: OpVariableLengthArrayINTEL %[[IntPtr]] %[[Len]]
24+
; CHECK-SPIRV: OpRestoreMemoryINTEL %[[SavedMem2]]
25+
26+
target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
27+
target triple = "spir"
28+
29+
define dso_local spir_func i32 @foo(i64 %a, i64 %b) {
30+
entry:
31+
%vector1 = alloca [42 x i32], align 16
32+
call void @llvm.lifetime.start.p0(i64 168, ptr nonnull %vector1)
33+
%stack1 = call ptr @llvm.stacksave.p0()
34+
%vla = alloca i32, i64 %a, align 16
35+
%arrayidx = getelementptr inbounds i32, ptr %vla, i64 %b
36+
%elem1 = load i32, ptr %arrayidx, align 4
37+
call void @llvm.stackrestore.p0(ptr %stack1)
38+
%stack2 = call ptr @llvm.stacksave.p0()
39+
%vla2 = alloca i32, i64 %a, align 16
40+
%arrayidx3 = getelementptr inbounds [42 x i32], ptr %vector1, i64 0, i64 %b
41+
%elemt = load i32, ptr %arrayidx3, align 4
42+
%add = add nsw i32 %elemt, %elem1
43+
%arrayidx4 = getelementptr inbounds i32, ptr %vla2, i64 %b
44+
%elem2 = load i32, ptr %arrayidx4, align 4
45+
%add5 = add nsw i32 %add, %elem2
46+
call void @llvm.stackrestore.p0(ptr %stack2)
47+
call void @llvm.lifetime.end.p0(i64 168, ptr nonnull %vector1)
48+
ret i32 %add5
49+
}
50+
51+
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
52+
declare ptr @llvm.stacksave.p0()
53+
declare void @llvm.stackrestore.p0(ptr)
54+
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)

‎llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr_spec_const.ll

Lines changed: 110 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,110 @@
1+
; Modified from: https://github.com/KhronosGroup/SPIRV-LLVM-Translator/test/extensions/INTEL/SPV_INTEL_variable_length_array/vla_spec_const.ll
2+
3+
; RUN: llc -O0 -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_INTEL_variable_length_array %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
4+
; TODO: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown --spirv-extensions=SPV_INTEL_variable_length_array %s -o - -filetype=obj | spirv-val %}
5+
6+
; CHECK-SPIRV: Capability VariableLengthArrayINTEL
7+
; CHECK-SPIRV: Extension "SPV_INTEL_variable_length_array"
8+
; CHECK-SPIRV: OpDecorate %[[SpecConst:.*]] SpecId 0
9+
; CHECK-SPIRV-DAG: %[[Long:.*]] = OpTypeInt 64 0
10+
; CHECK-SPIRV-DAG: %[[Int:.*]] = OpTypeInt 32 0
11+
; CHECK-SPIRV-DAG: %[[IntPtr:.*]] = OpTypePointer {{[a-zA-Z]+}} %[[Int]]
12+
; CHECK-SPIRV: %[[SpecConst]] = OpSpecConstant %[[Long]]
13+
; CHECK-SPIRV-LABEL: FunctionEnd
14+
; CHECK-SPIRV: %[[SpecConstVal:.*]] = OpFunctionCall %[[Long]]
15+
; CHECK-SPIRV: OpSaveMemoryINTEL
16+
; CHECK-SPIRV: OpVariableLengthArrayINTEL %[[IntPtr]] %[[SpecConstVal]]
17+
; CHECK-SPIRV: OpRestoreMemoryINTEL
18+
19+
; CHECK-SPIRV: OpFunction %[[Long]]
20+
; CHECK-SPIRV: ReturnValue %[[SpecConst]]
21+
22+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
23+
target triple = "spir64-unknown-linux"
24+
25+
%"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" = type { %"class._ZTSN2cl4sycl12experimental13spec_constantIm13MyUInt64ConstEE.cl::sycl::experimental::spec_constant" }
26+
%"class._ZTSN2cl4sycl12experimental13spec_constantIm13MyUInt64ConstEE.cl::sycl::experimental::spec_constant" = type { i8 }
27+
28+
$_ZTS17SpecializedKernel = comdat any
29+
30+
$_ZNK2cl4sycl12experimental13spec_constantIm13MyUInt64ConstE3getEv = comdat any
31+
32+
; Function Attrs: norecurse
33+
define weak_odr dso_local spir_kernel void @_ZTS17SpecializedKernel() #0 comdat !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
34+
entry:
35+
%p = alloca %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon", align 1
36+
call void @llvm.lifetime.start.p0(i64 1, ptr %p) #4
37+
%p4 = addrspacecast ptr %p to ptr addrspace(4)
38+
call spir_func void @"_ZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEv"(ptr addrspace(4) %p4)
39+
call void @llvm.lifetime.end.p0(i64 1, ptr %p) #4
40+
ret void
41+
}
42+
43+
; Function Attrs: argmemonly nounwind willreturn
44+
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
45+
46+
; Function Attrs: inlinehint norecurse
47+
define internal spir_func void @"_ZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEv"(ptr addrspace(4) %this) #2 align 2 {
48+
entry:
49+
%this.addr = alloca ptr addrspace(4), align 8
50+
%saved_stack = alloca ptr, align 8
51+
%__vla_expr0 = alloca i64, align 8
52+
store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
53+
%this1 = load ptr addrspace(4), ptr %this.addr, align 8
54+
%call = call spir_func i64 @_ZNK2cl4sycl12experimental13spec_constantIm13MyUInt64ConstE3getEv(ptr addrspace(4) %this1)
55+
%p = call ptr @llvm.stacksave.p0()
56+
store ptr %p, ptr %saved_stack, align 8
57+
%vla = alloca i32, i64 %call, align 4
58+
store i64 %call, ptr %__vla_expr0, align 8
59+
store i32 42, ptr %vla, align 4, !tbaa !9
60+
%torestore = load ptr, ptr %saved_stack, align 8
61+
call void @llvm.stackrestore.p0(ptr %torestore)
62+
ret void
63+
}
64+
65+
; Function Attrs: argmemonly nounwind willreturn
66+
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
67+
68+
; Function Attrs: norecurse
69+
define linkonce_odr dso_local spir_func i64 @_ZNK2cl4sycl12experimental13spec_constantIm13MyUInt64ConstE3getEv(ptr addrspace(4) %this) #3 comdat align 2 {
70+
entry:
71+
%this.addr = alloca ptr addrspace(4), align 8
72+
%TName = alloca ptr addrspace(4), align 8
73+
store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
74+
call void @llvm.lifetime.start.p0(i64 8, ptr %TName) #4
75+
%p = call i64 @_Z20__spirv_SpecConstantix(i32 0, i64 0), !SYCL_SPEC_CONST_SYM_ID !11
76+
call void @llvm.lifetime.end.p0(i64 8, ptr %TName) #4
77+
ret i64 %p
78+
}
79+
80+
; Function Attrs: nounwind
81+
declare ptr @llvm.stacksave.p0() #4
82+
83+
; Function Attrs: nounwind
84+
declare void @llvm.stackrestore.p0(ptr) #4
85+
86+
declare i64 @_Z20__spirv_SpecConstantix(i32, i64)
87+
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attributes #0 = { norecurse "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "sycl-module-id"="/work/intel/vla_spec_const.cpp" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { argmemonly nounwind willreturn }
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attributes #2 = { inlinehint norecurse "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #3 = { norecurse "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #4 = { nounwind }
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!llvm.module.flags = !{!0}
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!opencl.spir.version = !{!1}
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!spirv.Source = !{!2}
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!llvm.ident = !{!3}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 1, i32 2}
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!2 = !{i32 4, i32 100000}
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!3 = !{!"clang version 12.0.0"}
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!4 = !{}
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!5 = !{!6, !6, i64 0}
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!6 = !{!"any pointer", !7, i64 0}
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!7 = !{!"omnipotent char", !8, i64 0}
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!8 = !{!"Simple C++ TBAA"}
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!9 = !{!10, !10, i64 0}
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!10 = !{!"int", !7, i64 0}
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!11 = !{!"_ZTS13MyUInt64Const", i32 0}

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