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Pierre-vhPierre-vh
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Fixes + add tests
1 parent 0793c95 commit a1992f6

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3 files changed

+147
-6
lines changed

3 files changed

+147
-6
lines changed

‎llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16525,20 +16525,22 @@ static void knownBitsForSBFE(const MachineInstr &MI, GISelValueTracking &VT,
1652516525

1652616526
VT.computeKnownBitsImpl(MI.getOperand(1).getReg(), Known, DemandedElts);
1652716527

16528-
const uint64_t WidthMask = maskTrailingOnes<uint64_t>(Width);
16529-
Known.Zero = Known.Zero.shl(Offset) & WidthMask;
16530-
Known.One = Known.One.shl(Offset) & WidthMask;
16528+
Known.Zero = Known.Zero.lshr(Offset);
16529+
Known.One = Known.One.lshr(Offset);
16530+
16531+
Known = Known.trunc(Width);
1653116532

1653216533
if (SExt)
16533-
Known.sextInReg(Width);
16534+
Known = Known.sext(BFEWidth);
1653416535
else
16535-
Known.Zero |= maskLeadingOnes<unsigned>(BFEWidth - Width);
16536+
Known = Known.zext(BFEWidth);
1653616537
}
1653716538

1653816539
void SITargetLowering::computeKnownBitsForTargetInstr(
1653916540
GISelValueTracking &VT, Register R, KnownBits &Known,
1654016541
const APInt &DemandedElts, const MachineRegisterInfo &MRI,
1654116542
unsigned Depth) const {
16543+
Known.resetAll();
1654216544
const MachineInstr *MI = MRI.getVRegDef(R);
1654316545
switch (MI->getOpcode()) {
1654416546
case AMDGPU::S_BFE_I32:

‎llvm/test/CodeGen/AMDGPU/GlobalISel/known-bits-sbfe.mir

Lines changed: 139 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,139 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
2+
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -passes="print<gisel-value-tracking>" %s -o /dev/null 2>&1 | FileCheck %s
3+
4+
---
5+
name: test_s_bfe_u32_constants
6+
body: |
7+
bb.0:
8+
; Extract [12:16)
9+
; CHECK-LABEL: name: @test_s_bfe_u32_constants
10+
; CHECK-NEXT: %cst:sgpr_32 KnownBits:00000000000000001111111111111111 SignBits:16
11+
; CHECK-NEXT: %bfe:sgpr_32 KnownBits:00000000000000000000000000001111 SignBits:28
12+
%cst:sgpr_32(s32) = G_CONSTANT i32 65535
13+
%bfe:sgpr_32(s32) = S_BFE_U32 %cst, 262156, implicit-def $scc
14+
$sgpr0 = COPY %bfe
15+
...
16+
---
17+
name: test_s_bfe_i32_constants
18+
body: |
19+
bb.0:
20+
; Extract [12:16)
21+
; CHECK-LABEL: name: @test_s_bfe_i32_constants
22+
; CHECK-NEXT: %cst:sgpr_32 KnownBits:00000000000000001111111111111111 SignBits:16
23+
; CHECK-NEXT: %bfe:sgpr_32 KnownBits:11111111111111111111111111111111 SignBits:32
24+
%cst:sgpr_32(s32) = G_CONSTANT i32 65535
25+
%bfe:sgpr_32(s32) = S_BFE_I32 %cst, 262156, implicit-def $scc
26+
$sgpr0 = COPY %bfe
27+
...
28+
---
29+
name: test_s_bfe_u64_constants
30+
body: |
31+
bb.0:
32+
; Extract [12:16)
33+
; CHECK-LABEL: name: @test_s_bfe_u64_constants
34+
; CHECK-NEXT: %cst:sgpr_64 KnownBits:0000000000000000000000000000000000000000000000001111111111111111 SignBits:48
35+
; CHECK-NEXT: %bfe:sgpr_64 KnownBits:0000000000000000000000000000000000000000000000000000000000001111 SignBits:60
36+
%cst:sgpr_64(s64) = G_CONSTANT i64 65535
37+
%bfe:sgpr_64(s64) = S_BFE_U64 %cst, 262156, implicit-def $scc
38+
$sgpr0_sgpr1 = COPY %bfe
39+
...
40+
---
41+
name: test_s_bfe_i64_constants
42+
body: |
43+
bb.0:
44+
; Extract [12:16)
45+
; CHECK-LABEL: name: @test_s_bfe_i64_constants
46+
; CHECK-NEXT: %cst:sgpr_64 KnownBits:0000000000000000000000000000000000000000000000001111111111111111 SignBits:48
47+
; CHECK-NEXT: %bfe:sgpr_64 KnownBits:1111111111111111111111111111111111111111111111111111111111111111 SignBits:64
48+
%cst:sgpr_64(s64) = G_CONSTANT i64 65535
49+
%bfe:sgpr_64(s64) = S_BFE_I64 %cst, 262156, implicit-def $scc
50+
$sgpr0_sgpr1 = COPY %bfe
51+
...
52+
---
53+
name: test_s_bfe_u32_middle_bits_unknown
54+
body: |
55+
bb.0:
56+
; Extract [8:16) but the middle 4 bits are ????
57+
liveins: $sgpr0
58+
59+
; CHECK-LABEL: name: @test_s_bfe_u32_middle_bits_unknown
60+
; CHECK-NEXT: %input:sgpr_32 KnownBits:???????????????????????????????? SignBits:1
61+
; CHECK-NEXT: %cst:sgpr_32 KnownBits:00000000000000001100001111111111 SignBits:16
62+
; CHECK-NEXT: %mask:sgpr_32 KnownBits:00000000000000000011110000000000 SignBits:18
63+
; CHECK-NEXT: %masked_input:sgpr_32 KnownBits:000000000000000000????0000000000 SignBits:18
64+
; CHECK-NEXT: %merged:sgpr_32 KnownBits:000000000000000011????1111111111 SignBits:16
65+
; CHECK-NEXT: %bfe:sgpr_32 KnownBits:00000000000000000000000011????11 SignBits:24
66+
%input:sgpr_32(s32) = COPY $sgpr0
67+
%cst:sgpr_32(s32) = G_CONSTANT i32 50175
68+
%mask:sgpr_32(s32) = G_CONSTANT i32 15360
69+
%masked_input:sgpr_32(s32) = G_AND %input, %mask
70+
%merged:sgpr_32(s32) = G_OR %masked_input, %cst
71+
%bfe:sgpr_32(s32) = S_BFE_U32 %merged, 524296, implicit-def $scc
72+
$sgpr0 = COPY %bfe
73+
...
74+
---
75+
name: test_s_bfe_i32_middle_bits_unknown
76+
body: |
77+
bb.0:
78+
; Extract [8:16) but the middle 4 bits are ????
79+
liveins: $sgpr0
80+
81+
; CHECK-LABEL: name: @test_s_bfe_i32_middle_bits_unknown
82+
; CHECK-NEXT: %input:sgpr_32 KnownBits:???????????????????????????????? SignBits:1
83+
; CHECK-NEXT: %cst:sgpr_32 KnownBits:00000000000000001100001111111111 SignBits:16
84+
; CHECK-NEXT: %mask:sgpr_32 KnownBits:00000000000000000011110000000000 SignBits:18
85+
; CHECK-NEXT: %masked_input:sgpr_32 KnownBits:000000000000000000????0000000000 SignBits:18
86+
; CHECK-NEXT: %merged:sgpr_32 KnownBits:000000000000000011????1111111111 SignBits:16
87+
; CHECK-NEXT: %bfe:sgpr_32 KnownBits:11111111111111111111111111????11 SignBits:26
88+
%input:sgpr_32(s32) = COPY $sgpr0
89+
%cst:sgpr_32(s32) = G_CONSTANT i32 50175
90+
%mask:sgpr_32(s32) = G_CONSTANT i32 15360
91+
%masked_input:sgpr_32(s32) = G_AND %input, %mask
92+
%merged:sgpr_32(s32) = G_OR %masked_input, %cst
93+
%bfe:sgpr_32(s32) = S_BFE_I32 %merged, 524296, implicit-def $scc
94+
$sgpr0 = COPY %bfe
95+
...
96+
---
97+
name: test_s_bfe_u64_middle_bits_unknown
98+
body: |
99+
bb.0:
100+
; Extract [8:16) but the middle 4 bits are ????
101+
liveins: $sgpr0_sgpr1
102+
103+
; CHECK-LABEL: name: @test_s_bfe_u64_middle_bits_unknown
104+
; CHECK-NEXT: %input:sgpr_64 KnownBits:???????????????????????????????????????????????????????????????? SignBits:1
105+
; CHECK-NEXT: %cst:sgpr_64 KnownBits:0000000000000000000000000000000000000000000000001100001111111111 SignBits:48
106+
; CHECK-NEXT: %mask:sgpr_64 KnownBits:0000000000000000000000000000000000000000000000000011110000000000 SignBits:50
107+
; CHECK-NEXT: %masked_input:sgpr_64 KnownBits:00000000000000000000000000000000000000000000000000????0000000000 SignBits:50
108+
; CHECK-NEXT: %merged:sgpr_64 KnownBits:00000000000000000000000000000000000000000000000011????1111111111 SignBits:48
109+
; CHECK-NEXT: %bfe:sgpr_64 KnownBits:0000000000000000000000000000000000000000000000000000000011????11 SignBits:56
110+
%input:sgpr_64(s64) = COPY $sgpr0_sgpr1
111+
%cst:sgpr_64(s64) = G_CONSTANT i64 50175
112+
%mask:sgpr_64(s64) = G_CONSTANT i64 15360
113+
%masked_input:sgpr_64(s64) = G_AND %input, %mask
114+
%merged:sgpr_64(s64) = G_OR %masked_input, %cst
115+
%bfe:sgpr_64(s64) = S_BFE_U64 %merged, 524296, implicit-def $scc
116+
$sgpr0_sgpr1 = COPY %bfe
117+
...
118+
---
119+
name: test_s_bfe_i64_middle_bits_unknown
120+
body: |
121+
bb.0:
122+
; Extract [8:16) but the middle 4 bits are ????
123+
liveins: $sgpr0_sgpr1
124+
125+
; CHECK-LABEL: name: @test_s_bfe_i64_middle_bits_unknown
126+
; CHECK-NEXT: %input:sgpr_64 KnownBits:???????????????????????????????????????????????????????????????? SignBits:1
127+
; CHECK-NEXT: %cst:sgpr_64 KnownBits:0000000000000000000000000000000000000000000000001100001111111111 SignBits:48
128+
; CHECK-NEXT: %mask:sgpr_64 KnownBits:0000000000000000000000000000000000000000000000000011110000000000 SignBits:50
129+
; CHECK-NEXT: %masked_input:sgpr_64 KnownBits:00000000000000000000000000000000000000000000000000????0000000000 SignBits:50
130+
; CHECK-NEXT: %merged:sgpr_64 KnownBits:00000000000000000000000000000000000000000000000011????1111111111 SignBits:48
131+
; CHECK-NEXT: %bfe:sgpr_64 KnownBits:1111111111111111111111111111111111111111111111111111111111????11 SignBits:58
132+
%input:sgpr_64(s64) = COPY $sgpr0_sgpr1
133+
%cst:sgpr_64(s64) = G_CONSTANT i64 50175
134+
%mask:sgpr_64(s64) = G_CONSTANT i64 15360
135+
%masked_input:sgpr_64(s64) = G_AND %input, %mask
136+
%merged:sgpr_64(s64) = G_OR %masked_input, %cst
137+
%bfe:sgpr_64(s64) = S_BFE_I64 %merged, 524296, implicit-def $scc
138+
$sgpr0_sgpr1 = COPY %bfe
139+
...

‎llvm/utils/update_givaluetracking_test_checks.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@
2222

2323
VT_FUNCTION_RE = re.compile(
2424
r"\s*name:\s*@(?P<func>[A-Za-z0-9_-]+)"
25-
r"(?P<body>(\s*%[0-9a-zA-Z_]+:_\s*KnownBits:[01?]+\sSignBits:[0-9]+$)+)",
25+
r"(?P<body>(\s*%[0-9a-zA-Z_]+:[A-Za-z0-9_-]+\s*KnownBits:[01?]+\sSignBits:[0-9]+$)+)",
2626
flags=(re.X | re.M),
2727
)
2828

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