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[RISCV] Add alias names for tdata1 and tdata3 CSRs. (#132525)
The RISC-V Debug Specification defines multiple names for these CSRs. https://github.com/riscv/riscv-debug-spec/releases/tag/1.0
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llvm/lib/Target/RISCV/RISCVSystemOperands.td

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@@ -324,8 +324,20 @@ def : SysReg<"scountinhibit", 0x120>;
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//===----------------------------------------------------------------------===//
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def : SysReg<"tselect", 0x7A0>;
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def : SysReg<"tdata1", 0x7A1>;
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let isAltName = 1 in {
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def : SysReg<"mcontrol", 0x7A1>;
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def : SysReg<"mcontrol6", 0x7A1>;
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def : SysReg<"icount", 0x7A1>;
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def : SysReg<"itrigger", 0x7A1>;
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def : SysReg<"etrigger", 0x7A1>;
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def : SysReg<"tmexttrigger", 0x7A1>;
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}
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def : SysReg<"tdata2", 0x7A2>;
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def : SysReg<"tdata3", 0x7A3>;
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let isAltName = 1 in {
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def : SysReg<"textra32", 0x7A3>;
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def : SysReg<"textra64", 0x7A3>;
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}
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def : SysReg<"tinfo", 0x7A4>;
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def : SysReg<"tcontrol", 0x7A5>;
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def : SysReg<"mcontext", 0x7A8>;

llvm/test/MC/RISCV/machine-csr-names.s

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@@ -1392,6 +1392,54 @@ csrrs t1, tdata1, zero
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# uimm12
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csrrs t2, 0x7A1, zero
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# mcontrol (alias for tdata1)
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# name
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# CHECK-INST: csrrs t1, tdata1, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0x7a]
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# CHECK-INST-ALIAS: csrr t1, tdata1
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# name
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csrrs t1, mcontrol, zero
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# mcontrol6 (alias for tdata1)
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# name
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# CHECK-INST: csrrs t1, tdata1, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0x7a]
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# CHECK-INST-ALIAS: csrr t1, tdata1
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# name
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csrrs t1, mcontrol6, zero
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# icount (alias for tdata1)
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# name
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# CHECK-INST: csrrs t1, tdata1, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0x7a]
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# CHECK-INST-ALIAS: csrr t1, tdata1
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# name
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csrrs t1, icount, zero
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# itrigger (alias for tdata1)
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# name
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# CHECK-INST: csrrs t1, tdata1, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0x7a]
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# CHECK-INST-ALIAS: csrr t1, tdata1
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# name
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csrrs t1, itrigger, zero
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# etrigger (alias for tdata1)
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# name
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# CHECK-INST: csrrs t1, tdata1, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0x7a]
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# CHECK-INST-ALIAS: csrr t1, tdata1
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# name
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csrrs t1, etrigger, zero
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# tmexttrigger (alias for tdata1)
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# name
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# CHECK-INST: csrrs t1, tdata1, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0x7a]
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# CHECK-INST-ALIAS: csrr t1, tdata1
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# name
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csrrs t1, tmexttrigger, zero
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# tdata2
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# name
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# CHECK-INST: csrrs t1, tdata2, zero
@@ -1419,6 +1467,22 @@ csrrs t1, tdata3, zero
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# uimm12
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csrrs t2, 0x7A3, zero
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# textra32 (alias for tdata3)
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# name
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# CHECK-INST: csrrs t1, tdata3, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0x7a]
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# CHECK-INST-ALIAS: csrr t1, tdata3
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# name
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csrrs t1, textra32, zero
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# textra64 (alias for tdata3)
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# name
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# CHECK-INST: csrrs t1, tdata3, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0x7a]
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# CHECK-INST-ALIAS: csrr t1, tdata3
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# name
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csrrs t1, textra64, zero
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# tinfo
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# name
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# CHECK-INST: csrrs t1, tinfo, zero

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