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Dmitry Chernenkov
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Revert "[NVVM] Upgrade nvvm.ptr.* intrinics to addrspace cast (#109710)"
This reverts commit 3675761.
1 parent 74dcf0b commit 9a0e281

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-146
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10 files changed

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‎llvm/docs/NVPTXUsage.rst

Lines changed: 63 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -127,6 +127,69 @@ Example: 64-bit PTX for CUDA Driver API: ``nvptx64-nvidia-cuda``
127127
NVPTX Intrinsics
128128
================
129129

130+
Address Space Conversion
131+
------------------------
132+
133+
'``llvm.nvvm.ptr.*.to.gen``' Intrinsics
134+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
135+
136+
Syntax:
137+
"""""""
138+
139+
These are overloaded intrinsics. You can use these on any pointer types.
140+
141+
.. code-block:: llvm
142+
143+
declare ptr @llvm.nvvm.ptr.global.to.gen.p0.p1(ptr addrspace(1))
144+
declare ptr @llvm.nvvm.ptr.shared.to.gen.p0.p3(ptr addrspace(3))
145+
declare ptr @llvm.nvvm.ptr.constant.to.gen.p0.p4(ptr addrspace(4))
146+
declare ptr @llvm.nvvm.ptr.local.to.gen.p0.p5(ptr addrspace(5))
147+
148+
Overview:
149+
"""""""""
150+
151+
The '``llvm.nvvm.ptr.*.to.gen``' intrinsics convert a pointer in a non-generic
152+
address space to a generic address space pointer.
153+
154+
Semantics:
155+
""""""""""
156+
157+
These intrinsics modify the pointer value to be a valid generic address space
158+
pointer.
159+
160+
161+
'``llvm.nvvm.ptr.gen.to.*``' Intrinsics
162+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
163+
164+
Syntax:
165+
"""""""
166+
167+
These are overloaded intrinsics. You can use these on any pointer types.
168+
169+
.. code-block:: llvm
170+
171+
declare ptr addrspace(1) @llvm.nvvm.ptr.gen.to.global.p1.p0(ptr)
172+
declare ptr addrspace(3) @llvm.nvvm.ptr.gen.to.shared.p3.p0(ptr)
173+
declare ptr addrspace(4) @llvm.nvvm.ptr.gen.to.constant.p4.p0(ptr)
174+
declare ptr addrspace(5) @llvm.nvvm.ptr.gen.to.local.p5.p0(ptr)
175+
176+
Overview:
177+
"""""""""
178+
179+
The '``llvm.nvvm.ptr.gen.to.*``' intrinsics convert a pointer in the generic
180+
address space to a pointer in the target address space. Note that these
181+
intrinsics are only useful if the address space of the target address space of
182+
the pointer is known. It is not legal to use address space conversion
183+
intrinsics to convert a pointer from one non-generic address space to another
184+
non-generic address space.
185+
186+
Semantics:
187+
""""""""""
188+
189+
These intrinsics modify the pointer value to be a valid pointer in the target
190+
non-generic address space.
191+
192+
130193
Reading PTX Special Registers
131194
-----------------------------
132195

‎llvm/docs/ReleaseNotes.rst

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -69,18 +69,6 @@ Changes to the LLVM IR
6969
* ``llvm.nvvm.rotate.right.b64``
7070
* ``llvm.nvvm.rotate.b64``
7171

72-
* Remove the following intrinsics which can be replaced with an
73-
``addrspacecast``:
74-
75-
* ``llvm.nvvm.ptr.gen.to.global``
76-
* ``llvm.nvvm.ptr.gen.to.shared``
77-
* ``llvm.nvvm.ptr.gen.to.constant``
78-
* ``llvm.nvvm.ptr.gen.to.local``
79-
* ``llvm.nvvm.ptr.global.to.gen``
80-
* ``llvm.nvvm.ptr.shared.to.gen``
81-
* ``llvm.nvvm.ptr.constant.to.gen``
82-
* ``llvm.nvvm.ptr.local.to.gen``
83-
8472
Changes to LLVM infrastructure
8573
------------------------------
8674

‎llvm/include/llvm/IR/IntrinsicsNVVM.td

Lines changed: 38 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -30,18 +30,10 @@
3030
// * llvm.nvvm.max.ui --> select(x ule y, x, y)
3131
// * llvm.nvvm.max.ull --> ibid.
3232
// * llvm.nvvm.h2f --> llvm.convert.to.fp16.f32
33-
// * llvm.nvvm.bitcast.f2i --> bitcast
34-
// * llvm.nvvm.bitcast.i2f --> ibid.
35-
// * llvm.nvvm.bitcast.d2ll --> ibid.
36-
// * llvm.nvvm.bitcast.ll2d --> ibid.
37-
// * llvm.nvvm.ptr.gen.to.global --> addrspacecast
38-
// * llvm.nvvm.ptr.gen.to.shared --> ibid.
39-
// * llvm.nvvm.ptr.gen.to.constant --> ibid.
40-
// * llvm.nvvm.ptr.gen.to.local --> ibid.
41-
// * llvm.nvvm.ptr.global.to.gen --> ibid.
42-
// * llvm.nvvm.ptr.shared.to.gen --> ibid.
43-
// * llvm.nvvm.ptr.constant.to.gen --> ibid.
44-
// * llvm.nvvm.ptr.local.to.gen --> ibid.
33+
// * llvm.nvvm.bitcast.f2i --> bitcast
34+
// * llvm.nvvm.bitcast.i2f --> ibid.
35+
// * llvm.nvvm.bitcast.d2ll --> ibid.
36+
// * llvm.nvvm.bitcast.ll2d --> ibid.
4537

4638
def llvm_global_ptr_ty : LLVMQualPointerType<1>; // (global)ptr
4739
def llvm_shared_ptr_ty : LLVMQualPointerType<3>; // (shared)ptr
@@ -1610,6 +1602,40 @@ def int_nvvm_ldg_global_p : Intrinsic<[llvm_anyptr_ty],
16101602
[IntrReadMem, IntrArgMemOnly, IntrNoCallback, IntrWillReturn, NoCapture<ArgIndex<0>>],
16111603
"llvm.nvvm.ldg.global.p">;
16121604

1605+
// Use for generic pointers
1606+
// - These intrinsics are used to convert address spaces.
1607+
// - The input pointer and output pointer must have the same type, except for
1608+
// the address-space. (This restriction is not enforced here as there is
1609+
// currently no way to describe it).
1610+
// - This complements the llvm bitcast, which can be used to cast one type
1611+
// of pointer to another type of pointer, while the address space remains
1612+
// the same.
1613+
def int_nvvm_ptr_local_to_gen: DefaultAttrsIntrinsic<[llvm_anyptr_ty],
1614+
[llvm_anyptr_ty], [IntrNoMem, IntrSpeculatable],
1615+
"llvm.nvvm.ptr.local.to.gen">;
1616+
def int_nvvm_ptr_shared_to_gen: DefaultAttrsIntrinsic<[llvm_anyptr_ty],
1617+
[llvm_anyptr_ty], [IntrNoMem, IntrSpeculatable],
1618+
"llvm.nvvm.ptr.shared.to.gen">;
1619+
def int_nvvm_ptr_global_to_gen: DefaultAttrsIntrinsic<[llvm_anyptr_ty],
1620+
[llvm_anyptr_ty], [IntrNoMem, IntrSpeculatable],
1621+
"llvm.nvvm.ptr.global.to.gen">;
1622+
def int_nvvm_ptr_constant_to_gen: DefaultAttrsIntrinsic<[llvm_anyptr_ty],
1623+
[llvm_anyptr_ty], [IntrNoMem, IntrSpeculatable],
1624+
"llvm.nvvm.ptr.constant.to.gen">;
1625+
1626+
def int_nvvm_ptr_gen_to_global: DefaultAttrsIntrinsic<[llvm_anyptr_ty],
1627+
[llvm_anyptr_ty], [IntrNoMem, IntrSpeculatable],
1628+
"llvm.nvvm.ptr.gen.to.global">;
1629+
def int_nvvm_ptr_gen_to_shared: DefaultAttrsIntrinsic<[llvm_anyptr_ty],
1630+
[llvm_anyptr_ty], [IntrNoMem, IntrSpeculatable],
1631+
"llvm.nvvm.ptr.gen.to.shared">;
1632+
def int_nvvm_ptr_gen_to_local: DefaultAttrsIntrinsic<[llvm_anyptr_ty],
1633+
[llvm_anyptr_ty], [IntrNoMem, IntrSpeculatable],
1634+
"llvm.nvvm.ptr.gen.to.local">;
1635+
def int_nvvm_ptr_gen_to_constant: DefaultAttrsIntrinsic<[llvm_anyptr_ty],
1636+
[llvm_anyptr_ty], [IntrNoMem, IntrSpeculatable],
1637+
"llvm.nvvm.ptr.gen.to.constant">;
1638+
16131639
// Used in nvvm internally to help address space opt and ptx code generation
16141640
// This is for params that are passed to kernel functions by pointer by-val.
16151641
def int_nvvm_ptr_gen_to_param: Intrinsic<[llvm_anyptr_ty],

‎llvm/lib/IR/AutoUpgrade.cpp

Lines changed: 0 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1275,16 +1275,6 @@ static bool upgradeIntrinsicFunction1(Function *F, Function *&NewFn,
12751275
else if (Name.consume_front("rotate."))
12761276
// nvvm.rotate.{b32,b64,right.b64}
12771277
Expand = Name == "b32" || Name == "b64" || Name == "right.b64";
1278-
else if (Name.consume_front("ptr.gen.to."))
1279-
// nvvm.ptr.gen.to.{local,shared,global,constant}
1280-
Expand = Name.starts_with("local") || Name.starts_with("shared") ||
1281-
Name.starts_with("global") || Name.starts_with("constant");
1282-
else if (Name.consume_front("ptr."))
1283-
// nvvm.ptr.{local,shared,global,constant}.to.gen
1284-
Expand =
1285-
(Name.consume_front("local") || Name.consume_front("shared") ||
1286-
Name.consume_front("global") || Name.consume_front("constant")) &&
1287-
Name.starts_with(".to.gen");
12881278
else
12891279
Expand = false;
12901280

@@ -2348,15 +2338,6 @@ static Value *upgradeNVVMIntrinsicCall(StringRef Name, CallBase *CI,
23482338
Value *ZExtShiftAmt = Builder.CreateZExt(CI->getOperand(1), Int64Ty);
23492339
Rep = Builder.CreateIntrinsic(Int64Ty, Intrinsic::fshr,
23502340
{Arg, Arg, ZExtShiftAmt});
2351-
} else if ((Name.consume_front("ptr.gen.to.") &&
2352-
(Name.starts_with("local") || Name.starts_with("shared") ||
2353-
Name.starts_with("global") || Name.starts_with("constant"))) ||
2354-
(Name.consume_front("ptr.") &&
2355-
(Name.consume_front("local") || Name.consume_front("shared") ||
2356-
Name.consume_front("global") ||
2357-
Name.consume_front("constant")) &&
2358-
Name.starts_with(".to.gen"))) {
2359-
Rep = Builder.CreateAddrSpaceCast(CI->getArgOperand(0), CI->getType());
23602341
} else {
23612342
Intrinsic::ID IID = shouldUpgradeNVPTXBF16Intrinsic(Name);
23622343
if (IID != Intrinsic::not_intrinsic &&

‎llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp

Lines changed: 30 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1109,38 +1109,38 @@ void NVPTXDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) {
11091109
AddrSpaceCastSDNode *CastN = cast<AddrSpaceCastSDNode>(N);
11101110
unsigned SrcAddrSpace = CastN->getSrcAddressSpace();
11111111
unsigned DstAddrSpace = CastN->getDestAddressSpace();
1112-
SDLoc DL(N);
11131112
assert(SrcAddrSpace != DstAddrSpace &&
11141113
"addrspacecast must be between different address spaces");
11151114

11161115
if (DstAddrSpace == ADDRESS_SPACE_GENERIC) {
11171116
// Specific to generic
1118-
1119-
if (TM.is64Bit() && TM.getPointerSizeInBits(SrcAddrSpace) == 32) {
1120-
SDValue CvtNone =
1121-
CurDAG->getTargetConstant(NVPTX::PTXCvtMode::NONE, DL, MVT::i32);
1122-
SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_u64_u32, DL, MVT::i64,
1123-
Src, CvtNone);
1124-
Src = SDValue(Cvt, 0);
1125-
}
1126-
11271117
unsigned Opc;
11281118
switch (SrcAddrSpace) {
11291119
default: report_fatal_error("Bad address space in addrspacecast");
11301120
case ADDRESS_SPACE_GLOBAL:
11311121
Opc = TM.is64Bit() ? NVPTX::cvta_global_64 : NVPTX::cvta_global;
11321122
break;
11331123
case ADDRESS_SPACE_SHARED:
1134-
Opc = TM.is64Bit() ? NVPTX::cvta_shared_64 : NVPTX::cvta_shared;
1124+
Opc = TM.is64Bit() ? (TM.getPointerSizeInBits(SrcAddrSpace) == 32
1125+
? NVPTX::cvta_shared_6432
1126+
: NVPTX::cvta_shared_64)
1127+
: NVPTX::cvta_shared;
11351128
break;
11361129
case ADDRESS_SPACE_CONST:
1137-
Opc = TM.is64Bit() ? NVPTX::cvta_const_64 : NVPTX::cvta_const;
1130+
Opc = TM.is64Bit() ? (TM.getPointerSizeInBits(SrcAddrSpace) == 32
1131+
? NVPTX::cvta_const_6432
1132+
: NVPTX::cvta_const_64)
1133+
: NVPTX::cvta_const;
11381134
break;
11391135
case ADDRESS_SPACE_LOCAL:
1140-
Opc = TM.is64Bit() ? NVPTX::cvta_local_64 : NVPTX::cvta_local;
1136+
Opc = TM.is64Bit() ? (TM.getPointerSizeInBits(SrcAddrSpace) == 32
1137+
? NVPTX::cvta_local_6432
1138+
: NVPTX::cvta_local_64)
1139+
: NVPTX::cvta_local;
11411140
break;
11421141
}
1143-
ReplaceNode(N, CurDAG->getMachineNode(Opc, DL, N->getValueType(0), Src));
1142+
ReplaceNode(N, CurDAG->getMachineNode(Opc, SDLoc(N), N->getValueType(0),
1143+
Src));
11441144
return;
11451145
} else {
11461146
// Generic to specific
@@ -1153,28 +1153,30 @@ void NVPTXDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) {
11531153
Opc = TM.is64Bit() ? NVPTX::cvta_to_global_64 : NVPTX::cvta_to_global;
11541154
break;
11551155
case ADDRESS_SPACE_SHARED:
1156-
Opc = TM.is64Bit() ? NVPTX::cvta_to_shared_64 : NVPTX::cvta_to_shared;
1156+
Opc = TM.is64Bit() ? (TM.getPointerSizeInBits(DstAddrSpace) == 32
1157+
? NVPTX::cvta_to_shared_3264
1158+
: NVPTX::cvta_to_shared_64)
1159+
: NVPTX::cvta_to_shared;
11571160
break;
11581161
case ADDRESS_SPACE_CONST:
1159-
Opc = TM.is64Bit() ? NVPTX::cvta_to_const_64 : NVPTX::cvta_to_const;
1162+
Opc = TM.is64Bit() ? (TM.getPointerSizeInBits(DstAddrSpace) == 32
1163+
? NVPTX::cvta_to_const_3264
1164+
: NVPTX::cvta_to_const_64)
1165+
: NVPTX::cvta_to_const;
11601166
break;
11611167
case ADDRESS_SPACE_LOCAL:
1162-
Opc = TM.is64Bit() ? NVPTX::cvta_to_local_64 : NVPTX::cvta_to_local;
1168+
Opc = TM.is64Bit() ? (TM.getPointerSizeInBits(DstAddrSpace) == 32
1169+
? NVPTX::cvta_to_local_3264
1170+
: NVPTX::cvta_to_local_64)
1171+
: NVPTX::cvta_to_local;
11631172
break;
11641173
case ADDRESS_SPACE_PARAM:
1165-
Opc = TM.is64Bit() ? NVPTX::IMOV64rr : NVPTX::IMOV32rr;
1174+
Opc = TM.is64Bit() ? NVPTX::nvvm_ptr_gen_to_param_64
1175+
: NVPTX::nvvm_ptr_gen_to_param;
11661176
break;
11671177
}
1168-
1169-
SDNode *CVTA = CurDAG->getMachineNode(Opc, DL, N->getValueType(0), Src);
1170-
if (TM.is64Bit() && TM.getPointerSizeInBits(DstAddrSpace) == 32) {
1171-
SDValue CvtNone =
1172-
CurDAG->getTargetConstant(NVPTX::PTXCvtMode::NONE, DL, MVT::i32);
1173-
CVTA = CurDAG->getMachineNode(NVPTX::CVT_u32_u64, DL, MVT::i32,
1174-
SDValue(CVTA, 0), CvtNone);
1175-
}
1176-
1177-
ReplaceNode(N, CVTA);
1178+
ReplaceNode(N, CurDAG->getMachineNode(Opc, SDLoc(N), N->getValueType(0),
1179+
Src));
11781180
return;
11791181
}
11801182
}

‎llvm/lib/Target/NVPTX/NVPTXInstrInfo.td

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -174,6 +174,10 @@ def hasSM90a : Predicate<"Subtarget->getFullSmVersion() == 901">;
174174
def hasSHFL : Predicate<"!(Subtarget->getSmVersion() >= 70"
175175
"&& Subtarget->getPTXVersion() >= 64)">;
176176

177+
def useShortPtrLocal : Predicate<"TM.is64Bit() && TM.getPointerSizeInBits(ADDRESS_SPACE_LOCAL) == 32">;
178+
def useShortPtrShared : Predicate<"TM.is64Bit() && TM.getPointerSizeInBits(ADDRESS_SPACE_SHARED) == 32">;
179+
def useShortPtrConst : Predicate<"TM.is64Bit() && TM.getPointerSizeInBits(ADDRESS_SPACE_CONST) == 32">;
180+
177181
def useFP16Math: Predicate<"Subtarget->allowFP16Math()">;
178182
def hasBF16Math: Predicate<"Subtarget->hasBF16Math()">;
179183

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