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[MIR] Reset unique MBB numbering in MachineFunction::reset()
No need to waste space nor number MBBs differently if MF gets recreated. Reviewers: qcolombet, stoklund, t.p.northover, bogner, javed.absar Reviewed By: qcolombet Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46078 llvm-svn: 331213
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llvm/lib/CodeGen/MachineFunction.cpp

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@@ -196,6 +196,7 @@ void MachineFunction::clear() {
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// Do call MachineBasicBlock destructors, it contains std::vectors.
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for (iterator I = begin(), E = end(); I != E; I = BasicBlocks.erase(I))
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I->Insts.clearAndLeakNodesUnsafely();
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MBBNumbering.clear();
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InstructionRecycler.clear(Allocator);
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OperandRecycler.clear(Allocator);

llvm/test/CodeGen/MIR/AArch64/print-parse-verify-failedISel-property.mir

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@@ -14,6 +14,7 @@
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# 5) It's possible to start llc mid-GlobalISel pipeline from a MIR file with
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# the FailedISel property set to true and watch it properly fallback to
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# FastISel / SelectionDAG ISel.
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# 6) Resetting a MachineFunction resets unique MachineBasicBlock IDs as well.
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--- |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--"
@@ -40,17 +41,21 @@ regBankSelected: true
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failedISel: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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bb.0.entry:
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liveins: $w0, $w1
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; CHECK: liveins: $w0, $w1
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;
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
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; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[COPY1]], [[COPY]]
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; CHECK: $w0 = COPY [[ADD]](s32)
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; CHECK: RET_ReallyLR implicit $w0
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;
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; FALLBACK: liveins: $w0, $w1
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; FALLBACK: body: |
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; FALLBACK-NEXT: bb.0.entry:
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; FALLBACK-NEXT: liveins: $w0, $w1
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;
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; FALLBACK: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
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; FALLBACK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
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; FALLBACK: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]

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