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Yuanfang Chen
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[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipeline
Following up on D67687. Please refer to the RFC here http://lists.llvm.org/pipermail/llvm-dev/2020-July/143309.html `CodeGenPassBuilder` is the NPM counterpart of `TargetPassConfig` with below differences. - Debugging features (MIR print/verify, disable pass, start/stop-before/after, etc.) living in `TargetPassConfig` are moved to use PassInstrument as much as possible. (Implementation also lives in `TargetPassConfig.cpp`) - `TargetPassConfig` is a polymorphic base (virtual inheritance) to build the target-dependent pipeline whereas `CodeGenPassBuilder` is the CRTP base/helper to implement the target-dependent pipeline. The motivation is flexibility for targets to customize the pipeline, inlining opportunity, and fits the overall NPM value semantics design. - `TargetPassConfig` is a legacy immutable pass to declare hooks for targets to customize some target-independent codegen layer behavior. This is partially ported to TargetMachine::options. The rest, such as `createMachineScheduler/createPostMachineScheduler`, are left out for now. They should be implemented in LLVMTargetMachine in the future. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D83608
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//===- CGPassBuilderOption.h - Options for pass builder ---------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the options influencing building of codegen pipeline.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_CGPASSBUILDEROPTION_H
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#define LLVM_CODEGEN_CGPASSBUILDEROPTION_H
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#include "llvm/ADT/Optional.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Target/TargetOptions.h"
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#include <vector>
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namespace llvm {
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class TargetMachine;
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enum class RunOutliner { TargetDefault, AlwaysOutline, NeverOutline };
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enum class RegAllocType { Default, Basic, Fast, Greedy, PBQP };
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enum class CFLAAType { None, Steensgaard, Andersen, Both };
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// Not one-on-one but mostly corresponding to commandline options in
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// TargetPassConfig.cpp
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struct CGPassBuilderOption {
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// Enable optimized register allocation compilation path
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Optional<bool> OptimizeRegAlloc;
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// Enable interprocedural register allocation to reduce load/store at
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// procedure calls
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Optional<bool> EnableIPRA;
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// Enable debug logging of pass pipeline
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bool DebugPM = false;
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// Disable machine function verification
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bool DisableVerify = false;
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// Fold null checks into faulting memory operations
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bool EnableImplicitNullChecksPass = false;
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// Collect probability-driven block placement stats
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bool EnableMachineBlockPlacementStatsPass = false;
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// Run MachineScheduler post regalloc (independent of preRA sched)
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bool EnablePostMachineSchedulerPass = false;
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// Run live interval analysis earlier in the pipeline
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bool EnableLiveIntervalsPass = false;
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// Disable Loop Strength Reduction Pass
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bool DisableLoopStrengthReducePass = false;
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// Disable Codegen Prepare
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bool DisableCodeGenPreparePass = false;
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// Disable MergeICmps Pass
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bool DisableMergeICmpsPass = false;
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// Disable Partial Libcall Inlining Pass
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bool DisablePartiallyInlineLibCallsPass = false;
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// Disable ConstantHoisting Pass
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bool DisableConstantHoistingPass = false;
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// Print LLVM IR produced by the loop-reduce pass
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bool PrintAfterLSR = false;
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// Print LLVM IR input to isel pass
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bool PrintISelInput = false;
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// Dump garbage collector data
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bool PrintGCInfo = false;
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// Enable codegen in SCC order.
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bool RequiresCodeGenSCCOrder = false;
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// Enable the machine outliner
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RunOutliner EnableMachineOutliner = RunOutliner::TargetDefault;
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// Register allocator to use
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RegAllocType RegAlloc = RegAllocType::Default;
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// Experimental option to use CFL-AA in codegen
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CFLAAType UseCFLAA = CFLAAType::None;
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// Enable abort calls when "global" instruction selection fails to
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// lower/select an instruction
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Optional<GlobalISelAbortMode> EnableGlobalISelAbort;
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// Verify generated machine code"
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Optional<bool> VerifyMachineCode;
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// Enable the "fast" instruction selector
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Optional<bool> EnableFastISelOption;
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// Enable the "global" instruction selector
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Optional<bool> EnableGlobalISelOption;
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};
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CGPassBuilderOption getCGPassBuilderOption();
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} // namespace llvm
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#endif // LLVM_CODEGEN_CGPASSBUILDEROPTION_H

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