[AArch64] Update tests for stack-probing (#102181)

Compiler can re-order instructions (keeping opcode register
dependencies) around code generated for stack probing. This leads to
correct generation of code, but failing tests. Changing some
CHECK-NEXT's to CHECK-DAG.

Author: matthewlevy97

llvm/test/CodeGen/AArch64/stack-probing-dynamic.ll

@@ -59,10 +59,11 @@ define void @dynamic_fixed(i64 %size, ptr %out1, ptr %out2) #0 {
 ; CHECK-NEXT:    str xzr, [sp, #-64]!
 ; CHECK-NEXT:    add x9, x0, #15
 ; CHECK-NEXT:    mov x8, sp
-; CHECK-NEXT:    sub x10, x29, #64
-; CHECK-NEXT:    and x9, x9, #0xfffffffffffffff0
-; CHECK-NEXT:    str x10, [x1]
-; CHECK-NEXT:    sub x8, x8, x9
+; CHECK-DAG:     sub x10, x29, #64
+; CHECK-DAG:     and x9, x9, #0xfffffffffffffff0
+; CHECK-NOT:     INVALID_TO_BREAK_UP_CHECK_DAG
+; CHECK-DAG:     str x10, [x1]
+; CHECK-DAG:     sub x8, x8, x9
 ; CHECK-NEXT:  .LBB1_1: // =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    sub sp, sp, #1, lsl #12 // =4096
 ; CHECK-NEXT:    cmp sp, x8
@@ -108,10 +109,11 @@ define void @dynamic_align_64(i64 %size, ptr %out) #0 {
 ; CHECK-NEXT:    and sp, x9, #0xffffffffffffffc0
 ; CHECK-NEXT:    add x9, x0, #15
 ; CHECK-NEXT:    mov x8, sp
-; CHECK-NEXT:    str xzr, [sp]
-; CHECK-NEXT:    and x9, x9, #0xfffffffffffffff0
-; CHECK-NEXT:    mov x19, sp
-; CHECK-NEXT:    sub x8, x8, x9
+; CHECK-DAG:     str xzr, [sp]
+; CHECK-DAG:     and x9, x9, #0xfffffffffffffff0
+; CHECK-NOT:     INVALID_TO_BREAK_UP_CHECK_DAG
+; CHECK-DAG:     mov x19, sp
+; CHECK-DAG:     sub x8, x8, x9
 ; CHECK-NEXT:    and x8, x8, #0xffffffffffffffc0
 ; CHECK-NEXT:  .LBB2_1: // =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    sub sp, sp, #1, lsl #12 // =4096
@@ -167,10 +169,11 @@ define void @dynamic_align_8192(i64 %size, ptr %out) #0 {
 ; CHECK-NEXT:    mov sp, x9
 ; CHECK-NEXT:    add x9, x0, #15
 ; CHECK-NEXT:    mov x8, sp
-; CHECK-NEXT:    ldr xzr, [sp]
-; CHECK-NEXT:    and x9, x9, #0xfffffffffffffff0
-; CHECK-NEXT:    mov x19, sp
-; CHECK-NEXT:    sub x8, x8, x9
+; CHECK-DAG:     ldr xzr, [sp]
+; CHECK-DAG:     and x9, x9, #0xfffffffffffffff0
+; CHECK-NOT:     INVALID_TO_BREAK_UP_CHECK_DAG
+; CHECK-DAG:     mov x19, sp
+; CHECK-DAG:     sub x8, x8, x9
 ; CHECK-NEXT:    and x8, x8, #0xffffffffffffe000
 ; CHECK-NEXT:  .LBB3_4: // =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    sub sp, sp, #1, lsl #12 // =4096
@@ -331,8 +334,8 @@ define void @dynamic_sve(i64 %size, ptr %out) #0 "target-features"="+sve" {
 ; CHECK-NEXT:    .cfi_offset w29, -32
 ; CHECK-NEXT:    rdvl x9, #1
 ; CHECK-NEXT:    mov x10, #15 // =0xf
-; CHECK-NEXT:    mov x8, sp
-; CHECK-NEXT:    madd x9, x0, x9, x10
+; CHECK-DAG:     mov x8, sp
+; CHECK-DAG:     madd x9, x0, x9, x10
 ; CHECK-NEXT:    and x9, x9, #0xfffffffffffffff0
 ; CHECK-NEXT:    sub x8, x8, x9
 ; CHECK-NEXT:  .LBB7_1: // =>This Inner Loop Header: Depth=1
@@ -361,3 +364,4 @@ define void @dynamic_sve(i64 %size, ptr %out) #0 "target-features"="+sve" {
 }
 
 attributes #0 = { uwtable(async) "probe-stack"="inline-asm" "frame-pointer"="none" }
+