@@ -92,7 +92,7 @@ define dso_local void @_Z8zeroInitv() #0 !dbg !31 {
92
92
entry:
93
93
%Z = alloca [3 x i32 ], align 4
94
94
; CHECK: %Z = alloca [3 x i32], align 4, !DIAssignID ![[ID_0:[0-9]+]]
95
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_0:[0-9]+]], !DIExpression(), ![[ID_0]], ptr %Z, !DIExpression(),
95
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_0:[0-9]+]], !DIExpression(), ![[ID_0]], ptr %Z, !DIExpression(),
96
96
%0 = bitcast ptr %Z to ptr , !dbg !39
97
97
call void @llvm.lifetime.start.p0 (i64 12 , ptr %0 ) #5 , !dbg !39
98
98
call void @llvm.dbg.declare (metadata ptr %Z , metadata !35 , metadata !DIExpression ()), !dbg !40
@@ -110,21 +110,21 @@ entry:
110
110
;; void memcpyInit() { int A[4] = {0, 1, 2, 3}; }
111
111
;;
112
112
;; Check that we get two dbg.assign intrinsics. The first linked to the alloca
113
- ;; and the second linked to the initialising memcpy, which should have an Undef
113
+ ;; and the second linked to the initialising memcpy, which should have a poison
114
114
;; value component.
115
115
define dso_local void @_Z10memcpyInitv () #0 !dbg !42 {
116
116
; CHECK-LABEL: define dso_local void @_Z10memcpyInitv
117
117
entry:
118
118
%A = alloca [4 x i32 ], align 16
119
119
; CHECK: %A = alloca [4 x i32], align 16, !DIAssignID ![[ID_2:[0-9]+]]
120
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_1:[0-9]+]], !DIExpression(), ![[ID_2]], ptr %A, !DIExpression(),
120
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_1:[0-9]+]], !DIExpression(), ![[ID_2]], ptr %A, !DIExpression(),
121
121
%0 = bitcast ptr %A to ptr , !dbg !48
122
122
call void @llvm.lifetime.start.p0 (i64 16 , ptr %0 ) #5 , !dbg !48
123
123
call void @llvm.dbg.declare (metadata ptr %A , metadata !44 , metadata !DIExpression ()), !dbg !49
124
124
%1 = bitcast ptr %A to ptr , !dbg !49
125
125
call void @llvm.memcpy.p0.p0.i64 (ptr align 16 %1 , ptr align 16 @__const._Z10memcpyInitv.A , i64 16 , i1 false ), !dbg !49
126
126
; CHECK: @llvm.memcpy{{.*}}, !DIAssignID ![[ID_3:[0-9]+]]
127
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_1]], !DIExpression(), ![[ID_3]], ptr %1, !DIExpression(),
127
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_1]], !DIExpression(), ![[ID_3]], ptr %1, !DIExpression(),
128
128
%2 = bitcast ptr %A to ptr , !dbg !50
129
129
call void @llvm.lifetime.end.p0 (i64 16 , ptr %2 ) #5 , !dbg !50
130
130
ret void , !dbg !50
@@ -146,7 +146,7 @@ define dso_local void @_Z8setFieldv() #0 !dbg !51 {
146
146
entry:
147
147
%O = alloca %struct.Outer , align 4
148
148
; CHECK: %O = alloca %struct.Outer, align 4, !DIAssignID ![[ID_4:[0-9]+]]
149
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_2:[0-9]+]], !DIExpression(), ![[ID_4]], ptr %O, !DIExpression(),
149
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_2:[0-9]+]], !DIExpression(), ![[ID_4]], ptr %O, !DIExpression(),
150
150
%0 = bitcast ptr %O to ptr , !dbg !58
151
151
call void @llvm.lifetime.start.p0 (i64 16 , ptr %0 ) #5 , !dbg !58
152
152
call void @llvm.dbg.declare (metadata ptr %O , metadata !53 , metadata !DIExpression ()), !dbg !59
@@ -178,7 +178,7 @@ define dso_local void @_Z13unknownOffsetv() #0 !dbg !72 {
178
178
entry:
179
179
%A = alloca [2 x i32 ], align 4
180
180
; CHECK: %A = alloca [2 x i32], align 4, !DIAssignID ![[ID_6:[0-9]+]]
181
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_3:[0-9]+]], !DIExpression(), ![[ID_6]], ptr %A, !DIExpression(),
181
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_3:[0-9]+]], !DIExpression(), ![[ID_6]], ptr %A, !DIExpression(),
182
182
%0 = bitcast ptr %A to ptr , !dbg !78
183
183
call void @llvm.lifetime.start.p0 (i64 8 , ptr %0 ) #5 , !dbg !78
184
184
call void @llvm.dbg.declare (metadata ptr %A , metadata !74 , metadata !DIExpression ()), !dbg !79
@@ -209,8 +209,8 @@ define dso_local i64 @_Z12sharedAllocav() #0 !dbg !85 {
209
209
entry:
210
210
%retval = alloca %struct.Inner , align 4
211
211
; CHECK: %retval = alloca %struct.Inner, align 4, !DIAssignID ![[ID_7:[0-9]+]]
212
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_4:[0-9]+]], !DIExpression(), ![[ID_7]], ptr %retval, !DIExpression(),
213
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_5:[0-9]+]], !DIExpression(), ![[ID_7]], ptr %retval, !DIExpression(),
212
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_4:[0-9]+]], !DIExpression(), ![[ID_7]], ptr %retval, !DIExpression(),
213
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_5:[0-9]+]], !DIExpression(), ![[ID_7]], ptr %retval, !DIExpression(),
214
214
%0 = load i32 , ptr @Cond , align 4 , !dbg !94 , !tbaa !61
215
215
%tobool = icmp ne i32 %0 , 0 , !dbg !94
216
216
br i1 %tobool , label %if.then , label %if.else , !dbg !95
@@ -221,8 +221,8 @@ if.then: ; preds = %entry
221
221
%1 = bitcast ptr %retval to ptr , !dbg !97
222
222
call void @llvm.memcpy.p0.p0.i64 (ptr align 4 %1 , ptr align 4 @InnerA , i64 8 , i1 false ), !dbg !97 , !tbaa.struct !98
223
223
; CHECK: call void @llvm.memcpy{{.*}}, !DIAssignID ![[ID_8:[0-9]+]]
224
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_4]], !DIExpression(), ![[ID_8]], ptr %1, !DIExpression(),
225
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_5]], !DIExpression(), ![[ID_8]], ptr %1, !DIExpression(),
224
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_4]], !DIExpression(), ![[ID_8]], ptr %1, !DIExpression(),
225
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_5]], !DIExpression(), ![[ID_8]], ptr %1, !DIExpression(),
226
226
br label %return , !dbg !99
227
227
228
228
if.else: ; preds = %entry
@@ -231,8 +231,8 @@ if.else: ; preds = %entry
231
231
%2 = bitcast ptr %retval to ptr , !dbg !101
232
232
call void @llvm.memcpy.p0.p0.i64 (ptr align 4 %2 , ptr align 4 @InnerB , i64 8 , i1 false ), !dbg !101 , !tbaa.struct !98
233
233
; CHECK: call void @llvm.memcpy{{.*}}, !DIAssignID ![[ID_9:[0-9]+]]
234
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_4]], !DIExpression(), ![[ID_9]], ptr %2, !DIExpression(),
235
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_5]], !DIExpression(), ![[ID_9]], ptr %2, !DIExpression(),
234
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_4]], !DIExpression(), ![[ID_9]], ptr %2, !DIExpression(),
235
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_5]], !DIExpression(), ![[ID_9]], ptr %2, !DIExpression(),
236
236
br label %return , !dbg !102
237
237
238
238
return: ; preds = %if.else, %if.then
@@ -312,10 +312,10 @@ define dso_local noundef i32 @_Z3funi(i32 noundef %X) !dbg !139 {
312
312
entry:
313
313
%Y.addr.i = alloca i32 , align 4
314
314
; CHECK: %Y.addr.i = alloca i32, align 4, !DIAssignID ![[ID_10:[0-9]+]]
315
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_6:[0-9]+]], !DIExpression(), ![[ID_10]], ptr %Y.addr.i, !DIExpression(), ![[DBG_0:[0-9]+]]
315
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_6:[0-9]+]], !DIExpression(), ![[ID_10]], ptr %Y.addr.i, !DIExpression(), ![[DBG_0:[0-9]+]]
316
316
%X.addr = alloca i32 , align 4
317
317
; CHECK-NEXT: %X.addr = alloca i32, align 4, !DIAssignID ![[ID_11:[0-9]+]]
318
- ; CHECK-NEXT: #dbg_assign(i1 undef , ![[VAR_7:[0-9]+]], !DIExpression(), ![[ID_11]], ptr %X.addr, !DIExpression(), ![[DBG_1:[0-9]+]]
318
+ ; CHECK-NEXT: #dbg_assign(i1 poison , ![[VAR_7:[0-9]+]], !DIExpression(), ![[ID_11]], ptr %X.addr, !DIExpression(), ![[DBG_1:[0-9]+]]
319
319
store i32 %X , ptr %X.addr , align 4
320
320
; CHECK-NEXT: store i32 %X, ptr %X.addr, align 4, !DIAssignID ![[ID_12:[0-9]+]]
321
321
; CHECK-NEXT: #dbg_assign(i32 %X, ![[VAR_7]], !DIExpression(), ![[ID_12]], ptr %X.addr, !DIExpression(), ![[DBG_1]]
0 commit comments