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Commit b9ce924

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author
Chad Rosier
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[AArch64] Check Dest Register Liveness in CondOpt pass.
Our internal test reveals such case should not be transformed: cmp x17, #3 b.lt .LBB10_15 ... subs x12, x12, #1 b.gt .LBB10_1 where x12 is a liveout, becomes: cmp x17, #2 b.le .LBB10_15 ... subs x12, x12, #2 b.ge .LBB10_1 Unable to provide test case as it's difficult to reproduce on community branch. http://reviews.llvm.org/D6048 Patch by Zhaoshi Zheng <zhaoshiz@codeaurora.org>! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220987 91177308-0d34-0410-b5e6-96231b3b80d8
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lib/Target/AArch64/AArch64ConditionOptimizer.cpp

Lines changed: 12 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,7 @@
6262
#include "llvm/ADT/DepthFirstIterator.h"
6363
#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
65+
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
@@ -115,6 +116,7 @@ void initializeAArch64ConditionOptimizerPass(PassRegistry &);
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INITIALIZE_PASS_BEGIN(AArch64ConditionOptimizer, "aarch64-condopt",
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"AArch64 CondOpt Pass", false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
119+
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
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INITIALIZE_PASS_END(AArch64ConditionOptimizer, "aarch64-condopt",
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"AArch64 CondOpt Pass", false, false)
120122

@@ -125,6 +127,8 @@ FunctionPass *llvm::createAArch64ConditionOptimizerPass() {
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void AArch64ConditionOptimizer::getAnalysisUsage(AnalysisUsage &AU) const {
126128
AU.addRequired<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
130+
AU.addRequired<LiveIntervals>();
131+
AU.addPreserved<LiveIntervals>();
128132
MachineFunctionPass::getAnalysisUsage(AU);
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}
130134

@@ -134,13 +138,11 @@ void AArch64ConditionOptimizer::getAnalysisUsage(AnalysisUsage &AU) const {
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MachineInstr *AArch64ConditionOptimizer::findSuitableCompare(
135139
MachineBasicBlock *MBB) {
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MachineBasicBlock::iterator I = MBB->getFirstTerminator();
137-
if (I == MBB->end()) {
141+
if (I == MBB->end())
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return nullptr;
139-
}
140143

141-
if (I->getOpcode() != AArch64::Bcc) {
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return nullptr;
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}
144+
if (I->getOpcode() != AArch64::Bcc)
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return nullptr;
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// Now find the instruction controlling the terminator.
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for (MachineBasicBlock::iterator B = MBB->begin(); I != B;) {
@@ -153,7 +155,11 @@ MachineInstr *AArch64ConditionOptimizer::findSuitableCompare(
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// cmn is an alias for adds with a dead destination register.
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case AArch64::ADDSWri:
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case AArch64::ADDSXri:
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return I;
158+
if (I->getOperand(0).isDead())
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return I;
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DEBUG(dbgs() << "Destination of cmp is not dead, " << *I << '\n');
162+
return nullptr;
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158164
// Prevent false positive case like:
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// cmp w19, #0

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