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Mikhail Moiseev edited this page Nov 6, 2020 · 51 revisions

This pages explains building and installation of ICSC on Linux OS. In the following description Ubuntu 20.4 is used, all operations are given for bash terminal.

Preparing environment

It needs to have/install:

  • C++ compiler supports C++17, default Ubuntu C++ compiler is g++ 9.3.0 that works fine
  • CMake version 3.12 or later, default Ubuntu CMake version is 3.16
  • git to clone ICSC repository

Setup some folder as $ICSC_HOME and clone ISCS source repository to $ICSC_HOME/icsc:

$ export ICSC_HOME=/home/user/my_iscs_folder
$ git clone https://github.com/intel/systemc-compiler $ICSC_HOME/icsc

Before installation there is the following folder structure:

 $ICSC_HOME
   * icsc      
        * cmake          -- CMake files
        * components     -- assertions, fifo and other library components
        * designs        -- folder for user designs with an design template
        * doc            -- user guide latex and pdf files
        * examples       -- a few illustrative examples 
        * sc_elab        -- elaborator sources 
        * sc_tool        -- ISCS sources  
        * systemc        -- patched SystemC 2.3.3 sources
        * tests          -- unit tests 
        * .gitmodules    -- not intended to be used here, can be removed
        * CMakeLists.txt -- Cmake file for ICSC tool
        * LICENSE.txt    -- Apache 2.0 WITH LLVM exceptions license
        * README.md      -- Tool description
        * install.sh     -- Installation script

There are two ways how to install ICSC:

  • Installation with install.sh
  • Manual installation

Installation with install.sh

The install.sh script contains all the stages of manual installation, that includes generating SystemVerilog code for examples.

Open bash terminal and run icsc/install.sh from $ICSC_HOME folder:

$ cd $ICSC_HOME/icsc
$ ./install.sh

Manual installation

Preparing dependencies

It needs to have:

Download Protobuf, LLVM and Clang into $ICSC_HOME folder.

Building and installing Protobuf

$ cd $ICSC_HOME/protobuf-3.13.0
$ mkdir build && cd build
$ cmake ../cmake/ -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=$ICSC_HOME -DBUILD_SHARED_LIBS=ON
$ make -j8
$ make install

Building and installing LLVM/Clang

It needs to put Clang source cfe-7.0.0.src into llvm-7.0.0.src/tools done by first command below.

$ mv $ICSC_HOME/cfe-7.0.0.src $ICSC_HOME/llvm-7.0.0.src/tools/clang
$ cd $ICSC_HOME/llvm-7.0.0.src
$ mkdir build && cd build
$ cmake ../ -DLLVM_ENABLE_ASSERTIONS=ON -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=$ICSC_HOME
$ make -j8
$ make install

Building and installing ICSC

$ cd $ICSC_HOME/icsc
$ mkdir build && cd build
$ cmake ../ -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=$ICSC_HOME
$ make -j8
$ make install

Generating SystemVerilog code for examples, tests and designs

$ cd $ICSC_HOME
$ source setenv.sh                   # setup path to SVC package
$ mkdir build && cd build
$ cmake ../                          # prepare Makefiles 
$ ctest -j8                          # compile and run SV generation

Folders and files after installation

After installation there is the following folder structure:

 $ICSC_HOME
   * bin                 -- binary utilities, can be removed
   * build               -- build folder, can be removed
   * icsc                -- ICSC sources
        * build          -- build folder, can be removed        
        * cmake          -- CMake files
        * components     -- assertions, fifo and other library components
        * designs        -- folder for user designs with an design template
        * doc            -- user guide latex and pdf files
        * examples       -- a few illustrative examples 
        * sc_elab        -- elaborator sources 
        * sc_tool        -- ISCS sources  
        * systemc        -- patched SystemC 2.3.3 sources
        * tests          -- unit tests 
        * .gitmodules    -- not intended to be used here, can be removed
        * CMakeLists.txt -- Cmake file for ICSC tool
        * LICENSE.txt    -- Apache 2.0 WITH LLVM exceptions license
        * README.md      -- Tool description
        * install.sh     -- Installation script
   * include             -- LLVM/Clang, SystemC and other headers
   * lib                 -- tool compiled libraries
   * libexec             -- can be removed
   * lib64               -- tool compiled libraries
   * share               -- can be removed  
   * CMakeLists.txt      -- CMake file for examples, tests and user designs
   * README              -- build and run examples, tests and used designs description
   * setenv.sh           -- set environment script for bash terminal

Run examples and tests

There are number of examples in examples sub-folder:

  • asserts -- immediate and temporal SystemC assertions with SVA generation
  • counter -- simple counter with SC_METHOD and SC_CTHREAD processes
  • decoder -- configurable FIFO example
  • dvcon20 -- assertion performance evaluation examples
  • fsm -- finite state machine coding
  • intrinsic -- Verilog code intrinsic example
  • int_error -- error reporting example, dangling pointer de-reference inside
  • latch_ff -- simple latch and flip flop with asynchronous reset

There are number of unit tests in tests sub-folder:

  • const_prop -- constant propagation analysis tests
  • cthread -- general tests in SC_CTHREAD
  • elab_only -- dynamic elaborator tests
  • method -- general tests in SC_METHOD
  • mif -- modular interface tests
  • misc -- extra tests
  • record -- local and members of struct and class type
  • state -- state tests
  • uniquify -- module uniquification tests

After generation SV code by install.sh or manually, the generated SV files are put into sv_out folders. For counter example:

$ cd examples/counter                # go to counter example folder 
$ cat sv_out/counter.sv              # see generated SystemVerilog file

Run SystemC simulation

SystemC simulation for examples and tests can be run with:

$ cd $ICSC_HOME
$ mkdir build && cd build
$ cmake ../                          # prepare Makefiles 
$ make counter                       # compile SystemC simulation for counter example
$ cd examples/counter                # go to counter example folder
$ ./counter                          # run SystemC simulation

Generate my design SV code

To generate SV code, the SystemC design can be placed into $ICSC_HOME\icsc\designs folder. There is an empty design template in that folder.

For example you have created MyDesign folder and put all SystemC files and CMakeLists.txt there. To add the design it needs to add MyDesign folder into $ICSC_HOME\icsc\designs\CMakeLists.txt:

...
add_subdirectory(MyDesign)
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