From d3ba84ece7f11846f5c861067039d32e781c6104 Mon Sep 17 00:00:00 2001 From: Severin Smith Date: Mon, 1 May 2017 16:10:32 -0400 Subject: [PATCH] SPI_MODE2 and SPI_MODE3 configurations inverted It appears that the configurations for `ck_out_edge` were inverted for `SPI_MODE2` and `SPI_MODE3`. You can check the technical reference manual on page 76, table 23 "Clock Polarity and Phase, and Corresponding SPI Register Values for SPI Master". I've check with my oscilloscope that the current configuration is wrong and this fix corrects the issue. --- cores/esp32/esp32-hal-spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cores/esp32/esp32-hal-spi.c b/cores/esp32/esp32-hal-spi.c index a26042b0e0a..36258d414a3 100644 --- a/cores/esp32/esp32-hal-spi.c +++ b/cores/esp32/esp32-hal-spi.c @@ -332,11 +332,11 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode) break; case SPI_MODE2: spi->dev->pin.ck_idle_edge = 1; - spi->dev->user.ck_out_edge = 0; + spi->dev->user.ck_out_edge = 1; break; case SPI_MODE3: spi->dev->pin.ck_idle_edge = 1; - spi->dev->user.ck_out_edge = 1; + spi->dev->user.ck_out_edge = 0; break; case SPI_MODE0: default: