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Update IDF libs and fix OPI PSRAM on S3
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‎tools/sdk/esp32/bin/bootloader_dio_40m.elf

-7.61 KB
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‎tools/sdk/esp32/bin/bootloader_dio_80m.elf

-7.61 KB
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‎tools/sdk/esp32/bin/bootloader_dout_40m.elf

-7.61 KB
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‎tools/sdk/esp32/bin/bootloader_dout_80m.elf

-7.61 KB
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‎tools/sdk/esp32/bin/bootloader_qio_40m.elf

-7.61 KB
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‎tools/sdk/esp32/bin/bootloader_qio_80m.elf

-7.61 KB
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‎tools/sdk/esp32/bin/bootloader_qout_40m.elf

-7.61 KB
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‎tools/sdk/esp32/bin/bootloader_qout_80m.elf

-7.61 KB
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‎tools/sdk/esp32/dio_qspi/include/sdkconfig.h

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@
3838
#define CONFIG_SOC_SECURE_BOOT_SUPPORTED 1
3939
#define CONFIG_SOC_TOUCH_SENSOR_SUPPORTED 1
4040
#define CONFIG_SOC_BOD_SUPPORTED 1
41+
#define CONFIG_SOC_ULP_FSM_SUPPORTED 1
4142
#define CONFIG_SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL 5
4243
#define CONFIG_SOC_XTAL_SUPPORT_26M 1
4344
#define CONFIG_SOC_XTAL_SUPPORT_40M 1
@@ -100,7 +101,6 @@
100101
#define CONFIG_SOC_LEDC_SUPPORT_HS_MODE 1
101102
#define CONFIG_SOC_LEDC_CHANNEL_NUM 8
102103
#define CONFIG_SOC_LEDC_TIMER_BIT_WIDTH 20
103-
#define CONFIG_SOC_LEDC_GAMMA_FADE_RANGE_MAX 1
104104
#define CONFIG_SOC_MCPWM_GROUPS 2
105105
#define CONFIG_SOC_MCPWM_TIMERS_PER_GROUP 3
106106
#define CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP 3
@@ -187,6 +187,7 @@
187187
#define CONFIG_SOC_PM_SUPPORT_RTC_SLOW_MEM_PD 1
188188
#define CONFIG_SOC_PM_SUPPORT_RC_FAST_PD 1
189189
#define CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD 1
190+
#define CONFIG_SOC_PM_SUPPORT_MODEM_PD 1
190191
#define CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED 1
191192
#define CONFIG_SOC_CLK_APLL_SUPPORTED 1
192193
#define CONFIG_SOC_APLL_MULTIPLIER_OUT_MIN_HZ 350000000
@@ -203,6 +204,7 @@
203204
#define CONFIG_SOC_WIFI_CSI_SUPPORT 1
204205
#define CONFIG_SOC_WIFI_MESH_SUPPORT 1
205206
#define CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW 1
207+
#define CONFIG_SOC_WIFI_NAN_SUPPORT 1
206208
#define CONFIG_SOC_BLE_SUPPORTED 1
207209
#define CONFIG_SOC_BLE_MESH_SUPPORTED 1
208210
#define CONFIG_SOC_BT_CLASSIC_SUPPORTED 1
@@ -487,7 +489,8 @@
487489
#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
488490
#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
489491
#define CONFIG_ESP_PHY_MAX_TX_POWER 20
490-
#define CONFIG_ESP_PHY_REDUCE_TX_POWER 1
492+
#define CONFIG_ESP_PHY_RF_CAL_PARTIAL 1
493+
#define CONFIG_ESP_PHY_CALIBRATION_MODE 0
491494
#define CONFIG_SPIRAM 1
492495
#define CONFIG_SPIRAM_MODE_QUAD 1
493496
#define CONFIG_SPIRAM_TYPE_AUTO 1
@@ -976,7 +979,6 @@
976979
#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
977980
#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
978981
#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
979-
#define CONFIG_ESP32_REDUCE_PHY_TX_POWER CONFIG_ESP_PHY_REDUCE_TX_POWER
980982
#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
981983
#define CONFIG_ESP32_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
982984
#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC CONFIG_RTC_CLK_SRC_INT_RC
@@ -1034,7 +1036,6 @@
10341036
#define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
10351037
#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
10361038
#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
1037-
#define CONFIG_REDUCE_PHY_TX_POWER CONFIG_ESP_PHY_REDUCE_TX_POWER
10381039
#define CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE
10391040
#define CONFIG_SCAN_DUPLICATE_TYPE CONFIG_BTDM_SCAN_DUPL_TYPE
10401041
#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
@@ -1075,4 +1076,4 @@
10751076
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
10761077
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
10771078
#define CONFIG_ARDUINO_IDF_COMMIT ""
1078-
#define CONFIG_ARDUINO_IDF_BRANCH "master"
1079+
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎tools/sdk/esp32/dio_qspi/libspi_flash.a

3.93 KB
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‎tools/sdk/esp32/dout_qspi/include/sdkconfig.h

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@
3838
#define CONFIG_SOC_SECURE_BOOT_SUPPORTED 1
3939
#define CONFIG_SOC_TOUCH_SENSOR_SUPPORTED 1
4040
#define CONFIG_SOC_BOD_SUPPORTED 1
41+
#define CONFIG_SOC_ULP_FSM_SUPPORTED 1
4142
#define CONFIG_SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL 5
4243
#define CONFIG_SOC_XTAL_SUPPORT_26M 1
4344
#define CONFIG_SOC_XTAL_SUPPORT_40M 1
@@ -100,7 +101,6 @@
100101
#define CONFIG_SOC_LEDC_SUPPORT_HS_MODE 1
101102
#define CONFIG_SOC_LEDC_CHANNEL_NUM 8
102103
#define CONFIG_SOC_LEDC_TIMER_BIT_WIDTH 20
103-
#define CONFIG_SOC_LEDC_GAMMA_FADE_RANGE_MAX 1
104104
#define CONFIG_SOC_MCPWM_GROUPS 2
105105
#define CONFIG_SOC_MCPWM_TIMERS_PER_GROUP 3
106106
#define CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP 3
@@ -187,6 +187,7 @@
187187
#define CONFIG_SOC_PM_SUPPORT_RTC_SLOW_MEM_PD 1
188188
#define CONFIG_SOC_PM_SUPPORT_RC_FAST_PD 1
189189
#define CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD 1
190+
#define CONFIG_SOC_PM_SUPPORT_MODEM_PD 1
190191
#define CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED 1
191192
#define CONFIG_SOC_CLK_APLL_SUPPORTED 1
192193
#define CONFIG_SOC_APLL_MULTIPLIER_OUT_MIN_HZ 350000000
@@ -203,6 +204,7 @@
203204
#define CONFIG_SOC_WIFI_CSI_SUPPORT 1
204205
#define CONFIG_SOC_WIFI_MESH_SUPPORT 1
205206
#define CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW 1
207+
#define CONFIG_SOC_WIFI_NAN_SUPPORT 1
206208
#define CONFIG_SOC_BLE_SUPPORTED 1
207209
#define CONFIG_SOC_BLE_MESH_SUPPORTED 1
208210
#define CONFIG_SOC_BT_CLASSIC_SUPPORTED 1
@@ -487,7 +489,8 @@
487489
#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
488490
#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
489491
#define CONFIG_ESP_PHY_MAX_TX_POWER 20
490-
#define CONFIG_ESP_PHY_REDUCE_TX_POWER 1
492+
#define CONFIG_ESP_PHY_RF_CAL_PARTIAL 1
493+
#define CONFIG_ESP_PHY_CALIBRATION_MODE 0
491494
#define CONFIG_SPIRAM 1
492495
#define CONFIG_SPIRAM_MODE_QUAD 1
493496
#define CONFIG_SPIRAM_TYPE_AUTO 1
@@ -976,7 +979,6 @@
976979
#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
977980
#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
978981
#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
979-
#define CONFIG_ESP32_REDUCE_PHY_TX_POWER CONFIG_ESP_PHY_REDUCE_TX_POWER
980982
#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
981983
#define CONFIG_ESP32_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
982984
#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC CONFIG_RTC_CLK_SRC_INT_RC
@@ -1034,7 +1036,6 @@
10341036
#define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
10351037
#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
10361038
#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
1037-
#define CONFIG_REDUCE_PHY_TX_POWER CONFIG_ESP_PHY_REDUCE_TX_POWER
10381039
#define CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE
10391040
#define CONFIG_SCAN_DUPLICATE_TYPE CONFIG_BTDM_SCAN_DUPL_TYPE
10401041
#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
@@ -1075,4 +1076,4 @@
10751076
#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
10761077
#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
10771078
#define CONFIG_ARDUINO_IDF_COMMIT ""
1078-
#define CONFIG_ARDUINO_IDF_BRANCH "master"
1079+
#define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

‎tools/sdk/esp32/dout_qspi/libspi_flash.a

3.93 KB
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‎tools/sdk/esp32/flags/defines

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
-DESP_PLATFORM -DIDF_VER=\"v5.1-dev-3888-g47852846d3\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1
1+
-DESP_PLATFORM -DIDF_VER=\"v5.1-dev-4124-gbb9200acec\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1

‎tools/sdk/esp32/flags/includes

Lines changed: 1 addition & 1 deletion
Large diffs are not rendered by default.

‎tools/sdk/esp32/include/bt/esp_ble_mesh/mesh_common/include/mesh_trace.h

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,52 @@ extern "C" {
120120
#define NET_BUF_SIMPLE_ASSERT(cond)
121121
#endif
122122

123+
#if CONFIG_BLE_MESH_BQB_TEST_LOG
124+
/**
125+
* For example, the test case "MESH/NODE/TNPT/BV-01-C"
126+
* could use BT_BQB(BLE_MESH_BQB_TEST_LOG_LEVEL_PRIMARY_ID_NODE | BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_TNPT, "msg %s", msg)
127+
* to print some message.
128+
*/
129+
enum BLE_MESH_BQB_TEST_LOG_LEVEL {
130+
BLE_MESH_BQB_TEST_LOG_LEVEL_OUTPUT_ALL = 0, /* Output all BQB related test log */
131+
BLE_MESH_BQB_TEST_LOG_LEVEL_PRIMARY_ID_NODE = BIT(0),
132+
BLE_MESH_BQB_TEST_LOG_LEVEL_PRIMARY_ID_PVNR = BIT(1),
133+
BLE_MESH_BQB_TEST_LOG_LEVEL_PRIMARY_ID_CFGCL = BIT(2),
134+
BLE_MESH_BQB_TEST_LOG_LEVEL_PRIMARY_ID_SR = BIT(3),
135+
BLE_MESH_BQB_TEST_LOG_LEVEL_PRIMARY_ID_CL = BIT(4),
136+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_PBADV = BIT(5),
137+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_MPS = BIT(6),
138+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_PROV = BIT(7),
139+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_BCN = BIT(8),
140+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_NET = BIT(9),
141+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_RLY = BIT(10),
142+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_TNPT = BIT(11),
143+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_IVU = BIT(12),
144+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_KR = BIT(13),
145+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_FRND_FN = BIT(14),
146+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_FRND_LPN = BIT(15),
147+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_PROX = BIT(16),
148+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_MPXS = BIT(17),
149+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_CFG = BIT(18),
150+
BLE_MESH_BQB_TEST_LOG_LEVEL_SUB_ID_HM = BIT(19),
151+
};
152+
153+
#define BLE_MESH_BQB_TEST_LOG_LEVEL_OUTPUT_NONE 0x000FFFFF
154+
155+
#endif /* CONFIG_BLE_MESH_BQB_TEST_LOG */
156+
157+
#if (CONFIG_BLE_MESH_BQB_TEST_LOG && !CONFIG_BLE_MESH_NO_LOG)
158+
extern bool bt_mesh_bqb_test_flag_check(uint32_t flag_mask);
159+
extern int bt_mesh_bqb_test_flag_set(uint32_t value);
160+
#define BT_BQB(flag_mask, fmt, args...) \
161+
do { \
162+
if (bt_mesh_bqb_test_flag_check(flag_mask)) \
163+
BLE_MESH_PRINT_I("BLE_MESH_BQB", fmt, ## args); \
164+
} while (0)
165+
#else
166+
#define BT_BQB(flag_mask, fmt, args...)
167+
#endif
168+
123169
#ifdef __cplusplus
124170
}
125171
#endif

‎tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_avrc_api.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -294,6 +294,7 @@ typedef union {
294294
uint8_t tl; /*!< transaction label, 0 to 15 */
295295
uint8_t key_code; /*!< passthrough command code */
296296
uint8_t key_state; /*!< 0 for PRESSED, 1 for RELEASED */
297+
esp_avrc_rsp_t rsp_code; /*!< response code */
297298
} psth_rsp; /*!< passthrough command response */
298299

299300
/**

‎tools/sdk/esp32/include/driver/analog_comparator/include/driver/ana_cmpr.h

Lines changed: 186 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,186 @@
1+
/*
2+
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <stdint.h>
8+
#include <stdbool.h>
9+
#include "esp_err.h"
10+
#include "driver/ana_cmpr_types.h"
11+
12+
#ifdef __cplusplus
13+
extern "C" {
14+
#endif
15+
16+
/**
17+
* @brief Analog comparator unit configuration
18+
*
19+
*/
20+
typedef struct {
21+
ana_cmpr_unit_t unit; /*!< Analog comparator unit */
22+
ana_cmpr_clk_src_t clk_src; /*!< The clock source of the analog comparator,
23+
* which decide the resolution of the comparator
24+
*/
25+
ana_cmpr_ref_source_t ref_src; /*!< Reference signal source of the comparator,
26+
* select using ANA_CMPR_REF_SRC_INTERNAL or ANA_CMPR_REF_SRC_EXTERNAL.
27+
* For internal reference, the reference voltage should be set to `internal_ref_volt`,
28+
* for external reference, the reference signal should be connect to `ANA_CMPRx_EXT_REF_GPIO`
29+
*/
30+
ana_cmpr_cross_type_t cross_type; /*!< The crossing types that can trigger interrupt */
31+
} ana_cmpr_config_t;
32+
33+
/**
34+
* @brief Analog comparator internal reference configuration
35+
*
36+
*/
37+
typedef struct {
38+
ana_cmpr_ref_voltage_t ref_volt; /*!< The internal reference voltage. It can be specified to a certain fixed percentage of
39+
* the VDD power supply, currently supports 0%~70% VDD with a step 10%
40+
*/
41+
} ana_cmpr_internal_ref_config_t;
42+
43+
/**
44+
* @brief Analog comparator debounce filter configuration
45+
*
46+
*/
47+
typedef struct {
48+
uint32_t wait_us; /*!< The wait time of re-enabling the interrupt after the last triggering,
49+
* it is used to avoid the spurious triggering while the source signal crossing the reference signal.
50+
* The value should regarding how fast the source signal changes, e.g., a rapid signal requires
51+
* a small wait time, otherwise the next crosses may be missed.
52+
* (Unit: micro second)
53+
*/
54+
} ana_cmpr_debounce_config_t;
55+
56+
/**
57+
* @brief Group of Analog Comparator callbacks
58+
* @note The callbacks are all running under ISR environment
59+
* @note When CONFIG_ANA_CMPR_ISR_IRAM_SAFE is enabled, the callback itself and functions called by it should be placed in IRAM.
60+
* The variables used in the function should be in the SRAM as well.
61+
*/
62+
typedef struct {
63+
ana_cmpr_cross_cb_t on_cross; /*!< The callback function on cross interrupt */
64+
} ana_cmpr_event_callbacks_t;
65+
66+
/**
67+
* @brief Allocating a new analog comparator unit handle
68+
*
69+
* @param[in] config The config of the analog comparator unit
70+
* @param[out] ret_cmpr The returned analog comparator unit handle
71+
* @return
72+
* - ESP_OK Allocate analog comparator unit handle success
73+
* - ESP_ERR_NO_MEM No memory for the analog comparator structure
74+
* - ESP_ERR_INVALID_ARG NULL pointer of the parameters or wrong unit number
75+
* - ESP_ERR_INVALID_STATE The unit has been allocated or the clock source has been occupied
76+
*/
77+
esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *ret_cmpr);
78+
79+
/**
80+
* @brief Delete the analog comparator unit handle
81+
*
82+
* @param[in] cmpr The handle of analog comparator unit
83+
* @return
84+
* - ESP_OK Delete analog comparator unit handle success
85+
* - ESP_ERR_INVALID_ARG NULL pointer of the parameters or wrong unit number
86+
* - ESP_ERR_INVALID_STATE The analog comparator is not disabled yet
87+
*/
88+
esp_err_t ana_cmpr_del_unit(ana_cmpr_handle_t cmpr);
89+
90+
/**
91+
* @brief Set internal reference configuration
92+
* @note This function only need to be called when `ana_cmpr_config_t::ref_src`
93+
* is ANA_CMPR_REF_SRC_INTERNAL.
94+
* @note This function is allowed to run within ISR context including intr callbacks
95+
* @note This function will be placed into IRAM if `CONFIG_ANA_CMPR_CTRL_FUNC_IN_IRAM` is on,
96+
* so that it's allowed to be executed when Cache is disabled
97+
*
98+
* @param[in] cmpr The handle of analog comparator unit
99+
* @param[in] ref_cfg Internal reference configuration
100+
* @return
101+
* - ESP_OK Set denounce configuration success
102+
* - ESP_ERR_INVALID_ARG NULL pointer of the parameters
103+
* - ESP_ERR_INVALID_STATE The reference source is not `ANA_CMPR_REF_SRC_INTERNAL`
104+
*/
105+
esp_err_t ana_cmpr_set_internal_reference(ana_cmpr_handle_t cmpr, const ana_cmpr_internal_ref_config_t *ref_cfg);
106+
107+
/**
108+
* @brief Set debounce configuration to the analog comparator
109+
* @note This function is allowed to run within ISR context including intr callbacks
110+
* @note This function will be placed into IRAM if `CONFIG_ANA_CMPR_CTRL_FUNC_IN_IRAM` is on,
111+
* so that it's allowed to be executed when Cache is disabled
112+
*
113+
* @param[in] cmpr The handle of analog comparator unit
114+
* @param[in] dbc_cfg Debounce configuration
115+
* @return
116+
* - ESP_OK Set denounce configuration success
117+
* - ESP_ERR_INVALID_ARG NULL pointer of the parameters
118+
*/
119+
esp_err_t ana_cmpr_set_debounce(ana_cmpr_handle_t cmpr, const ana_cmpr_debounce_config_t *dbc_cfg);
120+
121+
/**
122+
* @brief Set the source signal cross type
123+
* @note The initial cross type is configured in `ana_cmpr_new_unit`, this function can update the cross type
124+
* @note This function is allowed to run within ISR context including intr callbacks
125+
* @note This function will be placed into IRAM if `CONFIG_ANA_CMPR_CTRL_FUNC_IN_IRAM` is on,
126+
* so that it's allowed to be executed when Cache is disabled
127+
*
128+
* @param[in] cmpr The handle of analog comparator unit
129+
* @param[in] cross_type The source signal cross type that can trigger the interrupt
130+
* @return
131+
* - ESP_OK Set denounce configuration success
132+
* - ESP_ERR_INVALID_ARG NULL pointer of the parameters
133+
*/
134+
esp_err_t ana_cmpr_set_cross_type(ana_cmpr_handle_t cmpr, ana_cmpr_cross_type_t cross_type);
135+
136+
/**
137+
* @brief Register analog comparator interrupt event callbacks
138+
* @note This function can only be called before enabling the unit
139+
*
140+
* @param[in] cmpr The handle of analog comparator unit
141+
* @param[in] cbs Group of callback functions
142+
* @param[in] user_data The user data that will be passed to callback functions directly
143+
* @return
144+
* - ESP_OK Register callbacks success
145+
* - ESP_ERR_INVALID_ARG NULL pointer of the parameters
146+
* - ESP_ERR_INVALID_STATE The analog comparator has been enabled
147+
*/
148+
esp_err_t ana_cmpr_register_event_callbacks(ana_cmpr_handle_t cmpr, const ana_cmpr_event_callbacks_t *cbs, void *user_data);
149+
150+
/**
151+
* @brief Enable the analog comparator unit
152+
*
153+
* @param[in] cmpr The handle of analog comparator unit
154+
* @return
155+
* - ESP_OK Enable analog comparator unit success
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* - ESP_ERR_INVALID_ARG NULL pointer of the parameters
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* - ESP_ERR_INVALID_STATE The analog comparator has been enabled
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*/
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esp_err_t ana_cmpr_enable(ana_cmpr_handle_t cmpr);
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/**
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* @brief Disable the analog comparator unit
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*
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* @param[in] cmpr The handle of analog comparator unit
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* @return
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* - ESP_OK Disable analog comparator unit success
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* - ESP_ERR_INVALID_ARG NULL pointer of the parameters
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* - ESP_ERR_INVALID_STATE The analog comparator has disabled already
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*/
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esp_err_t ana_cmpr_disable(ana_cmpr_handle_t cmpr);
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/**
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* @brief Get the specific GPIO number of the analog comparator unit
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*
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* @param[in] unit The handle of analog comparator unit
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* @param[in] chan_type The channel type of analog comparator, like source channel or reference channel
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* @param[out] gpio_num The output GPIO number of this channel
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* @return
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* - ESP_OK Get GPIO success
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* - ESP_ERR_INVALID_ARG NULL pointer of the parameters or wrong unit number or wrong channel type
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*/
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esp_err_t ana_cmpr_get_gpio(ana_cmpr_unit_t unit, ana_cmpr_channel_type_t chan_type, int *gpio_num);
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#ifdef __cplusplus
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}
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#endif

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