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Merge branch 'master' into release/v3.2.x
2 parents 115caf2 + db0bbad commit a09b5d6

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+1846
-51
lines changed

CMakeLists.txt

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -291,6 +291,9 @@ set(ARDUINO_LIBRARY_Zigbee_SRCS
291291
libraries/Zigbee/src/ep/ZigbeePressureSensor.cpp
292292
libraries/Zigbee/src/ep/ZigbeeOccupancySensor.cpp
293293
libraries/Zigbee/src/ep/ZigbeeCarbonDioxideSensor.cpp
294+
libraries/Zigbee/src/ep/ZigbeeContactSwitch.cpp
295+
libraries/Zigbee/src/ep/ZigbeeDoorWindowHandle.cpp
296+
libraries/Zigbee/src/ep/ZigbeeWindowCovering.cpp
294297
)
295298

296299
set(ARDUINO_LIBRARY_BLE_SRCS

boards.txt

Lines changed: 178 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35211,6 +35211,184 @@ XIAO_ESP32S3.menu.EraseFlash.all.upload.erase_cmd=-e
3521135211

3521235212
##############################################################
3521335213

35214+
XIAO_ESP32S3_Plus.name=XIAO_ESP32S3_PLUS
35215+
XIAO_ESP32S3_Plus.vid.0=0x2886
35216+
XIAO_ESP32S3_Plus.pid.0=0x0063
35217+
XIAO_ESP32S3_Plus.vid.1=0x2886
35218+
XIAO_ESP32S3_Plus.pid.1=0x8063
35219+
35220+
XIAO_ESP32S3_Plus.bootloader.tool=esptool_py
35221+
XIAO_ESP32S3_Plus.bootloader.tool.default=esptool_py
35222+
35223+
XIAO_ESP32S3_Plus.upload.tool=esptool_py
35224+
XIAO_ESP32S3_Plus.upload.tool.default=esptool_py
35225+
XIAO_ESP32S3_Plus.upload.tool.network=esp_ota
35226+
35227+
XIAO_ESP32S3_Plus.upload.maximum_size=1310720
35228+
XIAO_ESP32S3_Plus.upload.maximum_data_size=327680
35229+
XIAO_ESP32S3_Plus.upload.flags=
35230+
XIAO_ESP32S3_Plus.upload.extra_flags=
35231+
XIAO_ESP32S3_Plus.upload.use_1200bps_touch=false
35232+
XIAO_ESP32S3_Plus.upload.wait_for_upload_port=false
35233+
35234+
XIAO_ESP32S3_Plus.serial.disableDTR=false
35235+
XIAO_ESP32S3_Plus.serial.disableRTS=false
35236+
35237+
XIAO_ESP32S3_Plus.build.tarch=xtensa
35238+
XIAO_ESP32S3_Plus.build.bootloader_addr=0x0
35239+
XIAO_ESP32S3_Plus.build.target=esp32s3
35240+
XIAO_ESP32S3_Plus.build.mcu=esp32s3
35241+
XIAO_ESP32S3_Plus.build.core=esp32
35242+
XIAO_ESP32S3_Plus.build.variant=XIAO_ESP32S3_Plus
35243+
XIAO_ESP32S3_Plus.build.board=XIAO_ESP32S3_PLUS
35244+
35245+
XIAO_ESP32S3_Plus.build.usb_mode=0
35246+
XIAO_ESP32S3_Plus.build.cdc_on_boot=1
35247+
XIAO_ESP32S3_Plus.build.msc_on_boot=0
35248+
XIAO_ESP32S3_Plus.build.dfu_on_boot=0
35249+
XIAO_ESP32S3_Plus.build.f_cpu=240000000L
35250+
XIAO_ESP32S3_Plus.build.flash_size=8MB
35251+
XIAO_ESP32S3_Plus.build.flash_freq=80m
35252+
XIAO_ESP32S3_Plus.build.flash_mode=dio
35253+
XIAO_ESP32S3_Plus.build.boot=qio
35254+
XIAO_ESP32S3_Plus.build.boot_freq=80m
35255+
XIAO_ESP32S3_Plus.build.partitions=default_8MB
35256+
XIAO_ESP32S3_Plus.build.defines=
35257+
XIAO_ESP32S3_Plus.build.loop_core=
35258+
XIAO_ESP32S3_Plus.build.event_core=
35259+
XIAO_ESP32S3_Plus.build.psram_type=qspi
35260+
XIAO_ESP32S3_Plus.build.memory_type={build.boot}_{build.psram_type}
35261+
35262+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.default=Disabled
35263+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.default.build.copy_jtag_files=0
35264+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.builtin=Integrated USB JTAG
35265+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.builtin.build.openocdscript=esp32s3-builtin.cfg
35266+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.builtin.build.copy_jtag_files=1
35267+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.external=FTDI Adapter
35268+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.external.build.openocdscript=esp32s3-ftdi.cfg
35269+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.external.build.copy_jtag_files=1
35270+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.bridge=ESP USB Bridge
35271+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.bridge.build.openocdscript=esp32s3-bridge.cfg
35272+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.bridge.build.copy_jtag_files=1
35273+
35274+
XIAO_ESP32S3_Plus.menu.PSRAM.disabled=Disabled
35275+
XIAO_ESP32S3_Plus.menu.PSRAM.disabled.build.defines=
35276+
XIAO_ESP32S3_Plus.menu.PSRAM.disabled.build.psram_type=qspi
35277+
XIAO_ESP32S3_Plus.menu.PSRAM.opi=OPI PSRAM
35278+
XIAO_ESP32S3_Plus.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM
35279+
XIAO_ESP32S3_Plus.menu.PSRAM.opi.build.psram_type=opi
35280+
35281+
XIAO_ESP32S3_Plus.menu.FlashMode.qio=QIO 80MHz
35282+
XIAO_ESP32S3_Plus.menu.FlashMode.qio.build.flash_mode=dio
35283+
XIAO_ESP32S3_Plus.menu.FlashMode.qio.build.boot=qio
35284+
XIAO_ESP32S3_Plus.menu.FlashMode.qio.build.boot_freq=80m
35285+
XIAO_ESP32S3_Plus.menu.FlashMode.qio.build.flash_freq=80m
35286+
XIAO_ESP32S3_Plus.menu.FlashMode.dio=DIO 80MHz
35287+
XIAO_ESP32S3_Plus.menu.FlashMode.dio.build.flash_mode=dio
35288+
XIAO_ESP32S3_Plus.menu.FlashMode.dio.build.boot=dio
35289+
XIAO_ESP32S3_Plus.menu.FlashMode.dio.build.boot_freq=80m
35290+
XIAO_ESP32S3_Plus.menu.FlashMode.dio.build.flash_freq=80m
35291+
35292+
XIAO_ESP32S3_Plus.menu.FlashSize.8M=8MB (64Mb)
35293+
XIAO_ESP32S3_Plus.menu.FlashSize.8M.build.flash_size=8MB
35294+
35295+
XIAO_ESP32S3_Plus.menu.LoopCore.1=Core 1
35296+
XIAO_ESP32S3_Plus.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
35297+
XIAO_ESP32S3_Plus.menu.LoopCore.0=Core 0
35298+
XIAO_ESP32S3_Plus.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
35299+
35300+
XIAO_ESP32S3_Plus.menu.EventsCore.1=Core 1
35301+
XIAO_ESP32S3_Plus.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
35302+
XIAO_ESP32S3_Plus.menu.EventsCore.0=Core 0
35303+
XIAO_ESP32S3_Plus.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
35304+
35305+
XIAO_ESP32S3_Plus.menu.USBMode.hwcdc=Hardware CDC and JTAG
35306+
XIAO_ESP32S3_Plus.menu.USBMode.hwcdc.build.usb_mode=1
35307+
XIAO_ESP32S3_Plus.menu.USBMode.default=USB-OTG (TinyUSB)
35308+
XIAO_ESP32S3_Plus.menu.USBMode.default.build.usb_mode=0
35309+
35310+
XIAO_ESP32S3_Plus.menu.CDCOnBoot.default=Enabled
35311+
XIAO_ESP32S3_Plus.menu.CDCOnBoot.default.build.cdc_on_boot=1
35312+
XIAO_ESP32S3_Plus.menu.CDCOnBoot.cdc=Disabled
35313+
XIAO_ESP32S3_Plus.menu.CDCOnBoot.cdc.build.cdc_on_boot=0
35314+
35315+
XIAO_ESP32S3_Plus.menu.MSCOnBoot.default=Disabled
35316+
XIAO_ESP32S3_Plus.menu.MSCOnBoot.default.build.msc_on_boot=0
35317+
XIAO_ESP32S3_Plus.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
35318+
XIAO_ESP32S3_Plus.menu.MSCOnBoot.msc.build.msc_on_boot=1
35319+
35320+
XIAO_ESP32S3_Plus.menu.DFUOnBoot.default=Disabled
35321+
XIAO_ESP32S3_Plus.menu.DFUOnBoot.default.build.dfu_on_boot=0
35322+
XIAO_ESP32S3_Plus.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
35323+
XIAO_ESP32S3_Plus.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
35324+
35325+
XIAO_ESP32S3_Plus.menu.UploadMode.default=UART0 / Hardware CDC
35326+
XIAO_ESP32S3_Plus.menu.UploadMode.default.upload.use_1200bps_touch=false
35327+
XIAO_ESP32S3_Plus.menu.UploadMode.default.upload.wait_for_upload_port=false
35328+
XIAO_ESP32S3_Plus.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
35329+
XIAO_ESP32S3_Plus.menu.UploadMode.cdc.upload.use_1200bps_touch=true
35330+
XIAO_ESP32S3_Plus.menu.UploadMode.cdc.upload.wait_for_upload_port=true
35331+
35332+
XIAO_ESP32S3_Plus.menu.PartitionScheme.default_8MB=Default with spiffs (3MB APP/1.5MB SPIFFS)
35333+
XIAO_ESP32S3_Plus.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
35334+
XIAO_ESP32S3_Plus.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
35335+
XIAO_ESP32S3_Plus.menu.PartitionScheme.max_app_8MB=Maximum APP (7.9MB APP No OTA/No FS)
35336+
XIAO_ESP32S3_Plus.menu.PartitionScheme.max_app_8MB.build.partitions=max_app_8MB
35337+
XIAO_ESP32S3_Plus.menu.PartitionScheme.max_app_8MB.upload.maximum_size=8257536
35338+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2=TinyUF2 8MB (2MB APP/3.7MB FFAT)
35339+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2.build.custom_bootloader=bootloader-tinyuf2
35340+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2.build.custom_partitions=partitions-8MB
35341+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2.upload.maximum_size=2097152
35342+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2.upload.extra_flags=0x410000 "{runtime.platform.path}/variants/{build.variant}/tinyuf2.bin"
35343+
35344+
XIAO_ESP32S3_Plus.menu.CPUFreq.240=240MHz (WiFi)
35345+
XIAO_ESP32S3_Plus.menu.CPUFreq.240.build.f_cpu=240000000L
35346+
XIAO_ESP32S3_Plus.menu.CPUFreq.160=160MHz (WiFi)
35347+
XIAO_ESP32S3_Plus.menu.CPUFreq.160.build.f_cpu=160000000L
35348+
XIAO_ESP32S3_Plus.menu.CPUFreq.80=80MHz (WiFi)
35349+
XIAO_ESP32S3_Plus.menu.CPUFreq.80.build.f_cpu=80000000L
35350+
XIAO_ESP32S3_Plus.menu.CPUFreq.40=40MHz
35351+
XIAO_ESP32S3_Plus.menu.CPUFreq.40.build.f_cpu=40000000L
35352+
XIAO_ESP32S3_Plus.menu.CPUFreq.20=20MHz
35353+
XIAO_ESP32S3_Plus.menu.CPUFreq.20.build.f_cpu=20000000L
35354+
XIAO_ESP32S3_Plus.menu.CPUFreq.10=10MHz
35355+
XIAO_ESP32S3_Plus.menu.CPUFreq.10.build.f_cpu=10000000L
35356+
35357+
XIAO_ESP32S3_Plus.menu.UploadSpeed.921600=921600
35358+
XIAO_ESP32S3_Plus.menu.UploadSpeed.921600.upload.speed=921600
35359+
XIAO_ESP32S3_Plus.menu.UploadSpeed.115200=115200
35360+
XIAO_ESP32S3_Plus.menu.UploadSpeed.115200.upload.speed=115200
35361+
XIAO_ESP32S3_Plus.menu.UploadSpeed.256000.windows=256000
35362+
XIAO_ESP32S3_Plus.menu.UploadSpeed.256000.upload.speed=256000
35363+
XIAO_ESP32S3_Plus.menu.UploadSpeed.230400.windows.upload.speed=256000
35364+
XIAO_ESP32S3_Plus.menu.UploadSpeed.230400=230400
35365+
XIAO_ESP32S3_Plus.menu.UploadSpeed.230400.upload.speed=230400
35366+
XIAO_ESP32S3_Plus.menu.UploadSpeed.460800.linux=460800
35367+
XIAO_ESP32S3_Plus.menu.UploadSpeed.460800.macosx=460800
35368+
XIAO_ESP32S3_Plus.menu.UploadSpeed.460800.upload.speed=460800
35369+
XIAO_ESP32S3_Plus.menu.UploadSpeed.512000.windows=512000
35370+
XIAO_ESP32S3_Plus.menu.UploadSpeed.512000.upload.speed=512000
35371+
35372+
XIAO_ESP32S3_Plus.menu.DebugLevel.none=None
35373+
XIAO_ESP32S3_Plus.menu.DebugLevel.none.build.code_debug=0
35374+
XIAO_ESP32S3_Plus.menu.DebugLevel.error=Error
35375+
XIAO_ESP32S3_Plus.menu.DebugLevel.error.build.code_debug=1
35376+
XIAO_ESP32S3_Plus.menu.DebugLevel.warn=Warn
35377+
XIAO_ESP32S3_Plus.menu.DebugLevel.warn.build.code_debug=2
35378+
XIAO_ESP32S3_Plus.menu.DebugLevel.info=Info
35379+
XIAO_ESP32S3_Plus.menu.DebugLevel.info.build.code_debug=3
35380+
XIAO_ESP32S3_Plus.menu.DebugLevel.debug=Debug
35381+
XIAO_ESP32S3_Plus.menu.DebugLevel.debug.build.code_debug=4
35382+
XIAO_ESP32S3_Plus.menu.DebugLevel.verbose=Verbose
35383+
XIAO_ESP32S3_Plus.menu.DebugLevel.verbose.build.code_debug=5
35384+
35385+
XIAO_ESP32S3_Plus.menu.EraseFlash.none=Disabled
35386+
XIAO_ESP32S3_Plus.menu.EraseFlash.none.upload.erase_cmd=
35387+
XIAO_ESP32S3_Plus.menu.EraseFlash.all=Enabled
35388+
XIAO_ESP32S3_Plus.menu.EraseFlash.all.upload.erase_cmd=-e
35389+
35390+
##############################################################
35391+
3521435392
connaxio_espoir.name=Connaxio's Espoir
3521535393
connaxio_espoir.vid.0=0x10C4
3521635394
connaxio_espoir.pid.0=0x8D9A

cores/esp32/esp32-hal-misc.c

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -156,11 +156,13 @@ void enableCore0WDT() {
156156
}
157157
}
158158

159-
void disableCore0WDT() {
159+
bool disableCore0WDT() {
160160
TaskHandle_t idle_0 = xTaskGetIdleTaskHandleForCore(0);
161-
if (idle_0 == NULL || esp_task_wdt_delete(idle_0) != ESP_OK) {
161+
if (idle_0 == NULL || esp_task_wdt_status(idle_0) || esp_task_wdt_delete(idle_0) != ESP_OK) {
162162
log_e("Failed to remove Core 0 IDLE task from WDT");
163+
return false;
163164
}
165+
return true;
164166
}
165167

166168
#ifndef CONFIG_FREERTOS_UNICORE
@@ -171,11 +173,13 @@ void enableCore1WDT() {
171173
}
172174
}
173175

174-
void disableCore1WDT() {
176+
bool disableCore1WDT() {
175177
TaskHandle_t idle_1 = xTaskGetIdleTaskHandleForCore(1);
176-
if (idle_1 == NULL || esp_task_wdt_delete(idle_1) != ESP_OK) {
178+
if (idle_1 == NULL || esp_task_wdt_status(idle_1) || esp_task_wdt_delete(idle_1) != ESP_OK) {
177179
log_e("Failed to remove Core 1 IDLE task from WDT");
180+
return false;
178181
}
182+
return true;
179183
}
180184
#endif
181185

cores/esp32/esp32-hal.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -121,11 +121,11 @@ void feedLoopWDT();
121121

122122
//enable/disable WDT for the IDLE task on Core 0 (SYSTEM)
123123
void enableCore0WDT();
124-
void disableCore0WDT();
124+
bool disableCore0WDT();
125125
#ifndef CONFIG_FREERTOS_UNICORE
126126
//enable/disable WDT for the IDLE task on Core 1 (Arduino)
127127
void enableCore1WDT();
128-
void disableCore1WDT();
128+
bool disableCore1WDT();
129129
#endif
130130

131131
//if xCoreID < 0 or CPU is unicore, it will use xTaskCreate, else xTaskCreatePinnedToCore

libraries/ArduinoOTA/src/ArduinoOTA.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ ArduinoOTAClass::ArduinoOTAClass()
2929
_start_callback(NULL), _end_callback(NULL), _error_callback(NULL), _progress_callback(NULL) {}
3030

3131
ArduinoOTAClass::~ArduinoOTAClass() {
32-
_udp_ota.stop();
32+
end();
3333
}
3434

3535
ArduinoOTAClass &ArduinoOTAClass::onStart(THandlerFunction fn) {

libraries/ESP32/examples/Camera/CameraWebServer/app_httpd.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -281,6 +281,8 @@ static esp_err_t stream_handler(httpd_req_t *req) {
281281
int64_t fr_end = esp_timer_get_time();
282282

283283
int64_t frame_time = fr_end - last_frame;
284+
last_frame = fr_end;
285+
284286
frame_time /= 1000;
285287
#if ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_INFO
286288
uint32_t avg_frame_time = ra_filter_run(&ra_filter, frame_time);

libraries/HTTPClient/examples/BasicHttpsClient/BasicHttpsClient.ino

Lines changed: 25 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -14,30 +14,32 @@
1414

1515
#include <NetworkClientSecure.h>
1616

17-
// This is a Baltimore CyberTrust cert, the root Certificate Authority that
17+
// This is a Google Trust Services cert, the root Certificate Authority that
1818
// signed the server certificate for the demo server https://jigsaw.w3.org in this
19-
// example. This certificate is valid until Mon, 12 May 2025 23:59:00 GMT
20-
const char *rootCACertificate = "-----BEGIN CERTIFICATE-----\n"
21-
"MIIDdzCCAl+gAwIBAgIEAgAAuTANBgkqhkiG9w0BAQUFADBaMQswCQYDVQQGEwJJ\n"
22-
"RTESMBAGA1UEChMJQmFsdGltb3JlMRMwEQYDVQQLEwpDeWJlclRydXN0MSIwIAYD\n"
23-
"VQQDExlCYWx0aW1vcmUgQ3liZXJUcnVzdCBSb290MB4XDTAwMDUxMjE4NDYwMFoX\n"
24-
"DTI1MDUxMjIzNTkwMFowWjELMAkGA1UEBhMCSUUxEjAQBgNVBAoTCUJhbHRpbW9y\n"
25-
"ZTETMBEGA1UECxMKQ3liZXJUcnVzdDEiMCAGA1UEAxMZQmFsdGltb3JlIEN5YmVy\n"
26-
"VHJ1c3QgUm9vdDCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAKMEuyKr\n"
27-
"mD1X6CZymrV51Cni4eiVgLGw41uOKymaZN+hXe2wCQVt2yguzmKiYv60iNoS6zjr\n"
28-
"IZ3AQSsBUnuId9Mcj8e6uYi1agnnc+gRQKfRzMpijS3ljwumUNKoUMMo6vWrJYeK\n"
29-
"mpYcqWe4PwzV9/lSEy/CG9VwcPCPwBLKBsua4dnKM3p31vjsufFoREJIE9LAwqSu\n"
30-
"XmD+tqYF/LTdB1kC1FkYmGP1pWPgkAx9XbIGevOF6uvUA65ehD5f/xXtabz5OTZy\n"
31-
"dc93Uk3zyZAsuT3lySNTPx8kmCFcB5kpvcY67Oduhjprl3RjM71oGDHweI12v/ye\n"
32-
"jl0qhqdNkNwnGjkCAwEAAaNFMEMwHQYDVR0OBBYEFOWdWTCCR1jMrPoIVDaGezq1\n"
33-
"BE3wMBIGA1UdEwEB/wQIMAYBAf8CAQMwDgYDVR0PAQH/BAQDAgEGMA0GCSqGSIb3\n"
34-
"DQEBBQUAA4IBAQCFDF2O5G9RaEIFoN27TyclhAO992T9Ldcw46QQF+vaKSm2eT92\n"
35-
"9hkTI7gQCvlYpNRhcL0EYWoSihfVCr3FvDB81ukMJY2GQE/szKN+OMY3EU/t3Wgx\n"
36-
"jkzSswF07r51XgdIGn9w/xZchMB5hbgF/X++ZRGjD8ACtPhSNzkE1akxehi/oCr0\n"
37-
"Epn3o0WC4zxe9Z2etciefC7IpJ5OCBRLbf1wbWsaY71k5h+3zvDyny67G7fyUIhz\n"
38-
"ksLi4xaNmjICq44Y3ekQEe5+NauQrz4wlHrQMz2nZQ/1/I6eYs9HRCwBXbsdtTLS\n"
39-
"R9I4LtD+gdwyah617jzV/OeBHRnDJELqYzmp\n"
40-
"-----END CERTIFICATE-----\n";
19+
// example. This certificate is valid until Jan 28 00:00:42 2028 GMT
20+
const char *rootCACertificate = R"string_literal(
21+
-----BEGIN CERTIFICATE-----
22+
MIIDejCCAmKgAwIBAgIQf+UwvzMTQ77dghYQST2KGzANBgkqhkiG9w0BAQsFADBX
23+
MQswCQYDVQQGEwJCRTEZMBcGA1UEChMQR2xvYmFsU2lnbiBudi1zYTEQMA4GA1UE
24+
CxMHUm9vdCBDQTEbMBkGA1UEAxMSR2xvYmFsU2lnbiBSb290IENBMB4XDTIzMTEx
25+
NTAzNDMyMVoXDTI4MDEyODAwMDA0MlowRzELMAkGA1UEBhMCVVMxIjAgBgNVBAoT
26+
GUdvb2dsZSBUcnVzdCBTZXJ2aWNlcyBMTEMxFDASBgNVBAMTC0dUUyBSb290IFI0
27+
MHYwEAYHKoZIzj0CAQYFK4EEACIDYgAE83Rzp2iLYK5DuDXFgTB7S0md+8Fhzube
28+
Rr1r1WEYNa5A3XP3iZEwWus87oV8okB2O6nGuEfYKueSkWpz6bFyOZ8pn6KY019e
29+
WIZlD6GEZQbR3IvJx3PIjGov5cSr0R2Ko4H/MIH8MA4GA1UdDwEB/wQEAwIBhjAd
30+
BgNVHSUEFjAUBggrBgEFBQcDAQYIKwYBBQUHAwIwDwYDVR0TAQH/BAUwAwEB/zAd
31+
BgNVHQ4EFgQUgEzW63T/STaj1dj8tT7FavCUHYwwHwYDVR0jBBgwFoAUYHtmGkUN
32+
l8qJUC99BM00qP/8/UswNgYIKwYBBQUHAQEEKjAoMCYGCCsGAQUFBzAChhpodHRw
33+
Oi8vaS5wa2kuZ29vZy9nc3IxLmNydDAtBgNVHR8EJjAkMCKgIKAehhxodHRwOi8v
34+
Yy5wa2kuZ29vZy9yL2dzcjEuY3JsMBMGA1UdIAQMMAowCAYGZ4EMAQIBMA0GCSqG
35+
SIb3DQEBCwUAA4IBAQAYQrsPBtYDh5bjP2OBDwmkoWhIDDkic574y04tfzHpn+cJ
36+
odI2D4SseesQ6bDrarZ7C30ddLibZatoKiws3UL9xnELz4ct92vID24FfVbiI1hY
37+
+SW6FoVHkNeWIP0GCbaM4C6uVdF5dTUsMVs/ZbzNnIdCp5Gxmx5ejvEau8otR/Cs
38+
kGN+hr/W5GvT1tMBjgWKZ1i4//emhA1JG1BbPzoLJQvyEotc03lXjTaCzv8mEbep
39+
8RqZ7a2CPsgRbuvTPBwcOMBBmuFeU88+FSBX6+7iP0il8b4Z0QFqIwwMHfs/L6K1
40+
vepuoxtGzi4CZ68zJpiq1UvSqTbFJjtbD4seiMHl
41+
-----END CERTIFICATE-----
42+
)string_literal";
4143

4244
// Not sure if NetworkClientSecure checks the validity date of the certificate.
4345
// Setting clock just to be sure...

libraries/LittleFS/src/LittleFS.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -95,9 +95,11 @@ void LittleFSFS::end() {
9595
}
9696

9797
bool LittleFSFS::format() {
98-
disableCore0WDT();
98+
bool wdt_active = disableCore0WDT();
9999
esp_err_t err = esp_littlefs_format(partitionLabel_);
100-
enableCore0WDT();
100+
if (wdt_active) {
101+
enableCore0WDT();
102+
}
101103
if (err) {
102104
log_e("Formatting LittleFS failed! Error: %d", err);
103105
return false;

libraries/Network/src/NetworkEvents.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,10 @@
88
#include "esp_task.h"
99
#include "esp32-hal.h"
1010

11+
#ifndef ARDUINO_NETWORK_EVENT_TASK_STACK_SIZE
12+
#define ARDUINO_NETWORK_EVENT_TASK_STACK_SIZE 4096
13+
#endif
14+
1115
NetworkEvents::NetworkEvents() : _arduino_event_group(NULL), _arduino_event_queue(NULL), _arduino_event_task_handle(NULL) {}
1216

1317
NetworkEvents::~NetworkEvents() {
@@ -61,8 +65,8 @@ bool NetworkEvents::initNetworkEvents() {
6165
[](void *self) {
6266
static_cast<NetworkEvents *>(self)->_checkForEvent();
6367
},
64-
"arduino_events", // label
65-
4096, // event task's stack size
68+
"arduino_events", // label
69+
ARDUINO_NETWORK_EVENT_TASK_STACK_SIZE, // event task's stack size
6670
this, ESP_TASKD_EVENT_PRIO - 1, &_arduino_event_task_handle, ARDUINO_EVENT_RUNNING_CORE
6771
);
6872
if (!_arduino_event_task_handle) {

libraries/README.md

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,9 @@ arduino-esp32 includes libraries for Arduino compatibility along with some objec
8888
### SPIFFS
8989
SPI Flash Filesystem (see [spiffs-plugin](https://github.com/me-no-dev/arduino-esp32fs-plugin) to upload to device)
9090

91+
### SR
92+
ESP-SR helps users build AI speech solutions based on ESP32-S3 or ESP32-P4 chips
93+
9194
### Ticker
9295
A timer to call functions on an interval
9396

libraries/RainMaker/examples/RMakerCustomAirCooler/ci.json

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,7 @@
11
{
2+
"targets": {
3+
"esp32": false
4+
},
25
"fqbn_append": "PartitionScheme=rainmaker_4MB",
36
"requires": [
47
"CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK=[1-9][0-9]*"

libraries/RainMaker/examples/RMakerSonoffDualR3/ci.json

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,7 @@
11
{
2+
"targets": {
3+
"esp32": false
4+
},
25
"fqbn_append": "PartitionScheme=rainmaker_4MB",
36
"requires": [
47
"CONFIG_ESP_RMAKER_WORK_QUEUE_TASK_STACK=[1-9][0-9]*"

libraries/SPIFFS/src/SPIFFS.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -91,9 +91,11 @@ void SPIFFSFS::end() {
9191
}
9292

9393
bool SPIFFSFS::format() {
94-
disableCore0WDT();
94+
bool wdt_active = disableCore0WDT();
9595
esp_err_t err = esp_spiffs_format(partitionLabel_);
96-
enableCore0WDT();
96+
if (wdt_active) {
97+
enableCore0WDT();
98+
}
9799
if (err) {
98100
log_e("Formatting SPIFFS failed! Error: %d", err);
99101
return false;

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