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me-no-devme-no-dev
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fix peripherals
1 parent c793fa2 commit 7a389b4

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5 files changed

+107
-92
lines changed

5 files changed

+107
-92
lines changed

‎cores/esp32/esp32-hal-dac.c

Lines changed: 20 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -12,56 +12,41 @@
1212
// See the License for the specific language governing permissions and
1313
// limitations under the License.
1414

15-
#include "esp32-hal-dac.h"
16-
#include "freertos/FreeRTOS.h"
17-
#include "freertos/task.h"
15+
#include "esp32-hal.h"
1816
#include "esp_attr.h"
1917
#include "soc/rtc_io_reg.h"
2018
#include "soc/rtc_cntl_reg.h"
19+
#include "soc/rtc_io_periph.h"
2120
#include "soc/sens_reg.h"
21+
#include "soc/sens_struct.h"
22+
#include "driver/dac.h"
2223

23-
#include "esp_system.h"
24-
#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
25-
#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
26-
#include "esp32/rom/ets_sys.h"
27-
#include "esp_intr_alloc.h"
24+
#if CONFIG_IDF_TARGET_ESP32
25+
#define DAC1 25
26+
#define DAC2 26
2827
#elif CONFIG_IDF_TARGET_ESP32S2
29-
#include "esp32s2/rom/ets_sys.h"
30-
#else
28+
#define DAC1 17
29+
#define DAC2 18
30+
#else
3131
#error Target CONFIG_IDF_TARGET is not supported
3232
#endif
33-
#else // ESP32 Before IDF 4.0
34-
#include "rom/ets_sys.h"
35-
#include "esp_intr.h"
36-
#endif
3733

3834
void IRAM_ATTR __dacWrite(uint8_t pin, uint8_t value)
3935
{
40-
if(pin < 25 || pin > 26){
36+
if(pin < DAC1 || pin > DAC2){
4137
return;//not dac pin
4238
}
4339
pinMode(pin, ANALOG);
44-
uint8_t channel = pin - 25;
45-
46-
47-
//Disable Tone
48-
CLEAR_PERI_REG_MASK(SENS_SAR_DAC_CTRL1_REG, SENS_SW_TONE_EN);
49-
50-
if (channel) {
51-
//Disable Channel Tone
52-
CLEAR_PERI_REG_MASK(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_CW_EN2_M);
53-
//Set the Dac value
54-
SET_PERI_REG_BITS(RTC_IO_PAD_DAC2_REG, RTC_IO_PDAC2_DAC, value, RTC_IO_PDAC2_DAC_S); //dac_output
55-
//Channel output enable
56-
SET_PERI_REG_MASK(RTC_IO_PAD_DAC2_REG, RTC_IO_PDAC2_XPD_DAC | RTC_IO_PDAC2_DAC_XPD_FORCE);
57-
} else {
58-
//Disable Channel Tone
59-
CLEAR_PERI_REG_MASK(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_CW_EN1_M);
60-
//Set the Dac value
61-
SET_PERI_REG_BITS(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_DAC, value, RTC_IO_PDAC1_DAC_S); //dac_output
62-
//Channel output enable
63-
SET_PERI_REG_MASK(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_XPD_DAC | RTC_IO_PDAC1_DAC_XPD_FORCE);
40+
uint8_t channel = pin - DAC1;
41+
SENS.sar_dac_ctrl1.dac_clkgate_en = 1;
42+
RTCIO.pad_dac[channel].dac_xpd_force = 1;
43+
RTCIO.pad_dac[channel].xpd_dac = 1;
44+
if (channel == 0) {
45+
SENS.sar_dac_ctrl2.dac_cw_en1 = 0;
46+
} else if (channel == 1) {
47+
SENS.sar_dac_ctrl2.dac_cw_en2 = 0;
6448
}
49+
RTCIO.pad_dac[channel].dac = value;
6550
}
6651

6752
extern void dacWrite(uint8_t pin, uint8_t value) __attribute__ ((weak, alias("__dacWrite")));

‎cores/esp32/esp32-hal-gpio.c

Lines changed: 17 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -29,12 +29,14 @@
2929
#include "esp32/rom/gpio.h"
3030
#include "esp_intr_alloc.h"
3131
#define NUM_OUPUT_PINS 34
32+
#define GPIO_FUNC 2
3233
#elif CONFIG_IDF_TARGET_ESP32S2
3334
#include "esp32s2/rom/ets_sys.h"
3435
#include "esp32s2/rom/gpio.h"
3536
#include "esp_intr_alloc.h"
3637
#include "soc/periph_defs.h"
3738
#define NUM_OUPUT_PINS 45
39+
#define GPIO_FUNC 1
3840
#else
3941
#error Target CONFIG_IDF_TARGET is not supported
4042
#endif
@@ -155,64 +157,38 @@ static InterruptHandle_t __pinInterruptHandlers[GPIO_PIN_COUNT] = {0,};
155157

156158
#include "driver/rtc_io.h"
157159

158-
//
159-
//static void idf_pinMode(uint8_t pin, uint8_t mode)
160-
//{
161-
// gpio_mode_t m = 0;
162-
// if(mode & INPUT) {
163-
// m |= GPIO_MODE_DEF_INPUT;
164-
// }
165-
// if(mode & OUTPUT) {
166-
// m |= GPIO_MODE_DEF_OUTPUT;
167-
// }
168-
// if(mode & OPEN_DRAIN) {
169-
// m |= GPIO_MODE_DEF_OD;
170-
// }
171-
// gpio_config_t conf = {
172-
// .pin_bit_mask = 1LL << pin,
173-
// .mode = (gpio_mode_t)m,
174-
// .pull_up_en = (gpio_pullup_t)((mode & PULLUP) != 0),
175-
// .pull_down_en = (gpio_pulldown_t)((mode & PULLDOWN) != 0),
176-
// .intr_type = (gpio_int_type_t)GPIO_INTR_DISABLE
177-
// };
178-
// gpio_config(&conf);
179-
//}
180-
181-
182160
extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
183161
{
184162

185163
if(!digitalPinIsValid(pin)) {
186164
return;
187165
}
188166

189-
//return idf_pinMode(pin, mode);
190-
191167
uint32_t rtc_reg = rtc_io_desc[pin].reg;
192168
if(mode == ANALOG) {
193169
if(!rtc_reg) {
194170
return;//not rtc pin
195171
}
196-
//lock rtc
197-
uint32_t reg_val = ESP_REG(rtc_reg);
198-
if(reg_val & rtc_io_desc[pin].mux){
199-
return;//already in adc mode
172+
SENS.sar_io_mux_conf.iomux_clk_gate_en = 1;
173+
SET_PERI_REG_MASK(rtc_io_desc[pin].reg, (rtc_io_desc[pin].mux));
174+
SET_PERI_REG_BITS(rtc_io_desc[pin].reg, RTC_IO_TOUCH_PAD1_FUN_SEL_V, SOC_PIN_FUNC_RTC_IO, rtc_io_desc[pin].func);
175+
176+
RTCIO.pin[pin].pad_driver = 0;//OD = 1
177+
RTCIO.enable_w1tc.w1tc = (1U << pin);
178+
CLEAR_PERI_REG_MASK(rtc_io_desc[pin].reg, rtc_io_desc[pin].ie);
179+
180+
if (rtc_io_desc[pin].pullup) {
181+
CLEAR_PERI_REG_MASK(rtc_io_desc[pin].reg, rtc_io_desc[pin].pullup);
182+
}
183+
if (rtc_io_desc[pin].pulldown) {
184+
CLEAR_PERI_REG_MASK(rtc_io_desc[pin].reg, rtc_io_desc[pin].pulldown);
200185
}
201-
reg_val &= ~(
202-
(RTC_IO_TOUCH_PAD1_FUN_SEL_V << rtc_io_desc[pin].func)
203-
|rtc_io_desc[pin].ie
204-
|rtc_io_desc[pin].pullup
205-
|rtc_io_desc[pin].pulldown);
206-
ESP_REG(RTC_GPIO_ENABLE_W1TC_REG) = (1 << (rtc_io_desc[pin].rtc_num + RTC_GPIO_ENABLE_W1TC_S));
207-
ESP_REG(rtc_reg) = reg_val | rtc_io_desc[pin].mux;
208-
//unlock rtc
209-
ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = ((uint32_t)2 << MCU_SEL_S) | ((uint32_t)2 << FUN_DRV_S) | FUN_IE;
186+
ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = ((uint32_t)GPIO_FUNC << MCU_SEL_S) | ((uint32_t)2 << FUN_DRV_S) | FUN_IE;
210187
return;
211188
}
212189

213190
//RTC pins PULL settings
214191
if(rtc_reg) {
215-
//lock rtc
216192
ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[pin].mux);
217193
if(mode & PULLUP) {
218194
ESP_REG(rtc_reg) = (ESP_REG(rtc_reg) | rtc_io_desc[pin].pullup) & ~(rtc_io_desc[pin].pulldown);
@@ -221,12 +197,10 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
221197
} else {
222198
ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[pin].pullup | rtc_io_desc[pin].pulldown);
223199
}
224-
//unlock rtc
225200
}
226201

227202
uint32_t pinFunction = 0, pinControl = 0;
228203

229-
//lock gpio
230204
if(mode & INPUT) {
231205
if(pin < 32) {
232206
GPIO.enable_w1tc = ((uint32_t)1 << pin);
@@ -235,8 +209,7 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
235209
}
236210
} else if(mode & OUTPUT) {
237211
if(pin >= NUM_OUPUT_PINS){
238-
//unlock gpio
239-
return;//pins above 33 can be only inputs
212+
return;
240213
} else if(pin < 32) {
241214
GPIO.enable_w1ts = ((uint32_t)1 << pin);
242215
} else {
@@ -276,7 +249,6 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
276249
}
277250

278251
GPIO.pin[pin].val = pinControl;
279-
//unlock gpio
280252
}
281253

282254
extern void IRAM_ATTR __digitalWrite(uint8_t pin, uint8_t val)

‎cores/esp32/esp32-hal-sigmadelta.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -81,6 +81,9 @@ uint32_t sigmaDeltaSetup(uint8_t channel, uint32_t freq) //chan 0-7 freq 1220-31
8181
prescale = 0xFF;
8282
}
8383
SD_MUTEX_LOCK();
84+
#ifndef CONFIG_IDF_TARGET_ESP32
85+
SIGMADELTA.misc.function_clk_en = 1;
86+
#endif
8487
SIGMADELTA.channel[channel].prescale = prescale;
8588
SIGMADELTA.cg.clk_en = 0;
8689
SIGMADELTA.cg.clk_en = 1;

‎cores/esp32/esp32-hal-timer.c

Lines changed: 31 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
#include "soc/timer_group_struct.h"
2020
#include "soc/dport_reg.h"
2121
#include "esp_attr.h"
22+
#include "driver/periph_ctrl.h"
2223

2324
#include "esp_system.h"
2425
#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
@@ -225,15 +226,29 @@ hw_timer_t * IRAM_ATTR timerBegin(uint8_t num, uint16_t divider, bool countUp){
225226
}
226227
hw_timer_t * timer = &hw_timer[num];
227228
if(timer->group) {
228-
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_TIMERGROUP1_CLK_EN);
229-
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_TIMERGROUP1_RST);
229+
periph_module_enable(PERIPH_TIMG1_MODULE);
230+
} else {
231+
periph_module_enable(PERIPH_TIMG0_MODULE);
232+
}
233+
timer->dev->config.enable = 0;
234+
if(timer->group) {
230235
TIMERG1.int_ena.val &= ~BIT(timer->timer);
236+
#if CONFIG_IDF_TARGET_ESP32
237+
TIMERG1.int_clr_timers.val |= BIT(timer->timer);
238+
#else
239+
TIMERG1.int_clr.val = BIT(timer->timer);
240+
#endif
231241
} else {
232-
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_TIMERGROUP_CLK_EN);
233-
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_TIMERGROUP_RST);
234242
TIMERG0.int_ena.val &= ~BIT(timer->timer);
243+
#if CONFIG_IDF_TARGET_ESP32
244+
TIMERG0.int_clr_timers.val |= BIT(timer->timer);
245+
#else
246+
TIMERG0.int_clr.val = BIT(timer->timer);
247+
#endif
235248
}
236-
timer->dev->config.enable = 0;
249+
#ifdef TIMER_GROUP_SUPPORTS_XTAL_CLOCK
250+
timer->dev->config.use_xtal = 0;
251+
#endif
237252
timerSetDivider(timer, divider);
238253
timerSetCountUp(timer, countUp);
239254
timerSetAutoReload(timer, false);
@@ -262,8 +277,18 @@ void IRAM_ATTR timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool ed
262277
timer->dev->config.alarm_en = 0;
263278
if(timer->num & 2){
264279
TIMERG1.int_ena.val &= ~BIT(timer->timer);
280+
#if CONFIG_IDF_TARGET_ESP32
281+
TIMERG1.int_clr_timers.val |= BIT(timer->timer);
282+
#else
283+
TIMERG1.int_clr.val = BIT(timer->timer);
284+
#endif
265285
} else {
266286
TIMERG0.int_ena.val &= ~BIT(timer->timer);
287+
#if CONFIG_IDF_TARGET_ESP32
288+
TIMERG0.int_clr_timers.val |= BIT(timer->timer);
289+
#else
290+
TIMERG0.int_clr.val = BIT(timer->timer);
291+
#endif
267292
}
268293
__timerInterruptHandlers[timer->num] = NULL;
269294
} else {
@@ -286,7 +311,7 @@ void IRAM_ATTR timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool ed
286311
}
287312
if(!initialized){
288313
initialized = true;
289-
esp_intr_alloc(intr_source, (int)(ESP_INTR_FLAG_IRAM|ESP_INTR_FLAG_LOWMED|ESP_INTR_FLAG_EDGE), __timerISR, NULL, &intr_handle);
314+
esp_intr_alloc(intr_source, (int)(ESP_INTR_FLAG_IRAM|ESP_INTR_FLAG_LOWMED), __timerISR, NULL, &intr_handle);
290315
} else {
291316
intr_matrix_set(esp_intr_get_cpu(intr_handle), intr_source, esp_intr_get_intno(intr_handle));
292317
}

‎cores/esp32/esp32-hal-touch.c

Lines changed: 36 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,8 @@
1919
#include "soc/rtc_io_reg.h"
2020
#include "soc/rtc_cntl_reg.h"
2121
#include "soc/sens_reg.h"
22+
#include "soc/sens_struct.h"
23+
#include "driver/touch_sensor.h"
2224

2325
#include "esp_system.h"
2426
#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
@@ -75,6 +77,8 @@ void __touchSetCycles(uint16_t measure, uint16_t sleep)
7577
SET_PERI_REG_BITS(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_SLEEP_CYCLES, __touchSleepCycles, SENS_TOUCH_SLEEP_CYCLES_S);
7678
//Touch Pad Measure Time
7779
SET_PERI_REG_BITS(SENS_SAR_TOUCH_CTRL1_REG, SENS_TOUCH_MEAS_DELAY, __touchMeasureCycles, SENS_TOUCH_MEAS_DELAY_S);
80+
#else
81+
touch_pad_set_meas_time(sleep, measure);
7882
#endif
7983
}
8084

@@ -90,13 +94,21 @@ void __touchInit()
9094
SET_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_MEAS_EN_CLR);
9195
//clear touch enable
9296
WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG, 0x0);
93-
SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_TOUCH_SLP_TIMER_EN);
94-
#endif
95-
9697
__touchSetCycles(__touchMeasureCycles, __touchSleepCycles);
97-
98-
#if CONFIG_IDF_TARGET_ESP32
9998
esp_intr_alloc(ETS_RTC_CORE_INTR_SOURCE, (int)ESP_INTR_FLAG_IRAM, __touchISR, NULL, &touch_intr_handle);
99+
#else
100+
touch_pad_init();
101+
touch_pad_set_voltage(TOUCH_HVOLT_2V7, TOUCH_LVOLT_0V5, TOUCH_HVOLT_ATTEN_0V5);
102+
touch_pad_set_idle_channel_connect(TOUCH_PAD_CONN_GND);
103+
__touchSetCycles(__touchMeasureCycles, __touchSleepCycles);
104+
touch_pad_denoise_t denoise = {
105+
.grade = TOUCH_PAD_DENOISE_BIT4,
106+
.cap_level = TOUCH_PAD_DENOISE_CAP_L4,
107+
};
108+
touch_pad_denoise_set_config(&denoise);
109+
touch_pad_denoise_enable();
110+
touch_pad_set_fsm_mode(TOUCH_FSM_MODE_TIMER);
111+
touch_pad_fsm_start();
100112
#endif
101113
}
102114

@@ -144,7 +156,23 @@ uint16_t __touchRead(uint8_t pin)
144156
WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG, v0);
145157
return touch_value;
146158
#else
147-
return 0;
159+
static uint32_t chan_mask = 0;
160+
uint32_t value = 0;
161+
if((chan_mask & (1 << pad)) == 0){
162+
if(touch_pad_set_thresh((touch_pad_t)pad, TOUCH_PAD_THRESHOLD_MAX) != ESP_OK){
163+
log_e("touch_pad_set_thresh failed");
164+
} else if(touch_pad_config((touch_pad_t)pad) != ESP_OK){
165+
log_e("touch_pad_config failed");
166+
} else {
167+
chan_mask |= (1 << pad);
168+
}
169+
}
170+
if((chan_mask & (1 << pad)) != 0) {
171+
if(touch_pad_read_raw_data((touch_pad_t)pad, &value) != ESP_OK){
172+
log_e("touch_pad_read_raw_data failed");
173+
}
174+
}
175+
return value;
148176
#endif
149177
}
150178

@@ -189,6 +217,8 @@ void __touchAttachInterrupt(uint8_t pin, void (*userFunc)(void), uint16_t thresh
189217
(1 << (pad + SENS_TOUCH_PAD_WORKEN_S)) | \
190218
(1 << (pad + SENS_TOUCH_PAD_OUTEN2_S)) | \
191219
(1 << (pad + SENS_TOUCH_PAD_OUTEN1_S)));
220+
#else
221+
192222
#endif
193223
}
194224

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