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feat(spi): Rename CS pin to SS to match Arduino standard
1 parent f6f1934 commit 21b7a41

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4 files changed

+27
-27
lines changed

4 files changed

+27
-27
lines changed

cores/esp32/esp32-hal-periman.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ const char* perimanGetTypeName(peripheral_bus_type_t type) {
7878
case ESP32_BUS_TYPE_SPI_MASTER_SCK: return "SPI_MASTER_SCK";
7979
case ESP32_BUS_TYPE_SPI_MASTER_MISO: return "SPI_MASTER_MISO";
8080
case ESP32_BUS_TYPE_SPI_MASTER_MOSI: return "SPI_MASTER_MOSI";
81-
case ESP32_BUS_TYPE_SPI_MASTER_CS: return "SPI_MASTER_CS";
81+
case ESP32_BUS_TYPE_SPI_MASTER_SS: return "SPI_MASTER_SS";
8282
#endif
8383
#if SOC_SDMMC_HOST_SUPPORTED
8484
case ESP32_BUS_TYPE_SDMMC_CLK: return "SDMMC_CLK";

cores/esp32/esp32-hal-periman.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -77,7 +77,7 @@ typedef enum {
7777
ESP32_BUS_TYPE_SPI_MASTER_SCK, // IO is used as SPI master SCK pin
7878
ESP32_BUS_TYPE_SPI_MASTER_MISO, // IO is used as SPI master MISO pin
7979
ESP32_BUS_TYPE_SPI_MASTER_MOSI, // IO is used as SPI master MOSI pin
80-
ESP32_BUS_TYPE_SPI_MASTER_CS, // IO is used as SPI master CS pin
80+
ESP32_BUS_TYPE_SPI_MASTER_SS, // IO is used as SPI master SS pin
8181
#endif
8282
#if SOC_SDMMC_HOST_SUPPORTED
8383
ESP32_BUS_TYPE_SDMMC_CLK, // IO is used as SDMMC CLK pin

cores/esp32/esp32-hal-spi.c

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -340,20 +340,20 @@ bool spiDetachMOSI(spi_t * spi)
340340
return true;
341341
}
342342

343-
bool spiAttachSS(spi_t * spi, uint8_t cs_num, int8_t ss)
343+
bool spiAttachSS(spi_t * spi, uint8_t ss_num, int8_t ss)
344344
{
345-
if(!spi || ss < 0 || cs_num > 2) {
345+
if(!spi || ss < 0 || ss_num > 2) {
346346
return false;
347347
}
348-
void * bus = perimanGetPinBus(ss, ESP32_BUS_TYPE_SPI_MASTER_CS);
348+
void * bus = perimanGetPinBus(ss, ESP32_BUS_TYPE_SPI_MASTER_SS);
349349
if(bus != NULL && !perimanClearPinBus(ss)){
350350
return false;
351351
}
352352
pinMode(ss, OUTPUT);
353-
pinMatrixOutAttach(ss, SPI_SS_IDX(spi->num, cs_num), false, false);
354-
spiEnableSSPins(spi, (1 << cs_num));
353+
pinMatrixOutAttach(ss, SPI_SS_IDX(spi->num, ss_num), false, false);
354+
spiEnableSSPins(spi, (1 << ss_num));
355355
spi->ss = ss;
356-
if(!perimanSetPinBus(ss, ESP32_BUS_TYPE_SPI_MASTER_CS, (void *)(spi->num+1), spi->num, -1)){
356+
if(!perimanSetPinBus(ss, ESP32_BUS_TYPE_SPI_MASTER_SS, (void *)(spi->num+1), spi->num, -1)){
357357
spiDetachBus_SS((void *)(spi->num+1));
358358
log_e("Failed to set pin bus to SPI for pin %d", ss);
359359
return false;
@@ -375,30 +375,30 @@ bool spiDetachSS(spi_t * spi)
375375
return true;
376376
}
377377

378-
void spiEnableSSPins(spi_t * spi, uint8_t cs_mask)
378+
void spiEnableSSPins(spi_t * spi, uint8_t ss_mask)
379379
{
380380
if(!spi) {
381381
return;
382382
}
383383
SPI_MUTEX_LOCK();
384384
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
385-
spi->dev->misc.val &= ~(cs_mask & SPI_CS_MASK_ALL);
385+
spi->dev->misc.val &= ~(ss_mask & SPI_SS_MASK_ALL);
386386
#else
387-
spi->dev->pin.val &= ~(cs_mask & SPI_CS_MASK_ALL);
387+
spi->dev->pin.val &= ~(ss_mask & SPI_SS_MASK_ALL);
388388
#endif
389389
SPI_MUTEX_UNLOCK();
390390
}
391391

392-
void spiDisableSSPins(spi_t * spi, uint8_t cs_mask)
392+
void spiDisableSSPins(spi_t * spi, uint8_t ss_mask)
393393
{
394394
if(!spi) {
395395
return;
396396
}
397397
SPI_MUTEX_LOCK();
398398
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
399-
spi->dev->misc.val |= (cs_mask & SPI_CS_MASK_ALL);
399+
spi->dev->misc.val |= (ss_mask & SPI_SS_MASK_ALL);
400400
#else
401-
spi->dev->pin.val |= (cs_mask & SPI_CS_MASK_ALL);
401+
spi->dev->pin.val |= (ss_mask & SPI_SS_MASK_ALL);
402402
#endif
403403
SPI_MUTEX_UNLOCK();
404404
}
@@ -622,7 +622,7 @@ spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_
622622
perimanSetBusDeinit(ESP32_BUS_TYPE_SPI_MASTER_SCK, spiDetachBus_SCK);
623623
perimanSetBusDeinit(ESP32_BUS_TYPE_SPI_MASTER_MISO, spiDetachBus_MISO);
624624
perimanSetBusDeinit(ESP32_BUS_TYPE_SPI_MASTER_MOSI, spiDetachBus_MOSI);
625-
perimanSetBusDeinit(ESP32_BUS_TYPE_SPI_MASTER_CS, spiDetachBus_SS);
625+
perimanSetBusDeinit(ESP32_BUS_TYPE_SPI_MASTER_SS, spiDetachBus_SS);
626626

627627
spi_t * spi = &_spi_bus_array[spi_num];
628628

cores/esp32/esp32-hal-spi.h

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -54,10 +54,10 @@ extern "C" {
5454
#define SPI_MODE2 2
5555
#define SPI_MODE3 3
5656

57-
#define SPI_CS0 0
58-
#define SPI_CS1 1
59-
#define SPI_CS2 2
60-
#define SPI_CS_MASK_ALL 0x7
57+
#define SPI_SS0 0
58+
#define SPI_SS1 1
59+
#define SPI_SS2 2
60+
#define SPI_SS_MASK_ALL 0x7
6161

6262
#define SPI_LSBFIRST 0
6363
#define SPI_MSBFIRST 1
@@ -76,21 +76,21 @@ bool spiDetachSCK(spi_t * spi);
7676
bool spiDetachMISO(spi_t * spi);
7777
bool spiDetachMOSI(spi_t * spi);
7878

79-
//Attach/Detach SS pin to SPI_CSx signal
80-
bool spiAttachSS(spi_t * spi, uint8_t cs_num, int8_t ss);
79+
//Attach/Detach SS pin to SPI_SSx signal
80+
bool spiAttachSS(spi_t * spi, uint8_t ss_num, int8_t ss);
8181
bool spiDetachSS(spi_t * spi);
8282

83-
//Enable/Disable SPI_CSx pins
84-
void spiEnableSSPins(spi_t * spi, uint8_t cs_mask);
85-
void spiDisableSSPins(spi_t * spi, uint8_t cs_mask);
83+
//Enable/Disable SPI_SSx pins
84+
void spiEnableSSPins(spi_t * spi, uint8_t ss_mask);
85+
void spiDisableSSPins(spi_t * spi, uint8_t ss_mask);
8686

87-
//Enable/Disable hardware control of SPI_CSx pins
87+
//Enable/Disable hardware control of SPI_SSx pins
8888
void spiSSEnable(spi_t * spi);
8989
void spiSSDisable(spi_t * spi);
9090

91-
//Activate enabled SPI_CSx pins
91+
//Activate enabled SPI_SSx pins
9292
void spiSSSet(spi_t * spi);
93-
//Deactivate enabled SPI_CSx pins
93+
//Deactivate enabled SPI_SSx pins
9494
void spiSSClear(spi_t * spi);
9595

9696
void spiWaitReady(spi_t * spi);

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