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Refactor i2s_state_t member names, remove i2s_ prefix
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cores/esp8266/core_esp8266_i2s.c

Lines changed: 64 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -58,13 +58,13 @@ typedef struct slc_queue_item {
5858
} slc_queue_item_t;
5959

6060
typedef struct i2s_state {
61-
uint32_t * i2s_slc_queue[SLC_BUF_CNT];
62-
volatile uint8_t i2s_slc_queue_len;
63-
uint32_t * i2s_slc_buf_pntr[SLC_BUF_CNT]; // Pointer to the I2S DMA buffer data
64-
slc_queue_item_t i2s_slc_items[SLC_BUF_CNT]; // I2S DMA buffer descriptors
65-
uint32_t * i2s_curr_slc_buf; // Current buffer for writing
66-
uint32_t i2s_curr_slc_buf_pos; // Position in the current buffer
67-
void (*i2s_callback) (void);
61+
uint32_t * slc_queue[SLC_BUF_CNT];
62+
volatile uint8_t slc_queue_len;
63+
uint32_t * slc_buf_pntr[SLC_BUF_CNT]; // Pointer to the I2S DMA buffer data
64+
slc_queue_item_t slc_items[SLC_BUF_CNT]; // I2S DMA buffer descriptors
65+
uint32_t * curr_slc_buf; // Current buffer for writing
66+
uint32_t curr_slc_buf_pos; // Position in the current buffer
67+
void (*callback) (void);
6868
// Callback function should be defined as 'void ICACHE_FLASH_ATTR function_name()',
6969
// and be placed in IRAM for faster execution. Avoid long computational tasks in this
7070
// function, use it to set flags and process later.
@@ -87,7 +87,7 @@ static bool ICACHE_FLASH_ATTR _i2s_is_full(const i2s_state_t *ch) {
8787
if (!ch) {
8888
return false;
8989
} else {
90-
return (ch->i2s_curr_slc_buf_pos==SLC_BUF_LEN || ch->i2s_curr_slc_buf==NULL) && (ch->i2s_slc_queue_len == 0);
90+
return (ch->curr_slc_buf_pos==SLC_BUF_LEN || ch->curr_slc_buf==NULL) && (ch->slc_queue_len == 0);
9191
}
9292
}
9393

@@ -103,7 +103,7 @@ static bool ICACHE_FLASH_ATTR _i2s_is_empty(const i2s_state_t *ch) {
103103
if (!ch) {
104104
return false;
105105
} else {
106-
return (ch->i2s_slc_queue_len >= SLC_BUF_CNT-1);
106+
return (ch->slc_queue_len >= SLC_BUF_CNT-1);
107107
}
108108
}
109109

@@ -119,7 +119,7 @@ static int16_t ICACHE_FLASH_ATTR _i2s_available(const i2s_state_t *ch) {
119119
if (!ch) {
120120
return 0;
121121
} else {
122-
return (SLC_BUF_CNT - ch->i2s_slc_queue_len) * SLC_BUF_LEN;
122+
return (SLC_BUF_CNT - ch->slc_queue_len) * SLC_BUF_LEN;
123123
}
124124
}
125125

@@ -134,26 +134,26 @@ int16_t ICACHE_FLASH_ATTR i2s_rx_available(){
134134
// Pop the top off of the queue and return it
135135
uint32_t * ICACHE_FLASH_ATTR i2s_slc_queue_next_item(i2s_state_t *ch) {
136136
uint8_t i;
137-
uint32_t *item = ch->i2s_slc_queue[0];
138-
ch->i2s_slc_queue_len--;
139-
for ( i = 0; i < ch->i2s_slc_queue_len; i++) {
140-
ch->i2s_slc_queue[i] = ch->i2s_slc_queue[i+1];
137+
uint32_t *item = ch->slc_queue[0];
138+
ch->slc_queue_len--;
139+
for ( i = 0; i < ch->slc_queue_len; i++) {
140+
ch->slc_queue[i] = ch->slc_queue[i+1];
141141
}
142142
return item;
143143
}
144144

145145
// Append an item to the end of the queue from receive
146146
void ICACHE_FLASH_ATTR i2s_slc_queue_append_item(i2s_state_t *ch, uint32_t *item) {
147147
// Shift everything up, except for the one corresponding to this item
148-
for (int i=0, dest=0; i < ch->i2s_slc_queue_len; i++) {
149-
if (ch->i2s_slc_queue[i] != item) {
150-
ch->i2s_slc_queue[dest++] = ch->i2s_slc_queue[i];
148+
for (int i=0, dest=0; i < ch->slc_queue_len; i++) {
149+
if (ch->slc_queue[i] != item) {
150+
ch->slc_queue[dest++] = ch->slc_queue[i];
151151
}
152152
}
153-
if (ch->i2s_slc_queue_len < SLC_BUF_CNT - 1) {
154-
ch->i2s_slc_queue[ch->i2s_slc_queue_len++] = item;
153+
if (ch->slc_queue_len < SLC_BUF_CNT - 1) {
154+
ch->slc_queue[ch->slc_queue_len++] = item;
155155
} else {
156-
ch->i2s_slc_queue[ch->i2s_slc_queue_len] = item;
156+
ch->slc_queue[ch->slc_queue_len] = item;
157157
}
158158
}
159159

@@ -168,11 +168,11 @@ void ICACHE_FLASH_ATTR i2s_slc_isr(void) {
168168
tx_irqs++;
169169
slc_queue_item_t *finished_item = (slc_queue_item_t *)SLCRXEDA;
170170
memset((void *)finished_item->buf_ptr, 0x00, SLC_BUF_LEN * 4);//zero the buffer so it is mute in case of underflow
171-
if (tx->i2s_slc_queue_len >= SLC_BUF_CNT-1) { //All buffers are empty. This means we have an underflow
171+
if (tx->slc_queue_len >= SLC_BUF_CNT-1) { //All buffers are empty. This means we have an underflow
172172
i2s_slc_queue_next_item(tx); //free space for finished_item
173173
}
174-
tx->i2s_slc_queue[tx->i2s_slc_queue_len++] = finished_item->buf_ptr;
175-
if (tx->i2s_callback) tx->i2s_callback();
174+
tx->slc_queue[tx->slc_queue_len++] = finished_item->buf_ptr;
175+
if (tx->callback) tx->callback();
176176
ETS_SLC_INTR_ENABLE();
177177
}
178178
if (slc_intr_status & SLCITXEOF) {
@@ -182,44 +182,44 @@ void ICACHE_FLASH_ATTR i2s_slc_isr(void) {
182182
finished_item->owner = 1; // Or else RX just stops
183183
finished_item->myid++;
184184
i2s_slc_queue_append_item(rx, finished_item->buf_ptr);
185-
if (rx->i2s_callback) rx->i2s_callback();
185+
if (rx->callback) rx->callback();
186186
ETS_SLC_INTR_ENABLE();
187187
}
188188
}
189189

190190
void i2s_set_callback(void (*callback) (void)){
191-
tx->i2s_callback = callback;
191+
tx->callback = callback;
192192
}
193193

194194
void i2s_rx_set_callback(void (*callback) (void)){
195-
rx->i2s_callback = callback;
195+
rx->callback = callback;
196196
}
197197

198198
static void ICACHE_FLASH_ATTR _alloc_channel(i2s_state_t *ch) {
199199
int x, y;
200200

201-
ch->i2s_slc_queue_len = 0;
201+
ch->slc_queue_len = 0;
202202
for (x=0; x<SLC_BUF_CNT; x++) {
203-
ch->i2s_slc_buf_pntr[x] = malloc(SLC_BUF_LEN*4);
204-
for (y=0; y<SLC_BUF_LEN; y++) ch->i2s_slc_buf_pntr[x][y] = 0;
205-
206-
ch->i2s_slc_items[x].unused = 0;
207-
ch->i2s_slc_items[x].owner = 1;
208-
ch->i2s_slc_items[x].eof = 1;
209-
ch->i2s_slc_items[x].sub_sof = 0;
210-
ch->i2s_slc_items[x].datalen = SLC_BUF_LEN * 4;
211-
ch->i2s_slc_items[x].blocksize = SLC_BUF_LEN * 4;
212-
ch->i2s_slc_items[x].buf_ptr = (uint32_t*)&ch->i2s_slc_buf_pntr[x][0];
213-
ch->i2s_slc_items[x].next_link_ptr = (uint32_t*)((x<(SLC_BUF_CNT-1))?(&ch->i2s_slc_items[x+1]):(&ch->i2s_slc_items[0]));
214-
ch->i2s_slc_items[x].myid = 0;
203+
ch->slc_buf_pntr[x] = malloc(SLC_BUF_LEN*4);
204+
for (y=0; y<SLC_BUF_LEN; y++) ch->slc_buf_pntr[x][y] = 0;
205+
206+
ch->slc_items[x].unused = 0;
207+
ch->slc_items[x].owner = 1;
208+
ch->slc_items[x].eof = 1;
209+
ch->slc_items[x].sub_sof = 0;
210+
ch->slc_items[x].datalen = SLC_BUF_LEN * 4;
211+
ch->slc_items[x].blocksize = SLC_BUF_LEN * 4;
212+
ch->slc_items[x].buf_ptr = (uint32_t*)&ch->slc_buf_pntr[x][0];
213+
ch->slc_items[x].next_link_ptr = (uint32_t*)((x<(SLC_BUF_CNT-1))?(&ch->slc_items[x+1]):(&ch->slc_items[0]));
214+
ch->slc_items[x].myid = 0;
215215
}
216216
}
217217
#if 0
218218
void dumprx()
219219
{
220220
for (int i=0; i<SLC_BUF_CNT; i++) {
221-
printf("%d: %d %d %d %d %d %d %p %p\n", i, rx->i2s_slc_items[i].myid, rx->i2s_slc_items[i].owner, rx->i2s_slc_items[i].eof, rx->i2s_slc_items[i].sub_sof, rx->i2s_slc_items[i].datalen, rx->i2s_slc_items[i].blocksize,
222-
rx->i2s_slc_items[i].buf_ptr, rx->i2s_slc_items[i].next_link_ptr);
221+
printf("%d: %d %d %d %d %d %d %p %p\n", i, rx->slc_items[i].myid, rx->slc_items[i].owner, rx->slc_items[i].eof, rx->slc_items[i].sub_sof, rx->slc_items[i].datalen, rx->slc_items[i].blocksize,
222+
rx->slc_items[i].buf_ptr, rx->slc_items[i].next_link_ptr);
223223
}
224224
}
225225
#endif
@@ -251,14 +251,14 @@ static void ICACHE_FLASH_ATTR i2s_slc_begin() {
251251
SLCTXL &= ~(SLCTXLAM << SLCTXLA); // clear TX descriptor address
252252
SLCRXL &= ~(SLCRXLAM << SLCRXLA); // clear RX descriptor address
253253
if (!rx) {
254-
SLCTXL |= (uint32)&tx->i2s_slc_items[1] << SLCTXLA; // Set fake (unused) RX descriptor address
254+
SLCTXL |= (uint32)&tx->slc_items[1] << SLCTXLA; // Set fake (unused) RX descriptor address
255255
} else {
256-
SLCTXL |= (uint32)&rx->i2s_slc_items[0] << SLCTXLA; // Set real RX address
256+
SLCTXL |= (uint32)&rx->slc_items[0] << SLCTXLA; // Set real RX address
257257
}
258258
if (!tx) {
259-
// SLCRXL |= (uint32)&rx->i2s_slc_items[1] << SLCRXLA; // Set fake (ununsed) TX descriptor address
259+
// SLCRXL |= (uint32)&rx->slc_items[1] << SLCRXLA; // Set fake (ununsed) TX descriptor address
260260
} else {
261-
SLCRXL |= (uint32)&tx->i2s_slc_items[0] << SLCRXLA; // Set real TX address
261+
SLCRXL |= (uint32)&tx->slc_items[0] << SLCRXLA; // Set real TX address
262262
}
263263

264264
ETS_SLC_INTR_ATTACH(i2s_slc_isr, NULL);
@@ -282,12 +282,12 @@ static void ICACHE_FLASH_ATTR i2s_slc_end(){
282282

283283
for (int x = 0; x<SLC_BUF_CNT; x++) {
284284
if (tx) {
285-
free(tx->i2s_slc_buf_pntr[x]);
286-
tx->i2s_slc_buf_pntr[x] = NULL;
285+
free(tx->slc_buf_pntr[x]);
286+
tx->slc_buf_pntr[x] = NULL;
287287
}
288288
if (rx) {
289-
free(rx->i2s_slc_buf_pntr[x]);
290-
rx->i2s_slc_buf_pntr[x] = NULL;
289+
free(rx->slc_buf_pntr[x]);
290+
rx->slc_buf_pntr[x] = NULL;
291291
}
292292
}
293293
}
@@ -297,11 +297,11 @@ static void ICACHE_FLASH_ATTR i2s_slc_end(){
297297
//thread if the buffer is full and resume when there's room again.
298298

299299
static bool ICACHE_FLASH_ATTR _i2s_write_sample(uint32_t sample, bool nb) {
300-
if (tx->i2s_curr_slc_buf_pos==SLC_BUF_LEN || tx->i2s_curr_slc_buf==NULL) {
301-
if (tx->i2s_slc_queue_len == 0) {
300+
if (tx->curr_slc_buf_pos==SLC_BUF_LEN || tx->curr_slc_buf==NULL) {
301+
if (tx->slc_queue_len == 0) {
302302
if (nb) return false;
303303
while (1) {
304-
if (tx->i2s_slc_queue_len > 0){
304+
if (tx->slc_queue_len > 0){
305305
break;
306306
} else {
307307
ets_wdt_disable();
@@ -310,11 +310,11 @@ static bool ICACHE_FLASH_ATTR _i2s_write_sample(uint32_t sample, bool nb) {
310310
}
311311
}
312312
ETS_SLC_INTR_DISABLE();
313-
tx->i2s_curr_slc_buf = (uint32_t *)i2s_slc_queue_next_item(tx);
313+
tx->curr_slc_buf = (uint32_t *)i2s_slc_queue_next_item(tx);
314314
ETS_SLC_INTR_ENABLE();
315-
tx->i2s_curr_slc_buf_pos=0;
315+
tx->curr_slc_buf_pos=0;
316316
}
317-
tx->i2s_curr_slc_buf[tx->i2s_curr_slc_buf_pos++]=sample;
317+
tx->curr_slc_buf[tx->curr_slc_buf_pos++]=sample;
318318
return true;
319319
}
320320

@@ -334,11 +334,11 @@ bool ICACHE_FLASH_ATTR i2s_write_lr(int16_t left, int16_t right){
334334
}
335335

336336
bool ICACHE_FLASH_ATTR i2s_read_sample(uint32_t *left, uint32_t *right, bool blocking) {
337-
if (rx->i2s_curr_slc_buf_pos==SLC_BUF_LEN || rx->i2s_curr_slc_buf==NULL) {
338-
if (rx->i2s_slc_queue_len == 0) {
337+
if (rx->curr_slc_buf_pos==SLC_BUF_LEN || rx->curr_slc_buf==NULL) {
338+
if (rx->slc_queue_len == 0) {
339339
if (!blocking) return false;
340340
while (1) {
341-
if (rx->i2s_slc_queue_len > 0){
341+
if (rx->slc_queue_len > 0){
342342
break;
343343
} else {
344344
ets_wdt_disable();
@@ -347,15 +347,15 @@ bool ICACHE_FLASH_ATTR i2s_read_sample(uint32_t *left, uint32_t *right, bool blo
347347
}
348348
}
349349
ETS_SLC_INTR_DISABLE();
350-
rx->i2s_curr_slc_buf = (uint32_t *)i2s_slc_queue_next_item(rx);
350+
rx->curr_slc_buf = (uint32_t *)i2s_slc_queue_next_item(rx);
351351
ETS_SLC_INTR_ENABLE();
352-
rx->i2s_curr_slc_buf_pos=0;
352+
rx->curr_slc_buf_pos=0;
353353
}
354354

355-
// *left = rx->i2s_slc_items[0].buf_ptr[rx->i2s_curr_slc_buf_pos++];
356-
// *right = rx->i2s_slc_items[0].buf_ptr[rx->i2s_curr_slc_buf_pos++];
357-
*left = rx->i2s_curr_slc_buf[rx->i2s_curr_slc_buf_pos++];
358-
*right = rx->i2s_curr_slc_buf[rx->i2s_curr_slc_buf_pos++];
355+
// *left = rx->slc_items[0].buf_ptr[rx->curr_slc_buf_pos++];
356+
// *right = rx->slc_items[0].buf_ptr[rx->curr_slc_buf_pos++];
357+
*left = rx->curr_slc_buf[rx->curr_slc_buf_pos++];
358+
*right = rx->curr_slc_buf[rx->curr_slc_buf_pos++];
359359

360360
return true;
361361
}

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