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Merge branch 'master' into wifioff
2 parents a6d1f73 + ad9aaef commit 5a2c2db

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3 files changed

+8
-9
lines changed

3 files changed

+8
-9
lines changed

cores/esp8266/core_esp8266_features.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -38,13 +38,13 @@ void precache(void *f, uint32_t bytes) {
3838
// page (ie 1 word in 8) for this to work.
3939
#define CACHE_PAGE_SIZE 32
4040

41-
uint32_t a0;
42-
__asm__("mov.n %0, a0" : "=r"(a0));
43-
uint32_t lines = (bytes/CACHE_PAGE_SIZE)+2;
44-
volatile uint32_t *p = (uint32_t*)((f ? (uint32_t)f : a0) & ~0x03);
45-
uint32_t x;
46-
for (uint32_t i=0; i<lines; i++, p+=CACHE_PAGE_SIZE/sizeof(uint32_t)) x=*p;
47-
(void)x;
41+
uint32_t lines = (bytes / CACHE_PAGE_SIZE) + 2;
42+
uint32_t *p = (uint32_t*)((uint32_t)(f ? f : __builtin_return_address(0)) & ~0x03);
43+
do {
44+
__asm__ volatile ("" : : "r"(*p)); // guarantee that the value of *p will be in some register (forced load)
45+
p += CACHE_PAGE_SIZE / sizeof(uint32_t);
46+
} while (--lines);
47+
__sync_synchronize(); // full memory barrier, mapped to MEMW in Xtensa
4848
}
4949

5050
/** based on efuse data, we could determine what type of chip this is

libraries/ESP8266WiFi/examples/BearSSL_CertStore/certs-from-mozilla.py

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,6 @@
4747
if item.startswith("'-----BEGIN CERTIFICATE-----"):
4848
pems.append(item)
4949
del names[0] # Remove headers
50-
del pems[0] # Remove headers
5150

5251
# Try and make ./data, skip if present
5352
try:

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