Merge branch 'master' into littlefs

Author: earlephilhower

.travis.yml

@@ -44,6 +44,14 @@ jobs:
       script: $TRAVIS_BUILD_DIR/tests/common.sh
       env:
         - BUILD_TYPE=debug_odd
+    - name: "Build IPv6 (1)"
+      script: $TRAVIS_BUILD_DIR/tests/common.sh
+      env:
+        - BUILD_TYPE=build6_even
+    - name: "Build IPv6 (2)"
+      script: $TRAVIS_BUILD_DIR/tests/common.sh
+      env:
+        - BUILD_TYPE=build6_odd
     - name: "Platformio (1)"
       script: $TRAVIS_BUILD_DIR/tests/common.sh
       env:

README.md

@@ -3,7 +3,7 @@ Arduino core for ESP8266 WiFi chip
 
 # Quick links
 
-- [Latest release documentation](https://arduino-esp8266.readthedocs.io/en/2.5.0-beta1/)
+- [Latest release documentation](https://arduino-esp8266.readthedocs.io/en/2.5.0-beta2/)
 - [Current "git version" documentation](https://arduino-esp8266.readthedocs.io/en/latest/)
 - [Install git version](https://arduino-esp8266.readthedocs.io/en/latest/installing.html#using-git-version) ([sources](doc/installing.rst#using-git-version))
 
@@ -36,7 +36,7 @@ Starting with 1.6.4, Arduino allows installation of third-party platform package
 #### Latest release [![Latest release](https://img.shields.io/github/release/esp8266/Arduino.svg)](https://github.com/esp8266/Arduino/releases/latest/)
 Boards manager link: `http://arduino.esp8266.com/stable/package_esp8266com_index.json`
 
-Documentation: [https://arduino-esp8266.readthedocs.io/en/2.5.0-beta1/](https://arduino-esp8266.readthedocs.io/en/2.5.0-beta1/)
+Documentation: [https://arduino-esp8266.readthedocs.io/en/2.5.0-beta2/](https://arduino-esp8266.readthedocs.io/en/2.5.0-beta2/)
 
 ### Using git version (basic instructions)
 [![Linux build status](https://travis-ci.org/esp8266/Arduino.svg)](https://travis-ci.org/esp8266/Arduino)

boards.txt

@@ -132,18 +132,18 @@ uint64_t EspClass::deepSleepMax()
 
 }
 
-/* 
+/*
 Layout of RTC Memory is as follows:
 Ref: Espressif doc 2C-ESP8266_Non_OS_SDK_API_Reference, section 3.3.23 (system_rtc_mem_write)
 
 |<------system data (256 bytes)------->|<-----------------user data (512 bytes)--------------->|
 
-SDK function signature:   
+SDK function signature:
 bool	system_rtc_mem_read	(
-				uint32	des_addr,	
-				void	*	src_addr,	
+				uint32	des_addr,
+				void	*	src_addr,
 				uint32	save_size
-)   
+)
 
 The system data section can't be used by the user, so:
 des_addr must be >=64 (i.e.: 256/4) and <192 (i.e.: 768/4)
@@ -160,7 +160,7 @@ Same for write
 Note: If the Updater class is in play, e.g.: the application uses OTA, the eboot
 command will be stored into the first 128 bytes of user data, then it will be
 retrieved by eboot on boot. That means that user data present there will be lost.
-Ref: 
+Ref:
 - discussion in PR #5330.
 - https://github.com/esp8266/esp8266-wiki/wiki/Memory-Map#memmory-mapped-io-registers
 - Arduino/bootloaders/eboot/eboot_command.h RTC_MEM definition
@@ -266,7 +266,16 @@ uint8_t EspClass::getCpuFreqMHz(void)
 
 uint32_t EspClass::getFlashChipId(void)
 {
-    return spi_flash_get_id();
+    static uint32_t flash_chip_id = 0;
+    if (flash_chip_id == 0) {
+        flash_chip_id = spi_flash_get_id();
+    }
+    return flash_chip_id;
+}
+
+uint8_t EspClass::getFlashChipVendorId(void)
+{
+    return (getFlashChipId() & 0x000000ff);
 }
 
 uint32_t EspClass::getFlashChipRealSize(void)
@@ -569,9 +578,61 @@ bool EspClass::flashEraseSector(uint32_t sector) {
     return rc == 0;
 }
 
+#if PUYA_SUPPORT
+static int spi_flash_write_puya(uint32_t offset, uint32_t *data, size_t size) {
+    if (data == nullptr) {
+      return 1; // SPI_FLASH_RESULT_ERR
+    }
+    // PUYA flash chips need to read existing data, update in memory and write modified data again.
+    static uint32_t *flash_write_puya_buf = nullptr;
+    int rc = 0;
+    uint32_t* ptr = data;
+
+    if (flash_write_puya_buf == nullptr) {
+        flash_write_puya_buf = (uint32_t*) malloc(PUYA_BUFFER_SIZE);
+        // No need to ever free this, since the flash chip will never change at runtime.
+        if (flash_write_puya_buf == nullptr) {
+            // Memory could not be allocated.
+            return 1; // SPI_FLASH_RESULT_ERR
+        }
+    }
+    size_t bytesLeft = size;
+    uint32_t pos = offset;
+    while (bytesLeft > 0 && rc == 0) {
+        size_t bytesNow = bytesLeft;
+        if (bytesNow > PUYA_BUFFER_SIZE) {
+            bytesNow = PUYA_BUFFER_SIZE;
+            bytesLeft -= PUYA_BUFFER_SIZE;
+        } else {
+            bytesLeft = 0;
+        }
+        rc = spi_flash_read(pos, flash_write_puya_buf, bytesNow);
+        if (rc != 0) {
+            return rc;
+        }
+        for (size_t i = 0; i < bytesNow / 4; ++i) {
+            flash_write_puya_buf[i] &= *ptr;
+            ++ptr;
+        }
+        rc = spi_flash_write(pos, flash_write_puya_buf, bytesNow);
+        pos += bytesNow;
+    }
+    return rc;
+}
+#endif
+
 bool EspClass::flashWrite(uint32_t offset, uint32_t *data, size_t size) {
     ets_isr_mask(FLASH_INT_MASK);
-    int rc = spi_flash_write(offset, (uint32_t*) data, size);
+    int rc = 0;
+#if PUYA_SUPPORT
+    if (getFlashChipVendorId() == SPI_FLASH_VENDOR_PUYA) {
+        rc = spi_flash_write_puya(offset, data, size);
+    }
+    else
+#endif
+    {
+        rc = spi_flash_write(offset, data, size);
+    }
     ets_isr_unmask(FLASH_INT_MASK);
     return rc == 0;
 }

cores/esp8266/Esp.cpp

@@ -23,6 +23,52 @@
 
 #include <Arduino.h>
 
+#ifndef PUYA_SUPPORT
+  #define PUYA_SUPPORT 0
+#endif
+#ifndef PUYA_BUFFER_SIZE
+  // Good alternative for buffer size is: SPI_FLASH_SEC_SIZE (= 4k)
+  // Always use a multiple of flash page size (256 bytes)
+  #define PUYA_BUFFER_SIZE 256
+#endif
+
+// Vendor IDs taken from Flashrom project
+// https://review.coreboot.org/cgit/flashrom.git/tree/flashchips.h?h=1.0.x
+typedef enum {
+    SPI_FLASH_VENDOR_ALLIANCE    = 0x52,    /* Alliance Semiconductor */
+    SPI_FLASH_VENDOR_AMD         = 0x01,    /* AMD */
+    SPI_FLASH_VENDOR_AMIC        = 0x37,    /* AMIC */
+    SPI_FLASH_VENDOR_ATMEL       = 0x1F,    /* Atmel (now used by Adesto) */
+    SPI_FLASH_VENDOR_BRIGHT      = 0xAD,    /* Bright Microelectronics */
+    SPI_FLASH_VENDOR_CATALYST    = 0x31,    /* Catalyst */
+    SPI_FLASH_VENDOR_EON         = 0x1C,    /* EON Silicon Devices, missing 0x7F prefix */
+    SPI_FLASH_VENDOR_ESMT        = 0x8C,    /* Elite Semiconductor Memory Technology (ESMT) / EFST Elite Flash Storage */
+    SPI_FLASH_VENDOR_EXCEL       = 0x4A,    /* ESI, missing 0x7F prefix */
+    SPI_FLASH_VENDOR_FIDELIX     = 0xF8,    /* Fidelix */
+    SPI_FLASH_VENDOR_FUJITSU     = 0x04,    /* Fujitsu */
+    SPI_FLASH_VENDOR_GIGADEVICE  = 0xC8,    /* GigaDevice */
+    SPI_FLASH_VENDOR_HYUNDAI     = 0xAD,    /* Hyundai */
+    SPI_FLASH_VENDOR_INTEL       = 0x89,    /* Intel */
+    SPI_FLASH_VENDOR_ISSI        = 0xD5,    /* ISSI Integrated Silicon Solutions, see also PMC. */
+    SPI_FLASH_VENDOR_MACRONIX    = 0xC2,    /* Macronix (MX) */
+    SPI_FLASH_VENDOR_NANTRONICS  = 0xD5,    /* Nantronics, missing prefix */
+    SPI_FLASH_VENDOR_PMC         = 0x9D,    /* PMC, missing 0x7F prefix */
+    SPI_FLASH_VENDOR_PUYA        = 0x85,    /* Puya semiconductor (shanghai) co. ltd */
+    SPI_FLASH_VENDOR_SANYO       = 0x62,    /* Sanyo */
+    SPI_FLASH_VENDOR_SHARP       = 0xB0,    /* Sharp */
+    SPI_FLASH_VENDOR_SPANSION    = 0x01,    /* Spansion, same ID as AMD */
+    SPI_FLASH_VENDOR_SST         = 0xBF,    /* SST */
+    SPI_FLASH_VENDOR_ST          = 0x20,    /* ST / SGS/Thomson / Numonyx (later acquired by Micron) */
+    SPI_FLASH_VENDOR_SYNCMOS_MVC = 0x40,    /* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */
+    SPI_FLASH_VENDOR_TENX        = 0x5E,    /* Tenx Technologies */
+    SPI_FLASH_VENDOR_TI          = 0x97,    /* Texas Instruments */
+    SPI_FLASH_VENDOR_TI_OLD      = 0x01,    /* TI chips from last century */
+    SPI_FLASH_VENDOR_WINBOND     = 0xDA,    /* Winbond */
+    SPI_FLASH_VENDOR_WINBOND_NEX = 0xEF,    /* Winbond (ex Nexcom) serial flashes */
+
+    SPI_FLASH_VENDOR_UNKNOWN     = 0xFF
+} SPI_FLASH_VENDOR_t;
+
 /**
  * AVR macros for WDT managment
  */
@@ -123,6 +169,8 @@ class EspClass {
         uint8_t getCpuFreqMHz();
 
         uint32_t getFlashChipId();
+        uint8_t getFlashChipVendorId();
+
         //gets the actual chip size based on the flash id
         uint32_t getFlashChipRealSize();
         //gets the size of the flash as set by the compiler

cores/esp8266/Esp.h

@@ -149,8 +149,8 @@ class IPAddress: public Printable {
         /*
                lwIP address compatibility
         */
+        IPAddress(const ipv4_addr& fw_addr)   { setV4(); v4() = fw_addr.addr; }
         IPAddress(const ipv4_addr* fw_addr)   { setV4(); v4() = fw_addr->addr; }
-        IPAddress(const ip_addr_t& lwip_addr) { _ip = lwip_addr; }
 
         operator       ip_addr_t () const { return  _ip; }
         operator const ip_addr_t*() const { return &_ip; }
@@ -163,6 +163,9 @@ class IPAddress: public Printable {
 
 #if LWIP_IPV6
 
+        IPAddress(const ip_addr_t& lwip_addr) { ip_addr_copy(_ip, lwip_addr); }
+        IPAddress(const ip_addr_t* lwip_addr) { ip_addr_copy(_ip, *lwip_addr); }
+
         uint16_t* raw6()
         {
             setV6();

cores/esp8266/IPAddress.h

@@ -47,7 +47,8 @@ int ICACHE_RAM_ATTR cont_check(cont_t* cont) {
     return 0;
 }
 
-int ICACHE_RAM_ATTR cont_get_free_stack(cont_t* cont) {
+// No need for this to be in IRAM, not expected to be IRQ called
+int cont_get_free_stack(cont_t* cont) {
     uint32_t *head = cont->stack;
     int freeWords = 0;
 

cores/esp8266/cont_util.c

@@ -62,32 +62,25 @@ extern void __custom_crash_callback( struct rst_info * rst_info, uint32_t stack,
 
 extern void custom_crash_callback( struct rst_info * rst_info, uint32_t stack, uint32_t stack_end ) __attribute__ ((weak, alias("__custom_crash_callback")));
 
-// Single, non-inlined copy of pgm_read_byte to save IRAM space (as this is not timing critical)
-static char ICACHE_RAM_ATTR iram_read_byte (const char *addr) {
-    return pgm_read_byte(addr);
-}
-
-// Required to output the s_panic_file, it's stored in PMEM
-#define ets_puts_P(pstr) \
-{ \
-    char c; \
-    do { \
-        c = iram_read_byte(pstr++); \
-        if (c) ets_putc(c); \
-    } while (c); \
-}
 
-// Place these strings in .text because the SPI interface may be in bad shape during an exception.
-#define ets_printf_P(str, ...) \
-{ \
-    static const char istr[] ICACHE_RAM_ATTR = (str); \
-    char mstr[sizeof(str)]; \
-    for (size_t i=0; i < sizeof(str); i++) mstr[i] = iram_read_byte(&istr[i]); \
-    ets_printf(mstr, ##__VA_ARGS__); \
+// Prints need to use our library function to allow for file and function
+// to be safely accessed from flash. This function encapsulates snprintf()
+// [which by definition will 0-terminate] and dumping to the UART
+static void ets_printf_P(const char *str, ...) {
+    char destStr[160];
+    char *c = destStr;
+    va_list argPtr;
+    va_start(argPtr, str);
+    vsnprintf(destStr, sizeof(destStr), str, argPtr);
+    va_end(argPtr);
+    while (*c) {
+        ets_putc(*(c++));
+    }
 }
 
 void __wrap_system_restart_local() {
     register uint32_t sp asm("a1");
+    uint32_t sp_dump = sp;
 
     if (gdb_present()) {
         /* When GDBStub is present, exceptions are handled by GDBStub,
@@ -110,28 +103,24 @@ void __wrap_system_restart_local() {
     ets_install_putc1(&uart_write_char_d);
 
     if (s_panic_line) {
-        ets_printf_P("\nPanic ");
-        ets_puts_P(s_panic_file); // This is in PROGMEM, need special output because ets_printf can't handle ROM parameters
-        ets_printf_P(":%d %s", s_panic_line, s_panic_func);
+        ets_printf_P(PSTR("\nPanic %S:%d %S"), s_panic_file, s_panic_line, s_panic_func);
         if (s_panic_what) {
-            ets_printf_P(": Assertion '");
-            ets_puts_P(s_panic_what); // This is also in PMEM
-            ets_printf_P("' failed.");
+            ets_printf_P(PSTR(": Assertion '%S' failed."), s_panic_what);
         }
         ets_putc('\n');
     }
     else if (s_unhandled_exception) {
-        ets_printf_P("\nUnhandled exception: %s\n", s_unhandled_exception);
+        ets_printf_P(PSTR("\nUnhandled C++ exception: %S\n"), s_unhandled_exception);
     }
     else if (s_abort_called) {
-        ets_printf_P("\nAbort called\n");
+        ets_printf_P(PSTR("\nAbort called\n"));
     }
     else if (rst_info.reason == REASON_EXCEPTION_RST) {
-        ets_printf_P("\nException (%d):\nepc1=0x%08x epc2=0x%08x epc3=0x%08x excvaddr=0x%08x depc=0x%08x\n",
+        ets_printf_P(PSTR("\nException (%d):\nepc1=0x%08x epc2=0x%08x epc3=0x%08x excvaddr=0x%08x depc=0x%08x\n"),
             rst_info.exccause, rst_info.epc1, rst_info.epc2, rst_info.epc3, rst_info.excvaddr, rst_info.depc);
     }
     else if (rst_info.reason == REASON_SOFT_WDT_RST) {
-        ets_printf_P("\nSoft WDT reset\n");
+        ets_printf_P(PSTR("\nSoft WDT reset\n"));
     }
 
     uint32_t cont_stack_start = (uint32_t) &(g_pcont->stack);
@@ -152,54 +141,53 @@ void __wrap_system_restart_local() {
         offset = 0x10;
     }
 
-    ets_printf_P("\n>>>stack>>>\n");
+    ets_printf_P(PSTR("\n>>>stack>>>\n"));
 
-    if (sp > stack_thunk_get_stack_bot() && sp <= stack_thunk_get_stack_top()) {
+    if (sp_dump > stack_thunk_get_stack_bot() && sp_dump <= stack_thunk_get_stack_top()) {
         // BearSSL we dump the BSSL second stack and then reset SP back to the main cont stack
-        ets_printf_P("\nctx: bearssl \n");
-        ets_printf_P("sp: %08x end: %08x offset: %04x\n", sp, stack_thunk_get_stack_top(), offset);
-        print_stack(sp + offset, stack_thunk_get_stack_top());
+        ets_printf_P(PSTR("\nctx: bearssl\nsp: %08x end: %08x offset: %04x\n"), sp_dump, stack_thunk_get_stack_top(), offset);
+        print_stack(sp_dump + offset, stack_thunk_get_stack_top());
         offset = 0; // No offset needed anymore, the exception info was stored in the bssl stack
-        sp = stack_thunk_get_cont_sp();
+        sp_dump = stack_thunk_get_cont_sp();
     }
 
-    if (sp > cont_stack_start && sp < cont_stack_end) {
-        ets_printf_P("\nctx: cont \n");
+    if (sp_dump > cont_stack_start && sp_dump < cont_stack_end) {
+        ets_printf_P(PSTR("\nctx: cont\n"));
         stack_end = cont_stack_end;
     }
     else {
-        ets_printf_P("\nctx: sys \n");
+        ets_printf_P(PSTR("\nctx: sys\n"));
         stack_end = 0x3fffffb0;
         // it's actually 0x3ffffff0, but the stuff below ets_run
         // is likely not really relevant to the crash
     }
 
-    ets_printf_P("sp: %08x end: %08x offset: %04x\n", sp, stack_end, offset);
+    ets_printf_P(PSTR("sp: %08x end: %08x offset: %04x\n"), sp_dump, stack_end, offset);
 
-    print_stack(sp + offset, stack_end);
+    print_stack(sp_dump + offset, stack_end);
 
-    ets_printf_P("<<<stack<<<\n");
+    ets_printf_P(PSTR("<<<stack<<<\n"));
 
     // Use cap-X formatting to ensure the standard EspExceptionDecoder doesn't match the address
     if (umm_last_fail_alloc_addr) {
-      ets_printf_P("\nlast failed alloc call: %08X(%d)\n", (uint32_t)umm_last_fail_alloc_addr, umm_last_fail_alloc_size);
+      ets_printf_P(PSTR("\nlast failed alloc call: %08X(%d)\n"), (uint32_t)umm_last_fail_alloc_addr, umm_last_fail_alloc_size);
     }
 
-    custom_crash_callback( &rst_info, sp + offset, stack_end );
+    custom_crash_callback( &rst_info, sp_dump + offset, stack_end );
 
     delayMicroseconds(10000);
     __real_system_restart_local();
 }
 
 
-static void ICACHE_RAM_ATTR print_stack(uint32_t start, uint32_t end) {
+static void print_stack(uint32_t start, uint32_t end) {
     for (uint32_t pos = start; pos < end; pos += 0x10) {
         uint32_t* values = (uint32_t*)(pos);
 
         // rough indicator: stack frames usually have SP saved as the second word
         bool looksLikeStackFrame = (values[2] == pos + 0x10);
 
-        ets_printf_P("%08x:  %08x %08x %08x %08x %c\n",
+        ets_printf_P(PSTR("%08x:  %08x %08x %08x %08x %c\n"),
             pos, values[0], values[1], values[2], values[3], (looksLikeStackFrame)?'<':' ');
     }
 }